Patents Assigned to V Technology Co., Ltd.
  • Publication number: 20210387283
    Abstract: To provide a laser annealing apparatus which is high efficiency of irradiation energy and capable of achieving uniformity in density of irradiation energy in a region irradiated with a laser beam. SOLVING MEANS Scheduled treatment regions of a treatment film are each defined in the form of a strip extending in a scanning direction. Irradiation surface areas of line beams are oriented to be inclined relative to the scanning direction within respective scheduled treatment regions.
    Type: Application
    Filed: October 9, 2019
    Publication date: December 16, 2021
    Applicant: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu MIZUMURA
  • Publication number: 20210151354
    Abstract: A semiconductor device can be transferred onto a circuit board with high accuracy, and a man-hour and a facility load in a process of peeling off the semiconductor device from a sapphire substrate are reduced. A semiconductor-device-formed sapphire substrate in which gallium-nitride-based semiconductor devices are arrayed and formed on a sapphire substrate includes a nitrogen-gallium re-fusion layer A at an interface between the sapphire substrate and the semiconductor devices. An adhesive strength of the nitrogen-gallium re-fusion layer is smaller than an adhesive strength of an adhesive layer for bonding the semiconductor devices to a circuit board.
    Type: Application
    Filed: April 16, 2019
    Publication date: May 20, 2021
    Applicant: V TECHNOLOGY CO., LTD.
    Inventors: Yoshikatsu YANAGAWA, Takafumi HIRANO, Koichiro FUKAYA
  • Publication number: 20210119098
    Abstract: A substrate mounting method of an electronic component on a wiring substrate includes steps of patterning to form a conductive elastic protrusion on an electrode pad provided on the wiring substrate to correspond to a contact point of the electronic component, forming an adhesive layer made of a photosensitive thermosetting resin on the wiring substrate, lowering viscosity of the adhesive layer by heating the adhesive layer to a first temperature zone, electrically connecting the contact point of the electronic component to the electrode pad on the wiring substrate through the conductive elastic protrusion, under a state where the viscosity of the adhesive layer is lowered, by pressing the electronic component after the electronic component is positioned on the wiring substrate, and fixing the electronic component onto the wiring substrate by heating the adhesive layer to a second temperature zone higher than the first temperature zone to cure the adhesive layer.
    Type: Application
    Filed: May 29, 2019
    Publication date: April 22, 2021
    Applicant: V TECHNOLOGY CO., LTD.
    Inventors: Koichi KAJIYAMA, Koichiro FUKAYA, Takafumi HIRANO, Yoshikatsu YANAGAWA
  • Patent number: 10971361
    Abstract: A laser annealing method is for irradiating an amorphous silicon film formed on a substrate 6 with laser beams and crystalizing the amorphous silicon film, wherein a plurality of first and second TFT formation portions 23, 24 on the substrate 6 are irradiated with laser beams at differing irradiation doses so as to crystalize the amorphous silicon film in the first TFT formation portions 23 into a polysilicon film having a crystalline state and crystalize the amorphous silicon film in the second TFT formation portions 24 into a polysilicon film having another crystalline state that is different from that of the polysilicon film in the first TFT formation portions 23.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: April 6, 2021
    Assignee: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu Mizumura
  • Patent number: 10950437
    Abstract: A laser annealing method is for irradiating an amorphous silicon film formed on a substrate 6 with laser beams and crystalizing the amorphous silicon film, wherein a plurality of first and second TFT formation portions 23, 24 on the substrate 6 are irradiated with laser beams at differing irradiation doses so as to crystalize the amorphous silicon film in the first TFT formation portions 23 into a polysilicon film having a crystalline state and crystalize the amorphous silicon film in the second TFT formation portions 24 into a polysilicon film having another crystalline state that is different from that of the polysilicon film in the first TFT formation portions 23.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: March 16, 2021
    Assignee: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu Mizumura
  • Publication number: 20210066138
    Abstract: A set of film thickness calculation values of constituent films of a lamination structure is calculated at a set of non-treating regions unexposed to laser light, the non-treating regions residing close to a set of treating regions to be annealed, and a set of crystallization levels of the set of treating regions is calculated by a fitting between a second spectral spectrum measurement values of the set of treating regions and a second spectral spectrum calculation values computed from the set of film thickness calculation values, for use to adjust a set of laser energies of laser light to be irradiated on a TFT substrate to be laser annealed at the next time.
    Type: Application
    Filed: August 24, 2018
    Publication date: March 4, 2021
    Applicant: V TECHNOLOGY CO., LTD.
    Inventors: Michinobu MIZUMURA, Makoto HATANAKA, Masami TAKIMOTO, Kaori SAITO
  • Patent number: 10920311
    Abstract: A deposition mask includes: a mask sheet formed by stacking a metal layer provided with a plurality of through holes on a film layer provided with a plurality of opening patterns, each through hole enclosing at least one of the opening patterns, and by dividing one surface of the mask sheet into a plurality of unit cells each including two or more of the opening patterns and two or more of the through holes; and a support member which is made of metal and has openings corresponding to the unit cells of the mask sheet, the support member supporting the mask sheet by being joined to the metal layer of the mask sheet to which no external tension is applied. This ensures high shape and positional deposition accuracy in forming thin film patterns using the deposition mask.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 16, 2021
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Shuji Kudo, Ryo Noguchi, Yuji Saito, Zhihua Han
  • Patent number: 10896978
    Abstract: In an oxide semiconductor device including an active layer region constituted by an oxide semiconductor, stability when a stress is applied is improved. The oxide semiconductor device includes an active layer region constituted by an oxide semiconductor of indium (In), gallium (Ga), and zinc (Zn), wherein the active layer region contains an element selected from titanium (Ti), zirconium (Zr), and hafnium (Hf) that are Group 4 elements, or carbon (C), silicon (Si), germanium (Ge), and tin (Sn) that are Group 14 elements at a number density in a range of 1×1016 to 1×1020 cm?3.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: January 19, 2021
    Assignees: V TECHNOLOGY CO., LTD., TOHOKU UNIVERSITY
    Inventors: Tetsuya Goto, Michinobu Mizumura
  • Patent number: 10896817
    Abstract: A laser irradiation apparatus includes a light source that generates a laser beam, a projection lens that radiates the laser beam onto a predetermined region of an amorphous silicon thin film deposited on each of a plurality of thin film transistors on a glass substrate, and a projection mask pattern provided on the projection lens and has a plurality of openings so that the laser beam is radiated onto each of the plurality of thin film transistors, wherein the projection lens radiates the laser beam onto the plurality of thin film transistors on the glass substrate, which moves in a predetermined direction, through the projection mask pattern, and the projection mask pattern is provided such that the openings are not continuous in one column orthogonal to the moving direction.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: January 19, 2021
    Assignees: V Technology Co. Ltd., Sakai Display Products Corporation
    Inventors: Michinobu Mizumura, Nobutake Nodera, Yoshiaki Matsushima, Masakazu Tanaka, Takao Matsumoto
  • Publication number: 20200411588
    Abstract: The present invention is a full-color LED display panel including: an LED array substrate 1 in which multiple LEDs 4 are arranged in a matrix form on a wiring board 5, each LED 4 emitting light in an ultraviolet or blue wavelength band; multiple fluorescent layers 2 configured to perform wavelength conversion by being excited by excitation light emitted from a corresponding LED 4 and by emitting fluorescence of a corresponding color, each fluorescent layer 2 being formed in an island pattern, on at least one corresponding LED 4 for red, green, or blue color, and being made of a fluorescent resist containing a fluorescent colorant uniformly dispersed in a photosensitive resin; and a light shielding member 3 that reflects or absorbs excitation light and fluorescence, and is deposited on a peripheral face 2b of each fluorescent layer 2, which is other than a light emitting surface 2a.
    Type: Application
    Filed: July 16, 2020
    Publication date: December 31, 2020
    Applicant: V Technology Co., Ltd.
    Inventors: Koichi Kajiyama, Takafumi Hirano
  • Publication number: 20200402867
    Abstract: The present invention provides a method for manufacturing an LED display including a wiring board and LEDs arranged at a constant distance from the wiring board. The method includes: aligning an LED substrate 1 having LEDs 11 with a wiring board 2, and pressing and joining the LED substrate onto the wiring board. Each LED has a bonding surface. The wiring board includes bonding layers. The aligning step is performed so that the bonding surfaces are joined on the bonding layers in the pressing and joining step. The method further includes: temporarily bonding the LEDs onto the wiring board by curing the bonding layers through irradiation with ultraviolet light UV; peeling off the LEDs from the LED substrate through irradiation with laser light L; and permanently bonding the LEDs onto the wiring board by heating the bonding layers of the LEDs so as to further cure the bonding layers.
    Type: Application
    Filed: July 17, 2020
    Publication date: December 24, 2020
    Applicant: V Technology Co., Ltd.
    Inventors: Yoshikatsu Yanagawa, Koichiro Fukaya, Naoya Okura
  • Publication number: 20200379282
    Abstract: A photo-aligning exposure device that performs a photo-aligning process by performing scanning exposure on an irradiated plane in one direction includes: a light source that emits scattering light toward the irradiated plane; an optical filter that selectively emits an ultraviolet ray out of the light emitted from the light source; and an irradiation angle restriction member that selectively emits light with which irradiation is diagonally performed with respect to the scanning direction out of the light emitted from the optical filter. The irradiation angle restriction member has a plurality of flat-plate-shaped light direction restriction plates slanted at a certain angle with respect to the irradiated plane and arrayed in parallel along the scanning direction at a predetermined distance.
    Type: Application
    Filed: August 6, 2018
    Publication date: December 3, 2020
    Applicants: V TECHNOLOGY CO., LTD., SHARP KABUSHIKI KAISHA
    Inventors: Yuji Yoshida, Satoshi Ikeda, Toshinari Arai, Isamu Miyake, Takashi Katayama, Akira Hirai
  • Publication number: 20200373350
    Abstract: A full-color LED display panel includes an LED array substrate 1 in which multiple LEDs 4 are arranged in a matrix form on a wiring board 5, each LED 4 emitting light in an ultraviolet or blue wavelength band; multiple fluorescent layers 2 configured to perform wavelength conversion by being excited by excitation light EL emitted from a corresponding LED 4 and by emitting fluorescence FL of a corresponding color, each fluorescent layer 2 being provided on at least one corresponding LED 4 for red, green, or blue color, and containing, in a dispersed manner, a fluorescent colorant 14 and an adjustment colorant 15 that selectively transmits light in a predetermined wavelength band; and a light shielding member 3 that reflects or absorbs excitation light EL and fluorescence FL, and is provided between the fluorescent layers 2.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Applicant: V Technology Co., Ltd.
    Inventors: Koichi Kajiyama, Yoshikazu Suzuki, Takafumi Hirano
  • Patent number: 10840095
    Abstract: A laser irradiation device includes a light source that generates a laser beam, a projection lens that irradiates a predetermined region of an amorphous silicon thin film, mounted on each of a plurality of thin-film transistors on a glass substrate moving in a predetermined direction, with the laser beam, and a projection mask pattern provided on the projection lens and has a plurality of columns each including a predetermined number of opening portions and provided parallel to the predetermined direction, in which the projection lens emits the laser beam through the projection mask pattern, and the projection mask pattern is configured such that at least some of the predetermined number of opening portions are not on a straight line parallel to the predetermined direction in each of the plurality of columns.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: November 17, 2020
    Assignee: V Technology Co., Ltd.
    Inventor: Michinobu Mizumura
  • Patent number: 10818492
    Abstract: The present invention provides a method for manufacturing a thin film transistor including processing of irradiating an amorphous silicon film 8 deposited on a substrate with laser light. The method comprises: a laser annealing step for forming a polysilicon film 9 including a channel region 52 by irradiating an area including a formation region of the region 52 in the film 8 with the laser light such that the area including the formation region is heated, melted, and recrystallized; and a removing step for etching off an area outside the region 52 from the polysilicon film 9. Thus, the present invention can provide a method for manufacturing a thin film transistor and a mask for use in the manufacturing method that are capable of promoting the recrystallization of the film 8 and thereby improving its electron mobility even when laser irradiation has to be performed under restricted irradiation conditions.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: October 27, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu Mizumura
  • Patent number: 10768529
    Abstract: A proximity exposure method, wherein a mask (M) of which the master patterns (31) are formed larger than the resolution limit of the resist (R) is prepared with respect to the resist patterns (43) having the minimum pitch (P) equal to or smaller than the resolution limit of the resist (R); in the first exposure step, the mask (M) and the workpiece (W) are relatively step-moved by the pitch (P) of the resist patterns (43) after the mask patterns (31) are exposed and transferred onto the workpiece (W); and in the second exposure step, the mask patterns (31) are exposed and transferred onto the workpiece (W) again.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: September 8, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Takumi Togashi, Tomonori Harada
  • Patent number: 10651294
    Abstract: The present invention provides a laser annealing method for irradiating laser light L to an amorphous silicon thin film deposited on a substrate to obtain polysilicon, the method including: multiply irradiating the laser light L while changing an irradiation area of the laser light L on the amorphous silicon thin film to achieve such a grain size distribution that a crystal grain size of the polysilicon decreases from a central portion to a side edge portion at least along a center line C of the irradiation area of the laser light L. The above laser annealing method can reduce a leak current through a simple process.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 12, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu Mizumura
  • Patent number: 10644133
    Abstract: The present invention provides a laser annealing method for irradiating laser light L to an amorphous silicon thin film deposited on a substrate to obtain polysilicon, the method including: multiply irradiating the laser light L while changing an irradiation area of the laser light L on the amorphous silicon thin film to achieve such a grain size distribution that a crystal grain size of the polysilicon decreases from a central portion to a side edge portion at least along a center line C of the irradiation area of the laser light L. The above laser annealing method can reduce a leak current through a simple process.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 5, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu Mizumura
  • Patent number: 10626491
    Abstract: The present invention provides a method for manufacturing a deposition mask, which irradiates laser light L to a resin film 20 to form an opening pattern 4 having a polygonal shape in a plan view, the method including a step of irradiating the laser light L that is shaped using a beam-shaping mask 10 having a light transmissive window 18 that allows the laser light L to pass therethrough with light transmittance gradually reducing with distance from an edge of the light transmissive window 18 on at least one of opposing sides thereof within an area outside the light transmissive window 18 to thereby form the opening pattern 4 having at least one pair of opposing side walls 4a that are inclined to open wide toward a surface of the film 20 to be irradiated with the laser light L, from a surface opposite to the irradiated surface.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: April 21, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventor: Michinobu Mizumura
  • Patent number: 10622484
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: April 14, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Michinobu Mizumura, Makoto Hatanaka, Tetsuya Kiguchi