Patents Examined by Ajay K Arora
  • Patent number: 10141384
    Abstract: An organic electroluminescent panel includes a plurality of pixels and a plurality of banks. The pixels each include a plurality of subpixels. The subpixels each include an organic electroluminescent element that includes a first electrode, a second electrode, and an organic material layer that is provided between the first electrode and the second electrode. The banks define each of the subpixels in each of the pixels. The organic electroluminescent element in each of the subpixels is provided in a gap between adjacent two of the banks, and the following relational expression is satisfied: y?0.0001714x2+0.0151429x+0.2914286 where y denotes a height, from a bottom surface of the gap, of a pinning position at which a surface of the organic material layer and one of the banks are in contact with each other, and x denotes a width of the bottom surface of the gap.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: November 27, 2018
    Assignee: Joled Inc.
    Inventor: Masakazu Takata
  • Patent number: 10134780
    Abstract: According to one embodiment, a display device includes a first substrate including a first insulative substrate, an outer peripheral wiring formed above the first insulative substrate, an insulation film disposed on the outer peripheral wiring, a pixel electrode formed on the insulation film in an active area for displaying an image, and a first bank formed in a line shape on the insulation film in a peripheral area surrounding the active area, a second substrate including at least a second insulative substrate, and a sealant which is provided in a manner to envelop the first bank, and which attaches the first substrate and the second substrate.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: November 20, 2018
    Assignee: Japan Display Inc.
    Inventor: Muneharu Akiyoshi
  • Patent number: 10134670
    Abstract: An aspect of the invention includes a method for plating wires on a wafer comprising: forming an array of integrated circuit (IC) chips having a redistribution level; forming a kerf bus, the kerf bus separating each of the IC chips from each other, the kerf bus being connected to an edge of the wafer; forming an array of wires in the redistribution level of each IC chip; electrically connecting at least one wire in the array of wires on each IC chip to the kerf bus; and electroplating the array of IC chips.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: November 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Hartswick, Anthony K. Stamper
  • Patent number: 10121785
    Abstract: Provided herein is a multi-channel finFET having a plurality of fins prepared by a process. The process includes forming a series of mandrels on hard mask layer which overlays a semiconductor layer. The semiconductor layer has areas of a first semiconductor material and a second semiconductor material in contact with the hard mask layer. The process includes applying a first conformal coating on the hard mask layer and the series of mandrels, to form spacer layer sacrificial fins. The process includes removing the first conformal coating from horizontal surfaces while retaining the first conformal coating on sidewalls of the series of mandrels. The process includes removing the series of mandrels and etching into a material of the hard mask layer using the spacer layer sacrificial fins as a mask.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: November 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sivananda K. Kanakasabapathy, Fee Li Lie, Eric Miller, Stuart A. Sieg
  • Patent number: 10112823
    Abstract: A method for forming a MEMS device is provided. The method includes providing a first wafer and a second wafer. The first wafer has a trench on a top surface of the first wafer and a fixed electrode on the bottom of the trench, and the second wafer has a polishing stop layer, a sacrificial layer, and a movable electrode. The method also includes bonding the first wafer and the second wafer with the top surface of the first wafer facing the top surface of the second wafer and the movable electrode on the second wafer located above the trench on the first wafer; removing the second wafer by polishing the second wafer from a backside of the second wafer until reaching the polishing stop layer; and releasing the movable electrode by removing a portion of the polishing stop layer and the sacrificial layer to form the MEMS device.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: October 30, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Chao Zheng, Wei Wang
  • Patent number: 10109503
    Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a carrier. The carrier has a first surface and a second surface opposite to the first surface. The carrier includes an inner core layer and an exterior clad layer, and the inner core layer is covered by the exterior clad layer.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: October 23, 2018
    Assignee: ADVANPACK SOLUTIONS PTE LTD.
    Inventors: Jimmy Hwee-Seng Chew, Oviso Dominador Jr Fortaleza, Kian-Hock Lim, Shoa-Siong Lim
  • Patent number: 10103037
    Abstract: Microelectronic systems encapsulated in a stretchable/flexible material, which is skin/bio-compatible and able to withstand environmental conditions. In one embodiment of the present description, the microelectronic system includes a microelectronic device that is substantially encapsulated in a non-permeable encapsulant, such as, butyl rubbers, ethylene propylene rubbers, fluoropolymer elastomers, or combinations thereof. In another embodiment, the microelectronic system includes a microelectronic device that is substantially encapsulated in a permeable encapsulant, such as polydimethylsiloxane, wherein a non-permeable encapsulant substantially encapsulates the permeable encapsulant.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Dilan Seneviratne, Charavana K. Gurumurthy, Ching-Ping J. Shen, Daniel N. Sobieski
  • Patent number: 10103087
    Abstract: The present invention provides a heat dissipation assembly and an electronic device, where the heat dissipation assembly includes: a shielding element, where a via hole is disposed on the shielding element, the shielding element is electrically connected to ground copper of a PCB board, and a heat-generating electronic element is disposed on the PCB board; a heat pipe, located on the via hole, where the heat pipe is electrically connected to the shielding element, and the heat pipe, the PCB board, and the shielding element form an electromagnetic shielding can that is used to accommodate the heat-generating electronic element; and an elastic thermal interface material, disposed between the heat pipe and the heat-generating electronic element and mutually fitted to the heat pipe and the heat-generating electronic element.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: October 16, 2018
    Assignee: HUAWEI DEVICE (DONGGUAN) CO., LTD.
    Inventors: Linfang Jin, Yongwang Xiao, Guoping Wang, Jie Zou, Hualin Li
  • Patent number: 10096682
    Abstract: A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: October 9, 2018
    Assignee: Intel Corporation
    Inventors: Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic, Benjamin Chu-Kung, Sherry Taft, Ravi Pillarisetty, Robert S. Chau
  • Patent number: 10096801
    Abstract: The present application discloses a display device having a metal pattern on a substrate of a display device and a light absorbing layer positioned to absorb light reflected by the metal pattern, and a manufacturing method thereof. The light absorbing layer has a pattern corresponding to at least a portion of the metal pattern.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: October 9, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yunyun Tian, Hyun Sic Choi
  • Patent number: 10087069
    Abstract: A method for forming a MEMS structure includes forming, on a MEMS substrate, an interconnect structure having conductive lines and a first conductive plug of a semiconductor material, forming an etch stop layer on the interconnect structure, forming a dielectric layer over the etch stop layer, bonding a silicon substrate over the dielectric layer, forming a second and third conductive plugs of the semiconductor material in the silicon substrate, wherein the second conductive plug is configured to be electrically coupled with the first conductive plug and third conductive plug is configured to function as an anti-stiction bump, forming a MEMS device electrically coupled with the second conductive feature, and forming a bonding pad on the silicon substrate and surrounded by the second conductive plug.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Hua Chu, Kuei-Sung Chang, Chung-Hsien Lin
  • Patent number: 10069111
    Abstract: Provided is an organic light emitting display device. An organic light emitting display device includes an organic light emitting element and a light scattering layer disposed on a bottom or a top of the organic light emitting element. The light scattering layer includes a photosensitive resin and dispersion particles dispersed in the photosensitive resin. The dispersion particles are configured to improve light extraction with respect to light emitted from the organic light emitting element and compensate a viewing angle with respect to the light emitted from the organic light emitting element.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: September 4, 2018
    Assignee: LG Display Co., Ltd.
    Inventors: Sookang Kim, KangJu Lee, Wonhoe Koo, Jihyang Jang, Hyunsoo Lim
  • Patent number: 10049925
    Abstract: Disclosed herein is a method of forming a metal-to-semiconductor contact with a doped metal oxide interlayer. An insulating layer is formed on a top surface of a semiconductor substrate with target region at the top surface of the semiconductor substrate. An opening is etched through the insulating layer with the opening exposing a top surface of a portion of the target region. A doped metal oxide interlayer is formed in the opening and contacts the top surface of the target region. The remainder of the opening is filled with a metal plug, the doped metal oxide interlayer disposed between the metal plug and the substrate. The doped metal oxide interlayer is formed from one of tin oxide, titanium oxide or zinc oxide and is doped with fluorine.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Patent number: 10038047
    Abstract: The present application discloses a light emitting diode packaging structure comprising a base substrate; a metal lead on the base substrate; a cover plate; and a seal frame sealing the cover plate and the base substrate together and forming an enclosure surrounding a display area of the base substrate. The metal lead extends from the display area outwardly and passes through below the seal frame to outside of the enclosure. The metal lead has a curved configuration in plan view of the base substrate within a region where the metal lead overlaps with the seal frame.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: July 31, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Yi Li
  • Patent number: 10038042
    Abstract: The present invention provides an OLED color display device, comprising a substrate (1), an anode (11), a thin film transistor array (21), a Hole Injection Layer (22), a Hole Transport Layer (23), a light emitting layer (3), an Electron Transport Layer (24), a cathode (12), a package cover plate (2), a color conversion layer (4) and a seal frame (5); the light emitting layer (3) comprises a first light emitting layer (31) and the second light emitting layer (32), and both the first light emitting layer (31) and the second light emitting layer (32) are manufactured by host material doped with guest material, and the guest material comprises luminescent material and electron transport material; the first light emitting layer (31) is a blue light emitting layer, and the second light emitting layer (32) is a red, green lights commonly emitting layer, a yellow light emitting layer or a green light emitting layer; lights emitted by the first light emitting layer (31) and the second light emitting layer (32) synthes
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: July 31, 2018
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yawei Liu, Yifan Wang
  • Patent number: 10033009
    Abstract: Embodiments of the present invention relate to a technical field of display device and provide a bearing frame for a display panel and a display device, which can reduce the occurrence of the damage of the display panel by the vibration when transporting and assembling the display panel and thus increase the useful life of the display device. The bearing frame for a display panel comprises a bottom plate and a plurality of side plates, the bottom plate and the plurality of side plates enclosing a bearing space for accommodating the display panel, wherein an accommodating slot is disposed in the bottom plate and a cushion is disposed in the accommodating slot, and the thickness of the cushion is no less than the depth of the accommodating slot.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: July 24, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zifeng Wang, Yan Ren
  • Patent number: 10025026
    Abstract: A device according to embodiments of the invention includes a waveguide, typically formed from a first section of transparent material. A light source is disposed proximate a bottom surface of the waveguide. The light source comprises a semiconductor light emitting diode and a second section of transparent material disposed between the semiconductor light emitting diode and the waveguide. Sidewalls of the second section of transparent material are reflective. A surface to be illuminated is disposed proximate a top surface of the waveguide. In some embodiments, an edge of the waveguide is curved.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: July 17, 2018
    Assignee: LUMILEDS LLC
    Inventor: Serge J. Bierhuizen
  • Patent number: 10026784
    Abstract: The present application discloses a display panel comprising a light emitting region comprising a plurality of light emitting units. Each of the plurality of light emitting units comprising a first sub-pixel comprising a first emissive layer of a first light emitting material for emitting light of a first color; a second sub-pixel comprising a second emissive layer of a second light emitting material for emitting light of a second color; and a third sub-pixel comprising a third emissive layer comprising the first light emitting material and the second light emitting material in vertical stack.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: July 17, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jiuxia Yang, Jiantao Liu, Feng Bai
  • Patent number: 10008684
    Abstract: An organic light-emitting device, including a first sub-organic light-emitting device including a first emission layer, a first common emission part, a first buffer part, a first doping part, and a first cathode part, sequentially stacked; a second sub-organic light-emitting device including a second emission layer, a second common emission part, a second buffer part, a second doping part, and a second cathode part, sequentially stacked; and a third sub-organic light-emitting device including a third common emission part, a third buffer part, a third doping part, and a third cathode part, sequentially stacked, the first through third common emission parts integrated with one another as one body, the first through third buffer parts integrated with one another as one body, the first through third doping parts integrated with one another as one body, and the first through third cathode parts integrated with one another as one body.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: June 26, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sangwoo Pyo, Jihwan Yoon, Hyoyeon Kim
  • Patent number: 10002580
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: June 19, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda, Takuro Ohmaru, Jun Koyama