Abstract: A service clock regenerator regenerates a local clock from time stamps of a remote clock transmitted over a network by determining the slope of (or difference between current and previous) time stamps of the remote clock and the slope of time stamps of the local clock. A phase difference is formed as the difference between the slope of the time stamps of the remote clock and the slope of the time stamps of the local clock and this phase difference is accumulated to generate a phase error signal. The phase error signal is filtered to generate a frequency adjustment signal having a magnitude that depends on the phase error signal. The frequency of the local clock is adjusted according to the magnitude of the frequency adjustment signal thereby reducing a phase difference between the remote time stamps and the local time stamps.

Abstract: An improvement to a half duplex multipoint communication environment wherein a digital subscriber line (DSL) receiver employs an adaptive comb filter and a decision feedback equalizer (DFE) to efficiently suppress or eliminate low frequency periodic impulse noise and crosstalk generated in the vicinity of the device receiver.

Abstract: The process of synchronizing matching circuits of a communication system having modules connected with each other by serial data lines includes providing a transmitter and a receiver in each module as an interface between the serial data lines and a matching circuit; synchronizing at least one other matching circuit with a synchronizing matching circuit and transmitting the required synchronizing signals over the serial data lines; supplying parallel signals from the synchronizing matching circuit to the transmitter connected thereto and converting those parallel signals into serial signals in that transmitter; feeding the serial signals over the serial data lines to the receivers connected with the at least one other matching circuit, converting the serial signals into other parallel signals in those receivers and supplying the other parallel signals to the at least one other matching circuit connected with the receivers; generating an error signal in each receiver on detection of a transmission error; and r

Abstract: A digital receiver (200) and transmitter (300), wherein the digital receiver includes a plurality of antennas (202) for receiving uplink radio frequency signals; a plurality of analog to digital converters (210) for converting the received radio frequency signals into digital signals; a switched digital down converter (214) for down converting one of the digital signals to a baseband IF signal; and a channel processor (228) for recovering one of a plurality of communication channels contained within the baseband IF signal.

Abstract: A digital phase-locked loop (1) has a counter (4) which counts pulses from a voltage controlled oscillator (8). The counter (4) is latched periodically with a period which is determined by an input signal (I) to the counter (4). The latched value is supplied to a compensation unit (5) which deducts a value which approximately corresponds to half the count counted by the counter circuit (4) when the phase lock is locked correctly. The compensated counts are supplied from the output of the compensation unit (5) to an integrator (6) and counter (9) which applies a control signal to the voltage controlled oscillator (8) via a D/A converter.

Abstract: A method, executed in a microprocessor, for providing a shift-and-add mask, M=m.sub.1, m.sub.2, . . . , m.sub.N-1, m.sub.N, for a pseudo-noise sequence generator ("PNSG"). The PNSG generates a first pseudo-noise ("PN") code, and has N stages, each stage being at one of two states. The PNSG also has an associated shifter for generating a shifted PN code which is the same code as the first PN code, but delayed by K chips. The shifted PN code is generated as the inner product of the shift-and-add mask with the states of the stages of the PNSG. According to the inventive method, a value of K is provided, and it is determined whether K is 0. If K is 0, M is provided such that m.sub.N =1 and, for all n.noteq.N, m.sub.n =0. However, if K is not 0, it is determined whether K is greater than N. If K is greater than N, the remainder, R, of the division D.sup.K-1 /f(D), is determined, whereD.sup.K-1 =(m.sub.1 c.sub.1 +m.sub.2 c.sub.2 + . . . +m.sub.N c.sub.N)+(m.sub.2 c.sub.1 +m.sub.3 c.sub.2 + . . . +m.sub.N c.sub.

Abstract: A radio data communication device that can perform a packet communication with the packet configuration suitable for transmission of a large volume of data in packet communications utilizing a low rate transmission mode and a high rate transmission mode. The transmitter side transmits packets only in a low rate mode or in a high rate mode after transmission in a low rate mode or only in a high rate mode. The receiver side simultaneously demodulates packets in the low rate mode and the high rate mode to detect the synchronous signal for each mode and judges whether or not in which mode the data has been transmitted, thus selecting the successive receive mode.

Abstract: A system for transmitting and receiving spread-spectrum communications without having to synchronize the incoming spread-spectrum code at a receiver with a copy of the spreading sequence. A spreading signal itself is modulated with an information signal. Consequently, the various demodulation techniques available to the receiver enable the transmission of unmodified analog as well as digital data. The receiver first removes the carrier wave component, and then the spreading signal from the information stream without costly and complex synchronization of the spreading signals.

Abstract: The present invention discloses a timing phase control apparatus which is particularly suitable for use in a modem used for very high speed data transmission employing a metallic line. The timing phase control apparatus includes a timing phase extracting portion to extract timing phase information from an input signal, a timing phase control filter portion to make a timing phase control to the input signal depending upon the timing phase information from the timing phase extracting portion through filter processing using a coefficient operation having a preset impulse response characteristic, and a filter processing coefficient determining portion to determine a coefficient used for the filter processing in the timing phase control filter portion depending upon the timing phase information and information about an approximate expression of the impulse response characteristic.

Abstract: A method of extracting an information bearing signal .omega.(n) from a base-band signal in the form of an inverse function with a digital signal processor. The processor includes memory and utilizes a minimum number of instructions stored in the memory. The base-band waveform comprises a plurality of complex-valued samples having respective I and Q components. The method includes the steps of receiving a first sample at an instant n having respective I(n) and Q(n) components and defining an interval for evaluating potential values for the I(n) and Q(n) components. Next, a step of transforming said I(n) and Q(n) components is performed to have respective threshold values residing in the predefined interval. Then, a step of estimating the transformed components with a series of non-inverted polynomial functions is carried out over the predefined interval.

Abstract: A method for reducing signal degradation in a Digital Loop Carrier System by removing signaling information normally embedded continuously in digital information being conveyed over the system. The system remains in this signaling free communication mode until it detects a change in its supervisory condition requiring that it exit from the signaling free communication mode or terminate communication allowing the system to enter an idle mode.

Abstract: The present invention relates to a signal reproducing method and a signal reproducing apparatus for reproducing a signal recorded by a high-density recording. The invention avoids deteriorating the performance of an ML detector while suppressing the equalization loss and the correlation noise. The signal reproducing method includes steps of generating a first signal using a first selected number of convolutions, generating a second signal using a second selected number of convolutions, and combining the first and second signals to identify the information in the input signal. The first and second signals can be processed by adding or subtracting the first and second signals, depending on the circuit configuration. With this invention, the number of convolution steps is reduced, and it is possible to reduce equalization loss and correlation noise using circuits having a small circuit scale.

Abstract: In a process for demodulation of a received signal that contains, in addition to data to be transmitted, a preset synchronization sequence, the following is done to estimate a frequency shift. At least two nonoverlapping partial sequences of the synchronization sequence are picked off. Using a least-square process, the coefficients of the channel step response at each observation window are determined. The frequency shift, in the form of a phase rotation per symbol, is then estimated.

Abstract: The invention relates to a method for pinpointing an interruption in a link for transmitting digital signals between a first station and a second station on the basis of the times of occurrence of signal changes on the link. In accordance with the invention, the method is characterised by generating signal changes after the link has been restored. Preferably, the time of restoration is determined on the basis of data signals received, and a detection signal is fed to the link after the determination of the time of restoration. On the basis of the difference in time of observing restoration and of receiving a detection signal, the location of the interruption is determined. For this purpose, the length of the link need not be known.

Abstract: A trellis-coded modulation (TCM) decoder of a high-definition television (HDTV) receiver is disclosed for use in US-type terrestrial broadcasting, as is a corresponding decoding method. The TCM decoder optionally uses a NTSC-reject comb filter to remove the interference from a co-channel NTSC-type signal. When the input HDTV signal has been passed through the NTSC rejection filter, an 8-state decoding mode is appropriate and a segment sync suspension unit is used to directly connect the data before and after a twelve symbol segment sync. When the input HDTV signal has not been passed through the NTSC rejection filter, an 4-state decoding mode is appropriate and the input HDTV signal is passed unchanged (i.e., without use of the segment sync suspension unit). A field delay directly connects the data of the data segment just before the field sync segment to the data of the data segment just after the field sync segment.

Abstract: A method and an arrangement for synchronizing a receiver for digital signals are described. The synchronizing information is derived from the center of distribution of the squared channel impulse response, which center of distribution is calculated directly from the sampling values of the channel frequency response. Thus a separate calculation of the channel impulse response via an inverse Fourier transform from the channel frequency response is unnecessary. The channel frequency response can be determined in a simple way by correlation of a received signal with a reference signal stored in memory in the receiver.

Abstract: A digital modulator and digital demodulator with quadrature amplitude modulation (QAM) schemes, which are designed to modulate or demodulate RZ-coded baseband signals. The digital modulator comprises first to fourth roll-off filters and a first and second inverters connected to the second and fourth roll-off filters. It also comprises a parallel-to-serial converter to successively selects the outputs of the first roll-off filter, third roll-off filter, first inverter, and second inverter. A D/A converter converts the selected digital signal stream into an analog signal. The roll-off filters and inverters operate at a predetermined clock frequency, while the parallel-to-serial converter and the D/A converter work at a frequency four times the predetermined clock frequency. The digital demodulator reverses the above modulation process to reproduce the baseband signals.

Abstract: A frequency synthesizer circuit comprises a controller, a synthesizer and a voltage controlled oscillator are used to generate an oscillating signal in response to external commands. The synthesizer provides a lock detect signal to the controller when the synthesizer detects that the oscillating signal has reached a desired frequency following application of a load signal. A first timer, a second timer, and a counter are adapted to receive the load signal and the lock detect signal. The first timer provides a first measurement corresponding to an amount of time between the load signal and a first receipt of the lock detect signal. The second timer provides a second measurement corresponding to an amount of time between the load signal and a final receipt of the lock detect signal. The counter provides a count value corresponding to a total number of times that the lock detect signal is received inclusive of the first receipt and the final receipt of the lock detect signal.

Abstract: A transmission apparatus which can realize high demodulation efficiency even in the case where the channel characteristic is deteriorated. The same pattern data as those of the known pattern data contained in the transmitting data to be transmitted to the channel is generated on the receiving side and the correlation between said pattern data and the receiving data to be received through the channel is obtained. Then, the channel characteristic is successively estimated based on the correlation value and the receiving data will be demodulated depending upon said estimated result. Thus, since the channel characteristic can be estimated based on the receiving data, the data can be demodulated correctly even in the case where the receiving data is distorted due to the characteristic deterioration.

Abstract: A digital television signal includes successive frames of two fields each comprising 313 data segments with the first data segment in each field functioning as a field sync. The field sync segment comprises a 511 PN sequence and three 63 pseudo-random number (PN) sequences, with the middle one of the 63 PN sequences alternating polarity in successive fields. A reference data segment is compared with the 511 PN sequence in each data segment and the data segment with the least number of errors is identified as the first data segment in the field. The corresponding portion of the reference segment is compared with the middle 63 PN sequences in the identified first data segments and that with the least number of errors is determined to be the first segment in the frame. Confidence counters are used to assure reliable determinations.