Patents Examined by Andargie M Aychillhum
  • Patent number: 11896394
    Abstract: An apparatus and method to reliably attach an electronic module to a textile. The overall mechanical assembly of the invention includes: (a) light pipe, (b) top enclosure, (b) magnet, (c) main electronics which contains (d) the main PCB, (e) battery and (f) other electronic components, (g) bottom enclosure, which holds (h) the connector PCB, (i) module dock, (j) top textile PCB which are located above the (j) textile band and under the (k) textile pocket and the (l) bottom textile PCB and (m) fabric and laminate padding, which are located below the textile band. The invention is physically embodied by an electronic module, comprising at least one printed circuit board (PCB), comprising at least one conductive circuit and at least one electronic component; a metallic rivet, grommet or eyelet to mechanically and electrically connect the; and a textile substrate with at least one electrically conductive circuit.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: February 13, 2024
    Inventors: Tony Chahine, Steve Aitken, Adrian Philip Straka, Milad Alizadeh-Meghrazi
  • Patent number: 11894352
    Abstract: A power electronic module is provided that includes an electrical connection on opposing surfaces of an electronic component that allows a high current path from a top board to a bottom board through the body of the electronic component thus improving the power electronic module's electrical resistance and reducing the current load on the connector structure which is located between the first substrate and the second substrate. The power electronic module further includes a semiconductor component positioned on an external surface of the top board which allows for thermal contact of the semiconductor component with an external heat sink thus providing an efficient system thermal management via a reduced heat dissipation path. Additional heat dissipation can be obtained by disposing a metallic spacer on the semiconductor component of the power electronic module of the present disclosure.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: February 6, 2024
    Assignee: Renesas Electronics America Inc.
    Inventors: Sri Ganesh A Tharumalingam, Mark Kwoka, Viresh Piyush Patel, Peter Zhizheng Liu, Jeff Strang
  • Patent number: 11889626
    Abstract: An electronic device is provided. The electronic device comprises an interposer disposed between first circuit board and second circuit board, and including an opening area and for accommodating the at least one electronic component, and the interposer comprises a board including an inner surface that faces the opening area and an outer surface that faces an opposite direction to the inner surface, wherein the outer surface is formed in a convexo-concave form having a plurality of first concave areas and a plurality of first concave areas, and a side conductive member disposed on the first concave areas and the first concave areas of the outer surface, and formed along the convexo-concave form of the outer surface.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: January 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyungho Lee, Yunoh Chi
  • Patent number: 11889619
    Abstract: A power splitter for a smart card having near field RF communications capability, the power splitter comprising a substrate for integration into said smart card; a first port for connection to a near field RF communications antenna for receiving an alternating electrical signal; a second port for connection to an auxiliary rectifier; and a third port for connection to a near field RF communicator; wherein the splitter comprises a impedance network, connected between the three ports, and being arranged to divide the alternating electrical signal between the second port and the third port to split the alternating electrical signal, wherein the impedance network comprises a printed coil inductor, and a zone of the substrate surrounding the printed coil inductor is free from any ground plane.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: January 30, 2024
    Assignee: FREEVOLT TECHNOLOGIES LIMITED
    Inventors: Victor Diaz, Vitor Freitas, Sebastian Litwinow, Alison Lloyd
  • Patent number: 11889628
    Abstract: Disclosed is an electronic control device using a connector-integrated housing and a bendable printed circuit board. The electronic control device according to an exemplary embodiment of the present invention includes: a housing including a first body formed with an opening at one side and a second body connected with the first body through a hinge part, the opening being closed according to a rotation of the second body; a printed circuit board including a first substrate part and a second substrate part connected through a flexible connection part; and a connector coupled to the second body, in which the first substrate part is inserted into the first body, and the second substrate part is coupled with the connector to be connected with the second body.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: January 30, 2024
    Assignee: Hyundai Kefico Corporation
    Inventor: Wankyu Lee
  • Patent number: 11882660
    Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: January 23, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Fan Chen, Chien-Hao Wang
  • Patent number: 11881643
    Abstract: Provided is an electrical connection member including a conductive member made of a rubber-like elastic material, through which a terminal used for supplying power is mounted to a mounted member such as a glass plate, and electrically connected with a small electric resistance to contact member provided in the mounted member, resulting in less reduction of rubber-like elasticity of the conductive member due to a temperature increase of the electrical connection member, even if large current flows. With respect to the conductive member 11 made of the rubber-like elastic material provided in the electrical connection member 10, a compression set measured after the following treatment is 50% or less, the treatment being comprise applying a load between an upper surface and a lower surface of the conductive member and conducting 25% compressive deformation at 105° C. for 22 hours; and electric resistance between the upper surface and the lower surface is 0.1? or less during application of the load.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: January 23, 2024
    Assignee: SEKISUI POLYMATECH CO., LTD.
    Inventors: Hideaki Konno, Yasuyoshi Watanabe, Tsubasa Kamiya
  • Patent number: 11882657
    Abstract: The present disclosure relates to a circuit board structure, display panel, display device and manufacturing method. The circuit board structure includes a circuit board body, a first connection part, a second connection part and a connection circuit board. An accommodating hole is disposed on the circuit board body. The first connection part is disposed on the circuit board body and located at a side of the accommodating hole. The second connection part is disposed on the circuit board body and located at a side of the accommodating hole away from the first connection part. The connection circuit board is provided with a plurality of connection wires thereon, and the connection wires conductively connect the first and second connection parts. An orthographic projection of the connection circuit board on the circuit board body is not overlapped with that of the accommodating hole on the circuit board body.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: January 23, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shuang Lei, Fei Li, Jiaxiang Wang, Bowen Xiao, Huan Meng, Binfeng Feng
  • Patent number: 11882659
    Abstract: A chip substrate includes a base substrate having a plurality of base circuit traces mounted thereon for supporting a chip assembly and an intermediate substrate mounted on the base substrate adjacent the plurality of base circuit traces. The intermediate substrate has a plurality of intermediate circuit traces mounted thereon. Each of the plurality of intermediate circuit traces are wirebonded to a respective one of the plurality of base circuit traces and the plurality of intermediate circuit traces are configured to be electrically coupled to an external device. For example, each of the plurality of intermediate circuit traces may be wirebonded to a respective one of a plurality of feedthrough circuit traces mounted on a feedthrough device.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: January 23, 2024
    Assignee: Raytheon Company
    Inventors: Thomas Sprafke, Stephen Marinsek
  • Patent number: 11882647
    Abstract: A structure for delivering power is described. In some embodiments, the structure can include conductors disposed on two or more layers. Specifically, the structure can include a first set of interdigitated conductors disposed on a first layer and oriented substantially along an expected direction of current flow. At least one conductor in the first set of interdigitated conductors may be maintained at a first voltage, and at least one conductor in the first set of interdigitated conductors may be maintained at a second voltage, wherein the second voltage is different from the first voltage. The structure may further include a conducting structure disposed on a second layer, wherein the second layer is different from the first layer, and wherein at least one conductor in the conducting structure is maintained at the first voltage.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: January 23, 2024
    Assignee: Rambus Inc.
    Inventors: Kyung Suk Oh, Ralf M. Schmitt, Yijiong Feng
  • Patent number: 11877399
    Abstract: The present disclosure relates to a printed circuit board assembly, which includes: a first printed circuit board, printed with a first transmission trace; a second printed circuit board, printed with a second transmission trace; a substrate, in which, the provides a through aperture for a radio frequency connector; and a radio frequency connector, which includes an inner contact portion, an housing and an insulating part provided between the inner contact portion and housing, where the radio frequency connector is configured to be received in and pass through the through aperture, such that a first end of the inner contact portion of the radio frequency connector is electrically connected to the first transmission trace and a second end thereof is electrically connected to the second transmission trace, so that a first end of the housing of the radio frequency connector is electrically connected to a ground layer of the first printed circuit board and a second end thereof is electrically connected to the gro
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: January 16, 2024
    Assignee: CommScope Technologies LLC
    Inventors: Runmiao Wu, Hangsheng Wen, Xun Zhang
  • Patent number: 11869544
    Abstract: An electronic device with parallel backplanes and a storage device with parallel backplanes. The electronic device includes a front inserting assembly, a rear inserting assembly, and a backplane assembly. The backplane assembly is connected to the front inserting assembly and the rear inserting assembly. The backplane assembly includes a plurality of backplanes arranged in parallel at intervals, the front inserting assembly includes a plurality of first units whose arrangement direction is the same as an arrangement direction of the backplanes, and the rear inserting assembly includes a plurality of second units whose arrangement direction intersects the arrangement direction of the backplanes. The backplane assembly is provided with the structure including the plurality of backplanes arranged in parallel at intervals and the channel between adjacent backplanes. In addition, the first units and the second units are connected to two opposite sides of the backplanes, respectively.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: January 9, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Na Wang, Can Chen, Yinzhong Tang
  • Patent number: 11871508
    Abstract: There is provided a radio-frequency module and a communication device with which miniaturization can be achieved and quality deterioration can be suppressed. A radio-frequency module includes a mount board on which a ground terminal is disposed, a first chip, a second chip, and a cover (a shield cover). The first chip is disposed on the mount board. The second chip is disposed on the first chip. The cover covers at least a part of the first chip and at least a part of the second chip. The second chip has a first connection terminal (a ground terminal) on an opposite side from the first chip in a thickness direction of the mount board. The cover includes a shield layer connected to the ground terminal disposed on the mount board. The first connection terminal is connected to the shield layer.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: January 9, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takayuki Oshima
  • Patent number: 11864328
    Abstract: An FPC connection structure including: several strands of FPC conductor patterns coated with an insulating film; and FPC terminals each extending from one end portion of each of the FPC conductor patterns and provided in a flat type to enable spot welding on a substrate terminal unit provided on the printed circuit board.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: January 2, 2024
    Inventor: Dong-Kwan Jang
  • Patent number: 11855415
    Abstract: To reduce crosstalk between bond wires, one illustrative integrated circuit includes an array of photoemitters arranged along a centerline, with adjacent photoemitters having contact pads on opposite sides of the centerline. An illustrative assembly includes an integrated circuit chip having an array of photoemitter contact pads; a printed circuit board having a recess in which the integrated circuit chip is mounted; and bond wires connecting the contact pads with respective contact pads on the printed circuit board. An illustrative cable connector includes a module that optically couples optical fibers to an array of photoemitters on an integrated circuit chip mounted to a printed circuit board. Each photoemitter has contact pads connected to the printed circuit board contact pads by bond wires, the bond wires for each photoemitter being routed in an opposite direction relative to the bond wires for any adjacent photoemitters in the array.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 26, 2023
    Assignee: Credo Technology Group Limited
    Inventors: Xike Liu, Shuiqing Huang, Rui Gao
  • Patent number: 11855551
    Abstract: A power electronics converter includes a carrier substrate, and a converter commutation cell including a power circuit. The power circuit includes a power semiconductor switching element included in a power semiconductor prepackage. The power semiconductor prepackage includes a power semiconductor switching element and an electrical connection extending from a terminal of the power semiconductor switching element to an electrical connection side of the power semiconductor prepackage. The power electronics converter includes a heat sink arranged to remove heat from the power semiconductor prepackage, a thermal interface layer arranged between the heat removal side of the power semiconductor prepackage and the heat sink, and an electrical isolation layer arranged between the power semiconductor switching element and the heat sink. A product of a thermal conductivity of the thermal interface layer and a breakdown electric field strength of the electrical isolation layer is greater than or equal to 5 MVW/m2K.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: December 26, 2023
    Assignee: Rolls-Royce Deutschland Ltd & Co KG B
    Inventors: Uwe Waltrich, Stanley Buchert, Marco Bohlländer, Claus Müller
  • Patent number: 11856701
    Abstract: A printed circuit board includes: a first insulating layer including a first cavity and a second cavity; a first electronic component disposed in the first cavity and including a first pad disposed in a first surface direction of the first insulating layer; a second electronic component disposed in the second cavity and including a second pad disposed in a second surface direction, facing the first surface direction, of the first insulating layer; a second insulating layer disposed on each of first and second surfaces of the first insulating layer and in the first cavity to cover the first electronic component; and a third insulating layer disposed on the first surface of the first insulating layer and in the second cavity to cover the second electronic component.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: December 26, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyun Woo Kwon, Ki Ran Park, Kyeong Yub Jung, Jin Uk Lee, Jae Heun Lee
  • Patent number: 11849546
    Abstract: A printed circuit board which improves the peel strength of a wiring pattern formed at a cavity bottom portion while enabling connection between an electronic component inside a cavity and a circuit outside the cavity to be performed at the cavity bottom portion, includes a cavity in a partial region of a multilayer substrate laminated with an insulating resin layer and an electrical conductor layer on a bottom layer of an insulating resin substrate. The cavity opens on a side of the insulating resin substrate, penetrates the insulating resin substrate, and includes a surface of the insulating resin layer as a bottom surface. The electrical conductor layer has a surface, the surface having a height equivalent to a height of the surface of the insulating resin layer and being embedded in the insulating resin layer in a manner to form a portion of the bottom surface.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: December 19, 2023
    Assignee: KYOCERA Corporation
    Inventors: Atsuo Kawagoe, Naoki Asaba
  • Patent number: 11842893
    Abstract: A printed circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on the first insulating layer and including a cavity; and a pad disposed on the first insulating layer and exposed through the cavity; wherein the second insulating layer includes a first portion disposed on an upper surface of the first insulating layer in a region where the cavity is formed; and a second portion other than the first portion, and wherein a thickness of the first portion is smaller than a thickness of the second portion.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: December 12, 2023
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Se Woong Na, Se Ho Myeong
  • Patent number: 11844176
    Abstract: A printed circuit board includes: a base substrate; a pad region having a plurality of pad patterns disposed on one surface of the base substrate; and a dummy region having a plurality of conductive dummy patterns separated from the plurality of pad patterns to be disposed on the one surface of the base substrate. The pad region includes a first edge region, and a second edge region disposed in a diagonal direction of the first edge region on the one surface of the base substrate. The dummy region includes a third edge region, and a fourth edge region disposed in a diagonal direction of the third edge region on the one surface of the base substrate.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: December 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jonghyun Seok, Kyeongseon Park