Patents Examined by Andargie M Aychillhum
  • Patent number: 11626357
    Abstract: 3D electrical integration is provided by connecting several component carriers to a single substrate using contacts at the edges of the component carriers making contact to a 2D contact array (e.g., a ball grid array or the like) on the substrate. The resulting integration of components on the component carriers is 3D, thereby providing much higher integration density than in 2D approaches.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 11, 2023
    Assignee: FormFactor, Inc.
    Inventors: Roy J. Henson, Shawn O. Powell
  • Patent number: 11612058
    Abstract: A module assembly is attached on a headlining of a vehicle and includes a base where an upper portion thereof is open, a first printed circuit board (PCB) and a second PCB sequentially stacked on a plurality of supporting pillars extending in a vertical direction to an inner bottom surface of the base and electrically connected to each other by a flexible cable, and a cover assembled with the base to cover the first and second PCBs stacked on the base.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: March 21, 2023
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Myeong Nam Woo, Uhn Yong Shin
  • Patent number: 11596069
    Abstract: A connector assembly for connecting an upper circuit board to a lower circuit board is disclosed. The upper circuit board includes a series of fastener holes for a fastening device allowing attachment to the lower circuit board. The connector assembly has a support bracket with access holes aligned with the holes of the upper circuit board. The support bracket is configurable to be positioned over the upper circuit board. The connector assembly has a moveable cover bracket having a series of access holes. The cover bracket is suspended between the support bracket and the cover bracket. The cover bracket is moveable between an open position aligning the access holes with the access holes of the support bracket, and a closed position. In the closed position, the cover bracket blocks access between the access holes of the support bracket and the holes of the upper circuit board.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: February 28, 2023
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Chih-Hsiang Lee, Hou-Hsien Chang, Wei-Chih Hung
  • Patent number: 11589461
    Abstract: A flexible printed circuit and a manufacturing method thereof, an electronic device module and an electronic device are provided.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: February 21, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Ren Xiong, Qiang Tang
  • Patent number: 11589460
    Abstract: A multilayer printed circuit board including a first printed circuit board portion, including a first inserting connector, including a plurality of contacts for creating a first removable bus connection; a second printed circuit board portion, including a second inserting connector, including a plurality of contacts for creating a second removable bus connection; a third printed circuit board portion, connected between the first printed circuit board portion and to the second printed circuit board portion, wherein a rigidity of the third printed circuit board portion is less than a rigidity of each of the first printed circuit board portion and the second printed circuit board portion; wherein the multilayer printed circuit board is foldable along the third printed circuit board portion and, if so folded, the first printed circuit board portion is arranged on top of the second printed circuit board portion.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: February 21, 2023
    Assignee: INTEL CORPORATION
    Inventors: Tin Poay Chuah, Min Suet Lim, Chee Chun Yee, Yew San Lim, Eng Huat Goh
  • Patent number: 11582873
    Abstract: The present invention relates to a substrate unit and a substrate assembly, and a camera module using the same. The present invention may comprise: a first substrate part having rigidity; a second substrate part stacked on one surface of the first substrate part and having flexibility; a third substrate part extending outwardly from the second substrate part and having flexibility; and a reinforcing part which is disposed at a portion where the edge portions of the first substrate part and the third substrate part meet, the reinforcing part having a recessed portion which is formed by recessing the first substrate part inwardly so as to inhibit interference between the first substrate part and the third substrate part. The present invention is capable of resolving the interference between a rigid PCB and a flexible PCB and the tearing thereof by providing a reinforcing part in a connection portion of the rigid PCB and the flexible PCB.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: February 14, 2023
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hyun Woo Ryou
  • Patent number: 11582862
    Abstract: A high-speed circuit includes a printed circuit board, a ground plane layer, a pair of first and second differential traces, and a cascading common mode filter. The printed circuit board has a first surface and an opposite second surface. The ground plane layer has a first surface in contact with the second surface of the printed circuit board. The pair of first and second differential traces are on the first surface of the printed circuit board. The first and second differential traces carry an electrical signal. The cascading common mode filter includes an outer and an inner common mode filter. The outer common mode filter includes a U-shaped void section on the first surface of the ground plane layer. The inner common mode filter includes an H-shaped void section on the first surface of the ground plane layer. The H-shaped void section is located proximate to the U-shaped void section.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: February 14, 2023
    Assignee: QUANTA COMPUTER INC.
    Inventor: Che-Wei Chang
  • Patent number: 11582861
    Abstract: An electronic device includes a circuit board and an electric element mounted on the circuit board. The electric element includes a multilayer body made of electrically insulating base materials, a transmission line portion, and connection portions. The transmission line portion and the connection portions are provided in the multilayer body. Each of the connection portions is continuous with a corresponding portion of the transmission line portion, and is connected to the circuit board by an electrically conductive bonding material. The transmission line portion other than the connection portions is not electrically connected to an electronic component on the circuit board. The electronic component not electrically connected to the electric element is disposed between the transmission line portion of the electric element and the circuit board.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 14, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takahiro Baba, Kosuke Nishino
  • Patent number: 11569565
    Abstract: Disclosed is an electronic device comprising a first component, a second component, and a signal path interface coupled between the first component and the second component, the signal path interface including a printed circuit board (PCB) having a rigid PCB portion and a flexible PCB portion, wherein a first signal line and a second signal line extend through the rigid PCB portion and the flexible PCB portion for transmitting signals from the first component to the second components, and a plurality of ground lines extend through the rigid PCB portion and the flexible PCB portion, and wherein each of the plurality of ground lines extending through the rigid PCB portion is connected to one or more conductive layers through conductive vias.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: January 31, 2023
    Inventors: Han-Min Cho, Chan-Gi Park, Yeon-Sang Yun, Tae-Wook Ham, Hei-Seong Kwak, Byoung-Il Son, Sung-Chul Park
  • Patent number: 11570904
    Abstract: A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed. A first permanent resist layer is applied to one contact side of the PCB. The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component. A second permanent resist layer is applied onto the structured first permanent resist layer. The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks. The exposures are chemically coated with copper the copper is electric-plated to the exposures. Excess copper in the areas between the exposures is removed.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: January 31, 2023
    Assignee: AT&S Austria Technologie & Systemtechnik
    Inventors: Wolfgang Schrittwieser, Mike Morianz, Alexander Kasper, Erich Preiner, Thomas Krivec
  • Patent number: 11569174
    Abstract: A power module includes a power substrate, a number of power semiconductor die, and a number of connector pins. The power substrate includes a number of conductive traces. The power semiconductor die are mounted on the power substrate and electrically coupled to the conductive traces. The connector pins are each electrically coupled to a different one of the conductive traces and configured to be interconnected such that the power semiconductor die provide an active front-end and a switching power converter. By providing the power semiconductor die such that they can be interconnected to form an active front-end and a switching power converter in the same power module, the power module may provide a significantly more compact power converter system using both an active front-end and switching power converter.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: January 31, 2023
    Assignee: WOLFSPEED, INC.
    Inventors: Daniel John Martin, Brett Edward Sparkman, Ty McNutt, Paul Wheeler
  • Patent number: 11570905
    Abstract: A method of manufacturing component carriers is disclosed. The method includes providing a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, forming a first hole in a core of the stack and subsequently embedding a first component in the first hole, thereafter forming a second hole in the same core of the stack and subsequently embedding a second component in the second hole. A component carrier has a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A first hole is formed in a core of the stack. A first component is embedded in the first hole. A second hole is formed in the same core of the stack and subsequently a second component is embedded in the second hole.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: January 31, 2023
    Assignee: AT&S(Chongqing) Company Limited
    Inventor: Artan Baftiri
  • Patent number: 11570925
    Abstract: A connection device includes a housing having a first face provided with a first opening that is closed by a PCB, and a second face provided with a second opening facing at least one electrical connection interface of the PCB. The housing includes at least one well extending from an edge of the second opening to the PCB so as to position a first connector relative to the connection interface, and in that the housing is a one-piece part that includes the well.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: January 31, 2023
    Assignee: SAFRAN ELECTRONICS & DEFENSE
    Inventors: François Guillot, Marvin Doreau, Louis-Théophile Thirion
  • Patent number: 11569340
    Abstract: Isolators for signals and/or powers transmitted between two circuits configured to operate at different voltage domains are provided. The isolators may have working voltages, for example, higher than 500 Vrms, higher than 1000 Vrms, or between 333 Vrms and 1800 Vrms. The isolators may have a fully symmetrical configuration. The isolators may include a primary winding coupled to a driver and a secondary winding coupled to a receiver. The primary and secondary windings may be laterally coupled to and galvanically isolated from each other. The primary and secondary windings may include concentric traces. The primary and secondary windings may be fabricated using a single metallization layer on a substrate.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: January 31, 2023
    Assignee: Analog Devices, Inc.
    Inventors: Ruida Yun, Allison Claudette Lemus
  • Patent number: 11564318
    Abstract: A voltage regulator module includes a circuit board, a first component and a switching circuit assembly. The circuit board includes a first surface, a second surface, a concave structure and a contact pad. The first surface and the second surface are opposed to each other. The concave structure is disposed in the circuit board and concavely formed on the second surface. The contact pad is formed on the second surface and served as at least one of a positive output terminal, a negative output terminal and a positive input terminal. The concave structure and the contact pad are misaligned to each other. The first component is at least partly disposed within the concave structure. The switching circuit assembly is disposed on the first surface and electrically connected with the contact pad and the first component.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: January 24, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Da Jin, Yahong Xiong, Qinghua Su
  • Patent number: 11553603
    Abstract: A method includes preparing a first substrate member in which a cavity is formed. Moreover, the method includes preparing a magnetic member having a plurality of magnetic pieces. The magnetic member is placed in the cavity, and the second substrate member is placed on the first substrate member to close the cavity. The cavity is defined at least in part by a pair of wall surfaces facing each other in a lateral direction and opens upward in an up-down direction perpendicular to the lateral direction. The magnetic pieces are coupled with each other by positioning members so as to be arranged at regular intervals in a predetermined direction. The placing of the magnetic member in the cavity is carried out so that the predetermined direction coincides with the lateral direction or a front-rear direction perpendicular to both of the lateral direction and the up-down direction.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: January 10, 2023
    Assignee: TOKIN CORPORATION
    Inventor: Hiroshi Shima
  • Patent number: 11553598
    Abstract: An integrated electro-optical circuit board comprises a first flexible substrate having a top side and a bottom side, at least one first optical circuit on the bottom side of the first flexible substrate connected to the top surface through a filled via, at least one first metal trace on the top side of the first flexible substrate, an optical adhesive layer connecting the bottom side of the first flexible substrate to a top side of a second flexible substrate, and at least one second metal trace on a bottom side of the second flexible substrate connected by a filled via through the second flexible substrate, the optical adhesive layer, and the first flexible substrate to the at least one first metal trace.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: January 10, 2023
    Assignee: Compass Technology Company Limited
    Inventors: Kelvin Po Leung Pun, Chee Wah Cheung, Jason Rotanson
  • Patent number: 11553596
    Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: January 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Fan Chen, Chien-Hao Wang
  • Patent number: 11553607
    Abstract: An electronic device includes: a circuit board having a wiring board on which wiring is formed, and an electronic component that is electrically and mechanically connected to the wiring via a first solder. A base is provided to accommodate the circuit board, and has a side wall that faces a side surface of the wiring board. A leaf spring arranged on the circuit board, and is configured to be contactable with the base. The leaf spring includes a fixing portion arranged on the circuit board and a pressing portion extending from and connected to the fixing portion and pressing the side wall, and the pressing portion in a biased state toward a housing establishes a contact thereto when the circuit board is put in and accommodated by the base.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: January 10, 2023
    Assignee: DENSO CORPORATION
    Inventor: Takashi Hoshino
  • Patent number: 11546997
    Abstract: A twistable electronic device module including a twistable substrate, an electrode pattern layer, an insulating layer, a circuit layer, a plurality of circuit boards and a plurality of electronic devices is provided. The electrode pattern layer is disposed on the twistable substrate. The insulating layer is disposed on the electrode pattern layer. The edge of the insulating layer has an opening located at the edge of the twistable substrate and exposing a part of the electrode pattern layer. The circuit layer is disposed on the insulating layer and on the sidewall of the opening, and is connected with the electrode pattern layer. The plurality of circuit boards are disposed on the circuit layer, and each is electrically connected to the circuit layer. The plurality of electronic devices are disposed on the plurality of circuit boards, and each is electrically connected to a corresponding one of the plurality of circuit boards.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 3, 2023
    Assignee: National Taipei University of Technology
    Inventors: Syang-Peng Rwei, Tzu-Wei Chou, Sheng-Yuan Huang