Patents Examined by Andargie M Aychillhum
  • Patent number: 11357108
    Abstract: A printed circuit board connector for orthogonal mating of two or more printed circuit boards. The connector utilizes interior perimeter trace connections of a main printed circuit board and internal trace connections of a mating printed circuit board in conjunction with external trace connections. The main board may utilize surface connections, where both external trace connections and internal trace connections are exposed on a surface of the main board to couple to the mating board. The main board may include a slot or pocket, allowing for the partial insertion of the mating board into the main board, with internal trace connections disposed within the slot or pocket. The slot or pocket may extend through the main board, such that the internal trace connections are disposed along a side of the pocket to couple with corresponding internal trace connections of the mating board.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: June 7, 2022
    Assignee: Battelle Memorial Institute
    Inventors: Andrew M. Schimmoeller, Jeffrey A. Friend
  • Patent number: 11342316
    Abstract: A semiconductor package includes a first substrate, a second substrate, a conductive component, an electronic component and a passive component. The conductive component is disposed between the first substrate and the second substrate, wherein the first substrate and the second substrate are separated from each other by an interval. The electronic component and the passive component are disposed within the interval.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 24, 2022
    Assignee: MEDIATEK INC.
    Inventors: Tien-Yu Lu, Chu-Wei Hu, Hsin-Hsin Hsiao
  • Patent number: 11335633
    Abstract: Provided is a circuit module including a power supply chip module, a load chip module, and a system board. A power supply output terminal group of the power supply chip module is arranged side by side in a row along a side of the power supply chip module board, the power supply input terminal group of a load chip module includes a specific terminal group arranged in a specific row that is a row along a side of the load chip module board, and a wiring width along an arrangement direction of the power supply output terminal group of a wiring pattern in which the power supply output terminal group is connected to the system board is equal to or more than a wiring width W31 along an arrangement direction of the specific terminal group of the wiring pattern in which the specific terminal group is connected to the system board.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: May 17, 2022
    Assignee: AISIN CORPORATION
    Inventors: Takashi Kusano, Takanobu Naruse
  • Patent number: 11330716
    Abstract: According to an embodiment of the disclosure, an electronic device comprises a first printed circuit board including a first electrical terminal exposed on one face of a first area, a second electrical terminal exposed on the one face of a second area and insulated from the first electrical terminal, and a first ground terminal exposed on the one face of a third area formed between the first area and the second area, the third area having a width narrower than a width of the first area or the width of the second area; and a second printed circuit board including a third electrical terminal exposed on one face of a fourth area, a fourth electrical terminal exposed on the one face of a fifth area and electrically connected to the third electrical terminal, and a second ground terminal exposed on the one face of a sixth area located between the fourth area and the fifth area, wherein the second printed circuit board is disposed on the first printed circuit board to overlap the third area, the first electrical te
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 10, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinyong Park, Taewoo Kim, Hyeongju Lee, Bongkyu Min, Jungsik Park, Hyelim Yun
  • Patent number: 11322434
    Abstract: Disclosed embodiments include folded, top-to-bottom interconnects that couple a die side of an integrated-circuit package substrate, to a board as a complement to a ball-grid array for a flip-chip-mounted integrated-circuit die on the die side. The folded, top-to-bottom interconnect is in a molded frame that forms a perimeter around an infield to receive at least one flip-chip IC die. Power, ground and I/O interconnections shunt around the package substrate, and such shunting includes voltage regulation that need not be routed through the package substrate.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: May 3, 2022
    Assignee: Intel Corporation
    Inventors: Jiun Hann Sir, Poh Boon Khoo, Eng Huat Goh
  • Patent number: 11324135
    Abstract: An electronic device is provided, which includes a housing including a sidewall; a through-hole configured to penetrate the sidewall; an assembling hole formed adjacent to the through-hole inside the housing; a key assembly configured to be received in the assembling hole and disposed to face an inner surface of the housing in an area where the through-hole is positioned; and a fixing member configured to be received in the assembling hole and to bring a surface of the key assembly into close contact with the inner surface of the housing around the through-hole and seal between the through-hole and an inner space of the housing.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: May 3, 2022
    Inventors: Hosu Kim, Jongchun Wee, Kyungpil Kim, Namjun Kim
  • Patent number: 11317503
    Abstract: A circuit board is provided, including: a core board, defining a plurality of slots, the plurality of slots including a plurality of first sub-slots and a plurality of second sub-slots disposed beneath the first sub-slots. Each of the second sub-slots is located beneath a corresponding first sub-slot of the first sub-slots; and a plurality of chip assemblies, arranged in the slots and including a plurality of first chips located in the first sub-slots and a plurality of second chips located in the second sub-slots. Each of the first chips is connected in series with one of the second chips at a corresponding position to form a plurality of chipsets; the chipsets are connected in parallel with each other; an end of the chipsets is connected to a first power signal layer, and the other end of the plurality of chipsets is connected to a ground layer.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: April 26, 2022
    Assignee: SHENNAN CIRCUITS CO., LTD.
    Inventors: Lixiang Huang, Zedong Wang, Hua Miao
  • Patent number: 11317513
    Abstract: An optical module includes a photoelectric device and a flexible printed circuit board. The flexible printed circuit board includes an insulating substrate with a first surface and a second surface, a first wiring pattern on the first surface, and a second wiring pattern on the second surface. The first wiring pattern includes a signal line with a signal terminal portion at a tip and a signal-line portion narrower than the signal terminal portion, the first wiring pattern including a pair of ground pads at positions sandwiching the signal-line portion, at least part of the pair of ground pads avoiding being adjacent to the signal terminal portion. The second wiring pattern includes a ground plane overlapping with the signal-line portion and being connected to the pair of ground pads, the second wiring pattern including a signal pad connected to the signal terminal portion.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: April 26, 2022
    Assignee: CIG PHOTONICS JAPAN LIMITED
    Inventors: Daisuke Noguchi, Hiroshi Yamamoto
  • Patent number: 11315880
    Abstract: A fabric-based item may include fabric such as woven fabric having insulating and conductive yarns or other strands of material. The conductive yarns may form signal paths. Electrical components can be embedded within pockets in the fabric. Each electrical component may have an electrical device such as a semiconductor die that is mounted on an interposer substrate. The electrical device may be a light-emitting diode, a sensor, an actuator, or other electrical device. The electrical device may have contacts that are soldered to contacts on the interposer. The interposer may have additional contacts that are soldered to the signal paths. The fabric may have portions that form transparent windows overlapping the electrical components or that have other desired attributes.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: April 26, 2022
    Assignee: Apple Inc.
    Inventors: Daniel D. Sunshine, Paul S. Drzaic, Daniel A. Podhajny, David M. Kindlon, Hoon Sik Kim, Kathryn P. Crews, Yung-Yu Hsu
  • Patent number: 11310906
    Abstract: A printed circuit board and a display device are provided. A second wiring layer of the PCB includes a trace group, a system ground and an output pin group that includes power supply pins and a reference ground pin. One end of the power trace of the trace group is connected to one power supply pin, and another end of the power trace extends toward the system ground line. The insulating layer has a via hole corresponding to an overlapping portion of the power trace and the positive power supply signal line. The reference ground trace is disposed between the two power traces. The reference ground trace is between the reference ground pin and the system ground line. Voltage on the reference ground pin is stable to provide a stable power supply voltage. The ripple of the power supply voltage is reduced. The electromagnetic interference resistance is strong.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 19, 2022
    Assignee: TCL China Star Ovtoelectronics Technology Co., Ltd.
    Inventor: Jianfeng Xiao
  • Patent number: 11304300
    Abstract: According to an embodiment, it is possible to provide an electronic device including: a housing; a first printed circuit board disposed in the housing; a second printed circuit board disposed in the housing and spaced apart from the first printed circuit board; a first flexible printed circuit board electrically connecting the first printed circuit board and the second printed circuit board; and a second flexible printed circuit board electrically connecting the first printed circuit board and the second printed circuit board, in which the second flexible printed circuit board may be longer than the first flexible printed circuit board. Other embodiments are also disclosed.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: April 12, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Woo, Jungchul An, Seungki Choi
  • Patent number: 11297715
    Abstract: A solderable circuit board module system includes at least a first solderable circuit board module and a second solderable circuit board module, wherein the first solderable circuit board module has a first module circuit board having a top side and an underside provided for placement on a motherboard, wherein on the underside of the first module circuit board, solder connection contacts are arranged in a first frame-shaped contact region around a central middle section, which is free of connection contacts. The second solderable circuit board module has additional solder connection contacts, which form an outer frame around the first frame-shaped contact region, as a second group.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: April 5, 2022
    Assignee: PHYTEC Messtechnik GmbH
    Inventor: Bodo Huber
  • Patent number: 11295886
    Abstract: A winding configuration for a transformer or an inductor has a winding formed by a winding conductor, a solid insulation surrounding the winding and a connecting unit embedded in the solid insulation. The aim is to obtain a winding configuration which provides the required dielectric strength even at higher operating voltages. In order to achieve this goal, the connecting unit is a plug lead-through and is configured to allow the connection of a cable connector.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: April 5, 2022
    Assignee: Siemens Energy Global GmbH & Co. KG
    Inventors: Tim-Felix Mai, Richard Sille, Steffen Weinert
  • Patent number: 11289794
    Abstract: An electronic package is disclosed. An antenna board is stacked on a circuit board. A frame is formed on the circuit board. A supporter disposed between the antenna board and the circuit board is secured in the frame. In a packaging process, the frame ensures that the antenna board and the circuit board are separated at a distance that complies with a requirement, and that the antenna function of the antenna board can function normally.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 29, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Rung-Jeng Lin, Han-Hung Chen, Shi-Min Zhou, Kuo-Hua Yu, Chang-Fu Lin
  • Patent number: 11291111
    Abstract: A flexible wiring substrate includes a main substrate having flexibility, a main wiring disposed over the main substrate, a second protective sheet covering the main wiring, and an insulating member partially covering the main wiring exposed from the second protective sheet and being thinner in thickness than the second protective sheet.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: March 29, 2022
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Suguru Uchiyama, Yoshitaka Hama
  • Patent number: 11287679
    Abstract: A display device includes a display panel, and a top cover disposed around a side surface of the display panel, wherein the top cover includes an accommodation portion corresponding to the side surface of the display panel, a first extension portion extending from an upper end of the accommodation portion, and a second extension portion extending from a lower end of the accommodation portion, such that the first extension portion is offset from the second extension portion.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: March 29, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sun Lee, Byoung Chel Kim, Han Yul Yu
  • Patent number: 11287704
    Abstract: Disclosed is a display device comprising a display panel which includes a display area and a non-display area surrounding the display area, the display panel including a plurality of driving lines disposed on the non-display area, and a plurality of driving pads connected to the plurality of driving lines, a plurality of side electrodes disposed on a side surface of the display panel and in contact with side surfaces of the plurality of driving pads, and a flexible film that includes a plurality of lead electrodes in contact with the plurality of side electrodes. The plurality of driving pads includes first to third driving pads that are sequentially arranged in a first direction. A first interval between the first and second driving pads is different from a second interval between the second and third driving pads.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: March 29, 2022
    Inventors: Duyeon Han, Ji hyun Kim, Seung-Won Kuk, Jin-Mo Kwon, Minhyoung Kim
  • Patent number: 11284516
    Abstract: A display device includes: a substrate including a first indented portion indented inward along one side of the substrate; a first pad group and a second pad group that are spaced apart from each other on the substrate along the one side; a display unit located on the substrate and having a shape indented inward between the first pad group and the second pad group; an encapsulation layer encapsulating the display unit; a first wiring film including a third pad group connected to the first pad group; and a second wiring film including a fourth pad group connected to the second pad group. The first wiring film and the second wiring film are bent from a first surface of the substrate to a second surface of the substrate that is opposite to the first surface of the substrate, and the second wiring film is spaced apart from the first wiring film.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 22, 2022
    Inventors: Minjun Jang, Sunghoon Kim
  • Patent number: 11284515
    Abstract: An electronic component-embedded substrate includes a first wiring layer, a first electronic component disposed on the first wiring layer, a first insulating material covering at least a portion of each of the first wiring layer and the first electronic component, a second wiring layer disposed on the first insulating material, a second electronic component disposed on the second wiring layer and connected to the first electronic component in an electrical parallel connection, a second insulating material disposed on the first insulating material and covering at least a portion of each of the second wiring layer and the second electronic component, and a first via penetrating through the first insulating material and connecting the first electronic component and the second wiring layer.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: March 22, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Eun Lee, Jin Won Lee, Yong Hoon Kim
  • Patent number: 11284518
    Abstract: According to various examples, a device is described. The device may include a printed circuit board. The device may also include a first recess in the printed circuit board, wherein the first recess comprises a circular side surface and a bottom surface. The device may also include a first solder ball disposed in the first recess. The device may also include a first conductive wall positioned behind the circular side surface of the first recess, wherein the first conductive wall surrounds a side surface of the first solder ball.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: March 22, 2022
    Assignee: Intel Corporation
    Inventors: Jackson Chung Peng Kong, Bok Eng Cheah, Jenny Shio Yin Ong, Seok Ling Lim