Abstract: In some examples, a circuit includes a phase frequency detector (PFD) having a first input, a second input, and an output. The circuit also includes a control circuit having an input and an output, the control circuit input coupled to the output of the PFD. The circuit also includes a modulation circuit having an input and an output, the modulation circuit input coupled to the output of the control circuit. The circuit also includes an oscillator having an oscillator input and an oscillator output, the oscillator input coupled to the output of the modulation circuit and the output of the oscillator coupled to the second input of the PFD.

Abstract: An oscillator includes a resonator, an oscillation circuit, and first and temperature compensation circuits. The first temperature compensation circuit performs a first-order first temperature compensation processing in a first mode and performs the first-order first temperature compensation processing and a high-order first temperature compensation processing in a second mode for a frequency of a first clock signal generated by oscillation of the resonator by the oscillation circuit. The second temperature compensation circuit receives the first clock signal and outputs a second clock signal subjected to a high-order second temperature compensation processing based on the first clock signal.

Abstract: A temperature insensitive oscillator system. The system includes a substrate having a first surface and an opposing second surface, a CMOS device with one or more CMOS circuits attached to the first surface of the substrate, one or more piezoelectric transducers attached to an outer surface of the CMOS device, a voltage-controlled oscillator generating a RF frequency, which is transmitted as a plurality of short pulses to the one or more piezoelectric transducers, and one or more delays and oscillators using resistor and active components arranged alongside the piezoelectric transducers or on the CMOS device such that the voltage-controlled oscillator has minimal dependence on temperature, and has minimal deviation from a programmed frequency.

Abstract: A semiconductor integrated circuit device includes a standard cell having a plurality of height regions. A plurality of partial circuits having an identical function and each operating in response to common signals S and NS are arranged in any one of the height regions. A metal interconnect forming part of a supply path for the common signal S is arranged in the height region so as to be connected to the partial circuits, and a metal interconnect forming part of a supply path for the common signal S is arranged in the height region so as to be connected to the partial circuits.

Abstract: Integrated systems for force or strain sensing and haptic feedback are described herein. An example force-haptic system can include a sensor chip configured to receive an applied force, where the sensor chip includes at least one sensing element and an integrated circuit. The force-haptic system can also include a haptic actuator configured to convert an electrical excitation signal into mechanical vibration. Further, the force-haptic system can include a circuit board, where the sensor chip and the haptic actuator are electrically and mechanically coupled to the circuit board. The integrated circuit can be configured to process an electrical signal received from the at least one sensing element and to output the electrical excitation signal.

Abstract: A multi-quantum-reference (MQR) laser frequency stabilization system includes a laser system, an MQR system, and a controller. The laser system provides an output beam with an output frequency, and plural feedback beams with respective feedback frequencies. The feedback beams are directed to the MQR system which includes plural references, each including a respective population of quantum particles, e.g., rubidium 87 atoms, with respective resonant frequencies for respective quantum transitions. The degree to which the feedback frequencies match or deviate from the resonance frequencies can be tracked using fluorescence or other electro-magnetic radiation output from the references. The controller can stabilize the laser system output frequency based on plural reference outputs to achieve both short-term and long-term stability, e.g., in the context of an atomic clock.

Abstract: Methods, systems, and apparatus for producing CCZ states and T states. In one aspect, a method for distilling a CCZ state includes preparing multiple target qubits, ancilla qubits and stabilizer qubits in a zero state, performing an X gate for each stabilizer qubit on multiple ancilla qubits or multiple ancilla qubits and one of the target qubits using the stabilizer qubit as a control, measuring the stabilizer qubits, performing, on each of the ancilla qubits, a Z1/4 gate and a Hadamard gate, measuring each of the ancilla qubits, performing, conditioned on each measured ancilla qubit state, a NOT operation on a selected stabilizer qubit, or a NOT operation on the selected stabilizer qubit and a Z gate on one or more respective target qubits, performing, on each target qubit and conditioned on a measured state of a respective stabilizer qubit, a Z gate on the target qubit, and performing an X gate on each of the target qubits.

Abstract: An adhesion between a sealing resin layer and a shield film is improved by a mesh sheet disposed on an opposite surface of the sealing resin layer. A radio frequency module includes a wiring board, a component mounted on an upper surface of the wiring board, a sealing resin layer that covers the component, a mesh sheet disposed on an upper surface of the sealing resin layer, and a shield film provided to cover the upper surface and side surfaces of the sealing resin layer, and the mesh sheet. The mesh sheet and the sealing resin layer, as well as the mesh sheet and the shield film are firmly in adhesion with one another. Thus, the adhesion between the sealing resin layer and the shield film can be improved.

Abstract: Presented herein are techniques for implementing a hybrid fractional-N sampling phase locked loop with accurate digital-to-time calibration. A method includes receiving, at a comparator, an output of a sampling phase detector of a phase locked loop, the output of the sampling phase detector of the phase locked loop also being supplied as a control source for a proportional control input of a voltage-controlled oscillator, supplying an output of the comparator as an input signal to a calibration loop of a digital-to-time converter, supplying an output of the digital-to-time converter to an input of the sampling phase detector, and supplying the output of the comparator as a control source for an integral control input of the voltage-controlled oscillator.

Abstract: A circuit includes an amplifier having an input and an output. A voltage comparator has an input and first and second outputs. The input of the voltage comparator is coupled to the output of the amplifier. A variable capacitor circuit is coupled between the input and the output of the amplifier and is coupled to the first output of the voltage comparator. A charge dump circuit has an input and an output. The input of the charge dump circuit is coupled to the second output of the voltage comparator. The output of the charge dump circuit is coupled to the input of the amplifier.

Abstract: An oscillator circuit includes a total of N (N?2) class-D oscillator circuits stacked together between a supply voltage node and a reference voltage node. The output ports of adjacent class-D oscillator circuits in the disclosed oscillator circuit are coupled together by capacitors to ensure frequency and phase synchronization for the frequency signals generated by the class-D oscillator circuits. Compared with a reference oscillator circuit formed of a single class-D oscillator circuit, the oscillation amplitude of each of the class-D oscillator circuits in the disclosed oscillator circuit is 1/N of that of the reference oscillator circuit, and the current consumption of the disclosed oscillator circuit is 1/N of that of the reference oscillator circuit.

Abstract: A fully connected ring oscillator circuit includes a plurality of first ring oscillator loops, a plurality of second ring oscillator loops, a plurality of ring oscillators and a plurality of coupled ring oscillators. Each first ring oscillator loop extends along a first axis. Each second ring oscillator loop extends along a second axis that is transverse to the first axis and intersects each of the first ring oscillator loops. Each ring oscillator includes one of the first ring oscillator loops connected to one of the second ring oscillator loops. Each coupled ring oscillator includes two of the ring oscillators that are connected to each other through a programmable weighted coupling block.

Abstract: A superconducting integrated circuit design method based on placement and routing by different-layer JTLs comprises: cutting a bias line at a cell data interface of a cell library, and reserving a position of a via; placing and arranging cells on a logic cell layer according to a schematic circuit logic diagram; connecting clock lines of each of the cells by using a JTL and a splitter of the logic cell layer; and performing data connection on each of the cells by using JTLs of a transverse JTL routing layer and a longitudinal JTL routing layer which are not in the same layer as the logic cell layer, wherein the JTL of the transverse JTL routing layer is used as a transverse routing cell for data between the cells, the JTL of the longitudinal JTL routing layer is used as a longitudinal routing cell for data between the cells.

Abstract: Disclosed herein is a tunable resonant circuit including an inductance directly electrically connected in series between first and second nodes, a variable capacitance directly electrically connected between the first and second nodes, and a set of switched capacitances coupled between the first and second nodes. The set of switched capacitances includes a plurality of capacitance units, each capacitance unit comprising a first capacitance for that capacitance unit directly electrically connected between the first node and a switch and a second capacitance for the capacitance unit directly electrically connected between the switch and the second node. Control circuitry is configured to receive an input control signal and connected to control the switches of the set of switched capacitances. A biasing circuit is directly electrically connected to the tunable resonance circuit at the first and second nodes.

Abstract: An oscillator includes a crystal oscillation circuit configured to generate an oscillation signal having a natural frequency, an injection circuit configured to inject a first injection signal and a second injection signal into the crystal oscillation circuit, a dithering circuit configured to transmit a first control signal for generating the first injection signal to the injection circuit, and a phased-lock loop (PLL) circuit configured to lock a phase of the first injection signal to the natural frequency, to transmit a second control signal for generating the second injection signal to the injection circuit.

Abstract: Compute engine circuitry configured to represent a spin network mapping of a graph representing a combinatorial optimization problem includes a plurality of ring oscillator cells, each of which includes a ring oscillator having an oscillator output, at least one coupling block, and a read block. Each coupling block connects the ring oscillator of the cell to the ring oscillator of one of a plurality of neighboring cells to form a coupled ring oscillator. The read block generates a state output for each coupled ring oscillator that indicates whether the coupled ring oscillator is in one of a same-phase state, in which the connected ring oscillators oscillate in phase with each other, and an opposite-phase state, in which the connected ring oscillators oscillate in an opposite phase from each other. A controller is configured to output a total energy of the mapping based on the state outputs.

Abstract: Disclosed are a power-aware method, a power-aware system and a converter. The power-aware method includes: receiving an input signal, wherein the input signal is a capacitive type, a resistive type, a voltage type or a current type, coarsely quantizing the input signal and outputting a numerical control code, the numerical control code indicating size information of the input signals, and turning on a corresponding number of power-consuming modules based on the numerical control code. By the power-aware method, the power-aware technical effect of a circuit may be provided and turned-on power-consuming modules always have the most suitable number regardless of the size of the input signals, which may ensure normal operation, and will not waste power consumption due to too many power-consuming modules and energy efficiency is improved as a whole.

Abstract: The present invention discloses a power supply stabilizing circuit having noise suppressing mechanism configured to drive a voltage-control oscillating circuit that includes a current-adjusting N-type transistor including a drain, a source and a gate and an adjusting voltage generation circuit. The drain receives a first operation voltage. The source generates a power signal to the voltage control oscillator circuit. The gate receives an adjusting voltage. The adjusting voltage generation circuit operates according to a second operation voltage higher than the first operation voltage and receives a reference voltage that is a division of the first operation voltage to generate the adjusting voltage. The adjusting voltage is a sum of the reference voltage and a threshold voltage of the current-adjusting N-type transistor such that the current-adjusting N-type transistor operates in a saturation region to keep a current variation amount of the power signal smaller than a predetermined value.

Abstract: An object of the present invention is to provide a terahertz oscillator that does not have an MIM capacitor structure of which producing is intricacy, and oscillates due to resonance of an RTD and stabilizing resistors. The present invention is a terahertz oscillator, wherein a slot antenna having a slot is formed between a first electrode plate and a second electrode plate which are applied a bias voltage, stabilizing resistors to respectively connect to the first electrode plate and the second electrode plate are provided in the slot, an RTD is provided on the second electrode plate through a mesa, and a conductive material member to form an air bridge between the first electrode plate and the mesa is provided, and wherein an oscillation in a terahertz frequency band is obtained due to a resonance of the RTD and the stabilizing resistors.

Abstract: An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.