Abstract: The purpose of the present invention is to improve signal modulation resolution. A coarse phase modulation element 62A modulates a signal into any of M1 (M1 is an arbitrary integer) patterns in a first range. Fine phase modulation elements 62B-1 through 62B-(k?1) respectively modulate the signal into any of M2 through Mk (M2 through Mk are arbitrary integers that are independent of each other and M1) patterns in a second range through k-th range (k is an integer of 2 or greater). A coarse DAC 61A and DACs 61B-1 through 61B-(k?1) perform control such that the second range through k-th range become narrower than the first range.

Abstract: Methods and apparatus can be used to turn an existing 240 VAC or 480 VAC/600 VAC outlet into two or more time-sharing, i.e., one operating at a time, outlets. An AC switch box with two time-sharing outlets can be made with either a mechanical switch for switching which load receives power, or automatically, by a microcomputer system, for example. In the automatic AC switch box, the non-favored outlet may be typically powered on unless a load is detected at the favored/default outlet, when power to the non-favored outlet is automatically disconnected until the load is reduced or eliminated.

Abstract: A ring oscillator includes an oscillation module, a first delay module, and a second delay module. The oscillation module is disposed in a first delay loop and a second delay loop and includes a first number of latches connected in series. The oscillation module has two input ends and two output ends, and the two input ends are respectively connected to a first node and a second node. The first delay module is disposed in the first delay loop and has an input end connected to a first output end of the oscillation module and an output end connected to the first node. The second delay module is disposed in the second delay loop and has an input end connected to a second output end of the oscillation module and an output end connected to the second node.

Abstract: Embodiments of the present application provide an oscillator and a clock generation circuit. The oscillator includes: a first ring topology, including a plurality of first inverters connected end to end, and configured to transmit an oscillation signal at a first transmission speed; and a second ring topology, including a plurality of second inverters connected end to end, and configured to transmit the oscillation signal at a second transmission speed, wherein the present application, the first ring topology is electrically connected to the second ring topology, and the second transmission speed is less than the first transmission speed.

Abstract: Methods, apparatuses, and systems include acquiring initial environmental information corresponding to a superconducting qubit received from a superconducting circuit, the superconducting circuit being in an environment; determining first environmental information corresponding to the superconducting qubit in response to a quantum energy level of the superconducting qubit being a first preset energy level; determining second environmental information corresponding to the superconducting qubit in response to the quantum energy level of the superconducting qubit being a second preset energy level; determining effective environmental information based on the first environmental information and the second environmental information; and determining arbitrary-order correlation information for identifying an environmental noise based on the effective environmental information and the initial environmental information.

Abstract: A resistor-capacitor oscillation circuit includes a first group of inverters, a second group of inverters, a latch, a delay circuit, and a third group of inverters. The first group of the inverters is connected to the delay circuit and is configured to generate a first signal A and a second signal B. An input end of the second group of the inverters is connected to an enable signal EN. An output end of the second group of the inverters is connected to the latch. An output end of the delay circuit is connected to the latch. The latch is connected to the third group of the inverters and includes a first output end and a second output end. After a first clock signal FB is driven by the third group of the inverters, an output signal CLK is output by an output end of the third group.

Abstract: According to an aspect of the disclosure a ring-oscillator control circuit includes a voltage reference, a ring oscillator, a power supply and a supply controller. The supply controller may be configured to select the power supply among an energy storage and an energy source such as to supply the ring oscillator in function of the voltage reference.

Abstract: An enhanced smart lighting system (ESLS) for use in buildings without neutral wire connections for wall switches. The ESLS entails both a no-neutral wire smart lighting switch (NNWSLS) and a physically separate load adapter. The NNWSLS includes a sensing, control, or communication system (SSCCS) such as integrated WiFi. The load adapter mitigates electrical fluctuations which may be induced in a power load (for example a lightbulb) by the smart lighting switch, particularly when the smart lighting switch is nominally powered off but still has some current flow. The load adapter is an intermediary between the power load and a conventional load receptacle. The load adapter has an integrated dummy load configured in parallel with the power load. The dummy load provides an electrical pathway for low levels of electricity which run through the light socket even when the NNWSLS is set to an “off” configuration.

Abstract: An element includes a coupling line in which a first conductor layer, a dielectric layer, and a second conductor layer are stacked in this order, and which is connected to the second conductor layer in order to mutually synchronize a plurality of antennas at a frequency of a terahertz wave; and a bias line connecting a power supply for supplying a bias signal to a semiconductor layer and the second conductor layer. A wiring layer in which the coupling line is formed and a wiring layer in which the bias line is formed are different layers. The bias line is disposed in a layer between the first conductor layer and the second conductor layer.

Abstract: Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.

Abstract: A voltage-controlled oscillator device includes first and second voltage-controlled oscillators, a first switch group including two first switches, and a second switch group including two second switches. The first voltage-controlled oscillator includes a first inductor group, a first negative resistance circuit and a first voltage output terminal group. The second voltage-controlled oscillator includes a second inductor group, a second negative resistance circuit and a second voltage output terminal group. For the first switch group, first control terminals are electrically connected to the first voltage output terminal group, first input terminals are electrically connected to the second voltage output terminal group, first output terminals are electrically connected.

Abstract: A clock device includes an LC network that has a first inductive portion; a second inductive portion connected to the first inductive portion; a third inductive portion connected to the second inductive portion; a first capacitive portion connected to the first, the second, and the third inductive portions; and a second capacitive portion connected to the first inductive portion and the third inductive portion, wherein the LC network is configured to simultaneously resonate at a first frequency and a second frequency that is substantially three times the first frequency, and wherein the clock signal is provided between the first and the third inductive portions by combining a first signal component and a second signal component that is a third harmonic of the first signal component and each inflection point of the first signal component is phase aligned with a corresponding inflection point of the second signal component.

Abstract: According to an exemplary embodiment of the present disclosure, a fractional-N sub-sampling phase locked loop using a phase rotator includes a frequency locked loop which is locked at a fractional-N frequency using a delta-signal modulator and a sub-sampling phase locked loop which locks a phase to a fractional multiple using a phase rotator, and the phase rotator applies a fractional multiple to a phase of a signal output from the oscillator.

Abstract: An IQ mixer is used in a Pound-stabilized microwave source to detect amplitude modulation of the signal reflected from the reference resonator. By properly configuring the IQ mixer so that the LO and RF inputs are maintained in quadrature at the Q mixer, hence in-phase at the I mixer, lower levels of amplitude modulation may be detected at lower modulation frequencies compatible with optimal choices of resonator coupling and maximal phase to amplitude conversion. With the Q mixer held in quadrature it acts as a broadband phase noise detector. A portion of the Q mixer output is bandpass filtered and summed with the I mixer Pound-server voltage to achieve both center frequency stabilization and broadband phase noise suppression.

Abstract: An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

Abstract: An IQ mixer is used in a Pound-stabilized microwave source to detect amplitude modulation of the signal reflected from the reference resonator. By properly configuring the IQ mixer so that the LO and RF inputs are maintained in quadrature at the Q mixer, hence in-phase at the I mixer, lower levels of amplitude modulation may be detected at lower modulation frequencies compatible with optimal choices of resonator coupling and maximal phase to amplitude conversion.

Abstract: Terahertz device includes first resin layer, columnar conductor, wiring layer, terahertz element, second resin layer, and external electrode. Resin layer includes first resin layer obverse face and first resin layer reverse face. Columnar conductor includes first conductor obverse face and first conductor reverse face, penetrating first resin layer in z-direction. Wiring layer spans between first resin layer obverse face and first conductor obverse face. Terahertz element includes element obverse face and element reverse face, and converts between terahertz wave and electric energy. Second resin layer includes second resin layer obverse face and second resin layer reverse face, and covers wiring layer and terahertz element. External electrode, disposed offset in a direction first resin layer reverse face faces with respect to first resin layer, is electrically connected to columnar conductor. Terahertz element is conductively bonded to wiring layer.

Abstract: Aspects of the present disclosure include systems and methods for temperature adaptive voltage controlled oscillators. In one example, a voltage controlled oscillator includes a cross junction circuit electrically coupled to a temperature dependent input current, and an inductor circuit electrically coupled to the cross junction circuit. The voltage controlled oscillator additionally includes a capacitor bank circuit electrically coupled to the inductor circuit, and an input node that receives a control voltage. The voltage controlled oscillator further includes an output node configured to provide an oscillation frequency output, wherein the oscillation frequency output is controlled by the control voltage.

Abstract: A data sensing circuit including a reference signal circuit, a reference signal combining circuit, drive-sense circuits, an array of sensors, sets of digital filters, and a processing module. The processing module provides a reference control signal to the reference signal circuit operable to generate a plurality of reference signals based on the reference control signal. The reference signal combining circuit transmits sets of reference signals to the drive-sense circuits operably coupled to an array of sensor. When the sensor is exposed to a condition, and is receiving the signal from the drive-sense circuits, an electrical characteristic of the sensor affects the signal, which is interpreted by the drive-sense circuit and converted to a digital signal to be filtered by the set of digital filters generating a frequency response for the array of sensors.

Abstract: A ring oscillator circuit design includes three or more inverter stages connected in series. Each inverter stage includes one or more inverter devices including a PMOS device and a coupled NMOS device. The PMOS device in each of odd alternating inverter devices of the three or more inverter stages having a source terminal receiving power from a power rail conductor, and a source terminal of the coupled NMOS device in each of first alternating inverter devices is grounded. An output of a last inverter device of a last stage of the three or more inverter stages is connected to an input of a first inverter stage. The method measures a first frequency of a first ring oscillator circuit and measures a second frequency of a second ring oscillator circuit design to determine either a BTI or HCI failure mechanism of the first ring oscillator circuit based on the measurements.