Abstract: Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures.

Abstract: The present invention provides an organic electroluminescence device capable of having not only a device lifetime comparable to that of an existing organic electroluminescence device but also a small thickness of smaller than 10 ?m and excellent flexibility. The present invention relates to an organic electroluminescence device having a structure including: an anode; a cathode on a substrate; and a laminate of multiple layers between the anode and the cathode, the device having a thickness of smaller than 10 ?m.

Abstract: A light-emitting element includes a first semiconductor layer doped to have a first polarity, a second semiconductor layer doped to have a second polarity different from the first polarity, a light-emitting layer disposed between the first and second semiconductor layers, a shell layer formed on side surfaces of the first semiconductor layer, the light-emitting layer, and the second semiconductor layer, the shell layer including a divalent metal element, and an insulating film covering an outer surface of the shell layer and surrounding the side surface of the light-emitting layer.

Abstract: A semiconductor package including: a first substrate; a first semiconductor device on the first substrate; a first mold layer covering the first semiconductor device; a second substrate on the first mold layer; a support solder ball interposed between the first substrate and the second substrate, and electrically disconnected from the first substrate or the second substrate, wherein the support solder ball includes a core and is disposed near a first sidewall of the first semiconductor device; and a substrate connection solder ball disposed between the first sidewall of the first semiconductor device and the support solder ball to electrically connect the first substrate to the second substrate, wherein a top surface of the first semiconductor device has a first height from a top surface of the first substrate, and the core has a second height which is equal to or greater than the first height.

Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.

Abstract: Discussed is a display device including a light emitting element module on a substrate, wherein the light emitting element module includes a plurality of semiconductor light emitting elements disposed on the substrate, a plurality of individual electrode portions electrically connected to each of the plurality of semiconductor light emitting elements and a common electrode portion electrically connected to each of the plurality of semiconductor light emitting elements, and wherein each of the individual electrode portions is disposed on different sides of the light emitting element module.

Abstract: Implementations of die singulation systems and related methods may include forming a plurality of die on a first side of a substrate, forming a seed layer on a second side of a substrate opposite the first side of the substrate, using a shadow mask, applying a mask layer over the seed layer, forming a backside metal layer over the seed layer, removing the mask layer, and singulating the plurality of die included in the substrate through removing substrate material in the die street and through removing seed layer material in the die street.

Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.

Abstract: A package structure includes a first thermal dissipation structure, a first semiconductor die, a second semiconductor die. The first thermal dissipation structure includes a semiconductor substrate, conductive vias embedded in the semiconductor substrate, first capacitors electrically connected to the conductive vias, and a thermal transmission structure disposed over the semiconductor substrate and the conductive vias. The first semiconductor die is disposed on the first thermal dissipation structure. The second semiconductor die is disposed on the first semiconductor die opposite to the first thermal dissipation structure.

Abstract: A superconducting quantum computing circuit package (1). The package contains a substrate (2) on which a circuit is formed, the circuit including a plurality of circuit elements. The substrate (2) includes holes (8) arranged between the circuit elements which extend through a thickness of the substrate (2). The package also contains a holder (3) with a surface (9) on which the substrate (2) is received, and a cover (4) arranged on an opposite side of the substrate (2). The holder (3) and the cover (4) are formed from a metal and/or a superconductor. The holder (3) also contains projections (12) arranged on and projecting from the surface (9). The projections (12) protrude through the holes (8) in the substrate (2) and contact the cover (4) so to suppress electromagnetic modes in the frequency range of operation of the quantum computing circuit.

Abstract: A manufacturing method of a semiconductor device includes at least the following steps. A sacrificial substrate is provided. An epitaxial layer is formed on the sacrificial substrate. An etch stop layer is formed on the epitaxial layer. Carbon atoms are implanted into the etch stop layer. A capping layer and a device layer are formed on the etch stop layer. A handle substrate is bonded to the device layer. The sacrificial substrate, the epitaxial layer, and the etch stop layer having the carbon atoms are removed from the handle substrate.

Abstract: A method for manufacturing a light-emitting element includes providing the light-emitting element that includes a light-emitting layer with an emission wavelength of not more than 306 nm and a p-type layer including AlGaInN including Mg as an acceptor, and removing hydrogen in the p-type layer from the light-emitting element by irradiating the light-emitting element with ultraviolet light at a wavelength of not more than 306 nm from outside and treating the light-emitting element with heat in a state in which a reverse voltage, or a forward voltage lower than a threshold voltage of the light-emitting element, or no voltage is applied to the light-emitting element. The removing of hydrogen in the p-type layer from the light-emitting element is performed in a N2 atmosphere at not less than 650° C. or in a N2+O2 atmosphere at not less than 500° C.

Abstract: Provided are an organic light-emitting display substrate and a manufacturing method thereof, and an organic light-emitting display device. A display area of the display substrate includes at least one opening. The display substrate includes a substrate, and an organic layer, a first inorganic layer, an anode layer and an organic functional layer that are sequentially arranged on one side of the substrate. The inorganic layer and the organic layer has at least one annular partition groove corresponding to each opening. A width of an orthographic projection of the notch of the annular partition groove on the substrate is smaller than that of an orthographic projection of the annular partition groove on the substrate. The functional layer includes a first organic functional material portion located outside the annular partition groove and a second organic functional material portion located inside the annular partition groove that are not connected.

Abstract: A controller of a quantum system identifies a phase update trigger for a quantum object of the quantum system and an interaction time. Responsive to identifying the phase update trigger, the controller determines, for between a first time and the interaction time, (a) a location/transport effect on a phase of the quantum object based on locations thereof and transport operations performed thereon, and (b) a quantum operation effect on the phase of the quantum object based on any quantum operations applied thereto. The immediately previous phase update for the quantum object occurred at the first time. Based on the location/transport effect, the quantum operation effect, and the interaction time, the controller determines an interaction time phase of the quantum object. The controller adjusts operation of a manipulation source such that a phase of a signal generated by the manipulation source corresponds to the interaction time phase at the interaction time.

Abstract: A manufacturing apparatus of a display device, includes: a first unit to transfer a plurality of light emitting elements on a growth substrate to a first film; a second unit to expand the first film; a third unit to retransfer the plurality of light emitting elements to a second film; a fourth unit to determine positions of the plurality of light emitting elements on the second film; a fifth unit to bin the light emitting elements on the second film, and determine an effective light source from among the light emitting elements; a sixth unit to form a plurality of pixels on a substrate, each pixel including a first bonding electrode; a seventh unit to remove the second film after transferring one light emitting element to the first bonding electrode of one pixel; and an eighth unit to form a second electrode on the one light emitting element.

Abstract: A light emitting element includes an n-side nitride semiconductor layer; an active layer disposed on the n-side nitride semiconductor layer and including a plurality of nitride semiconductor well layers and a plurality of nitride semiconductor barrier layers, the active layer being configured to emit ultraviolet light; and a p-side nitride semiconductor layer disposed on the active layer. At least one of the plurality of barrier layers including, successively from the n-side nitride semiconductor layer side, a first barrier layer containing Al and Ga, and a second barrier layer disposed in contact with the first barrier layer, containing Al, Ga, and In, and having a smaller band gap energy than the first barrier layer. At least one of the plurality of well layers is disposed in contact with a second barrier layer and has a smaller band gap energy than the second barrier layer.

Abstract: A method, apparatus and product includes obtaining a logical representation of a quantum circuit; modifying the quantum circuit to transfer a gate operation defined in a first cycle to be performed in a second cycle, thereby obtaining a modified quantum circuit, wherein said modifying does not change a functionality of the quantum circuit, and synthesizing the modified quantum circuit using a dynamic error correction scheme. The dynamic error correction scheme implements error correction operations using a first assignment of first physical qubits to a logical qubit for a first set of cycles and using a second assignment of second physical qubits to the logical qubit for a second set of cycles, wherein the first set of cycles comprises the first cycle, and the second set of cycles comprises the second cycle.

Abstract: A process for collectively fabricating a plurality of semiconductor structures comprises providing a substrate including a carrier having a main face, a dielectric layer on the main face of the carrier and a plurality of crystalline semiconductor growth islands on the dielectric layer. At least one crystalline semiconductor active layer is formed on the growth islands. After the step of forming the active layer, trenches are formed in the active layer and in the growth islands in order to define the plurality of semiconductor structures.

Abstract: A method for producing a semiconductor package, capable of suppressing damage of a device, and dissolving or softening a tacky layer quickly to peel off a reinforcing sheet, is provided. This method includes: providing a tacky sheet including a soluble tacky layer, making a first laminate, obtaining a second laminate having a second support substrate bonded to the first laminate, peeling off a first support substrate to obtain a third laminate, mounting a semiconductor chip thereon to obtain a fourth laminate, sealing a right end surface and a left end surface of the fourth laminate with sealing members and immersing a lower end surface of the fourth laminate selectively in a solution, giving a pressure difference between an inner space and the solution to allow the solution to penetrate into the internal space and dissolve or soften the soluble tacky layer, and peeling off the second support substrate.

Abstract: A semiconductor structure manufacturing method includes: providing a substrate; forming an initial trench in the substrate; forming a sacrificial layer, the sacrificial layer including a first portion and a second portion, the first portion filling the initial trench and the second portion covering an upper surface of the substrate and an upper surface of the first portion; forming a division groove in the second portion, to pattern the second portion into a sacrificial pattern, the sacrificial pattern being arranged corresponding to the first portion; forming a filling layer in the division groove, the filling layer filling the division groove; removing the sacrificial pattern and the first portion, to form a word line trench; and forming a buried gate word line in the word line trench.