Abstract: A process for collectively fabricating a plurality of semiconductor structures comprises providing a substrate including a carrier having a main face, a dielectric layer on the main face of the carrier and a plurality of crystalline semiconductor growth islands on the dielectric layer. At least one crystalline semiconductor active layer is formed on the growth islands. After the step of forming the active layer, trenches are formed in the active layer and in the growth islands in order to define the plurality of semiconductor structures.

Abstract: A method for producing a semiconductor package, capable of suppressing damage of a device, and dissolving or softening a tacky layer quickly to peel off a reinforcing sheet, is provided. This method includes: providing a tacky sheet including a soluble tacky layer, making a first laminate, obtaining a second laminate having a second support substrate bonded to the first laminate, peeling off a first support substrate to obtain a third laminate, mounting a semiconductor chip thereon to obtain a fourth laminate, sealing a right end surface and a left end surface of the fourth laminate with sealing members and immersing a lower end surface of the fourth laminate selectively in a solution, giving a pressure difference between an inner space and the solution to allow the solution to penetrate into the internal space and dissolve or soften the soluble tacky layer, and peeling off the second support substrate.

Abstract: A semiconductor structure manufacturing method includes: providing a substrate; forming an initial trench in the substrate; forming a sacrificial layer, the sacrificial layer including a first portion and a second portion, the first portion filling the initial trench and the second portion covering an upper surface of the substrate and an upper surface of the first portion; forming a division groove in the second portion, to pattern the second portion into a sacrificial pattern, the sacrificial pattern being arranged corresponding to the first portion; forming a filling layer in the division groove, the filling layer filling the division groove; removing the sacrificial pattern and the first portion, to form a word line trench; and forming a buried gate word line in the word line trench.

Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.

Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.

Abstract: A semiconductor package includes a lower semiconductor chip having a lower semiconductor substrate and upper pads on a top surface of the lower semiconductor substrate, an upper semiconductor chip stacked on the lower semiconductor chip, the upper semiconductor chip including an upper semiconductor substrate and solder bumps on a bottom surface of the upper semiconductor substrate, and a curing layer between the lower semiconductor chip and the upper semiconductor chip, the curing layer including a first curing layer adjacent to the upper semiconductor chip, the first curing layer including a first photo-curing agent, and a second curing layer between the first curing layer and the top surface of the lower semiconductor substrate, the second curing layer including a first thermo-curing agent.

Abstract: A system-in-package module includes a substrate, an application specific integrated circuit (ASIC) chip on the substrate, first wafer level package (WLP) memories on the substrate spaced apart from the ASIC chip in a first direction parallel to an upper surface of the substrate, and second WLP memories on the substrate spaced apart from the ASIC chip in a direction opposite to the first direction.

Abstract: The present disclosure provides to a method for preparing metal lines with a high aspect ratio comprising two photolithography stages. According to the design of the method of the present disclosure, first metal lines with high aspect ratio are formed in a dielectric layer, which provides a mechanical support to the first metal lines, thereby preventing the first metal lines from collapsing or deforming. Because of a significant reduction or elimination of collapse or deformation phenomenon in the semiconductor structure, a problem associated with short circuits due to direct contact between the semiconductor components can be mitigated, and reliability of the semiconductor structures can be enhanced. As a result, a yield of the semiconductor structure is increased.

Abstract: The present disclosure provides a semiconductor memory device with improved element performance and reliability. The semiconductor memory device comprises a substrate, a gate electrode extending in a first direction in the substrate, a plurality of buried contacts on the substrate, and a fence in a trench between adjacent ones of the buried contacts. The fence is on the gate electrode. The fence includes a spacer film on side walls of the trench and extending in a second direction intersecting the first direction, and a filling film in the trench and on the spacer film. An upper surface of the spacer film is lower than an upper surface of the filling film with respect to the substrate.

Abstract: A display comprises a transparent polymer support, an array of light emitters embedded in the support, and a redistribution layer. Each light emitter comprises electrode contacts that are substantially coplanar with a back surface of the support and emits light through a front surface of the support opposite the back surface when provided with power through the electrode contacts. The redistribution layer comprises a dielectric layer that is disposed on and in contact with the support back surface and distribution contacts that extend through the dielectric layer. Each of the distribution contacts is electrically connected to an electrode contact and is at least partially exposed.

Abstract: Disclosed are a transfer carrier and a manufacturing method thereof, and a method for transferring a light-emitting diode chip. The transfer carrier includes: a substrate having a plurality of via holes penetrating a thickness of the substrate, the substrate having a first surface and second surface which are opposite to each other; and thermoplastic structures filling corresponding ones of the via holes, one end of the thermoplastic structures protruding from the second surface of the substrate, and the other end covering a surrounding area on the first surface, of the corresponding via holes.

Abstract: A method is provided for making gratings of gold or other metal in silicon substrates. The disclosed method may achieve high aspect ratios. According to the disclosed method, a silicon wafer is through-etched. A seed layer of metal is vapor-deposited on one side of the wafer, and a layer of metal is electrodeposited on the seed layer. The electrodeposited metal plugs the trenches and provides a conductive surface for subsequent electrodeposition. The trenches are then filled by electrodeposition from within the trenches, so that the walls of the metal grating grow on the metal plugs.

Abstract: A magnetic light-emitting structure and fabrication method for manufacturing a magnetic light-emitting element are provided. The fabrication method comprises providing a magnetic metal composite substrate, wherein a second metal layer is respectively disposed on an upper and lower surface of a first metal layer; forming a connecting metal layer, an epitaxial layer and a plurality of electrode unit on top; and performing a complex process, which removes the second metal layer on the lower surface of the first metal layer and part of the first metal layer and performs cutting according to the number of the electrode unit, so as to form a plurality of epitaxial die. Each epitaxial die corresponds to an electrode unit to form a magnetic light-emitting element. The proposed method improves soft magnetic properties of an original substrate and enables dies to reverse spontaneously, thereby used perfectly for industrial mass transfer technology.

Abstract: Disclosed is a semiconductor device for improving a gate induced drain leakage and a method for fabricating the same, and the method may include forming a trench in a substrate, lining a surface of the trench with an initial gate dielectric layer, forming a gate electrode to partially fill the lined trench, forming a sacrificial material spaced apart from a top surface of the gate electrode and to selectively cover a top corner of the lined trench, removing a part of the initial gate dielectric layer of the lined trench which is exposed by the sacrificial material in order to form an air gap, and forming a capping layer to cap a side surface of the air gap, over the gate electrode.

Abstract: In a method for manufacturing a light-emitting element, a second irradiation process includes forming a first modified region at a first distance from a second surface in a thickness direction of a sapphire substrate, forming a second modified region at a second distance from the second surface in the thickness direction, the second distance being less than the first distance, the second modified region being shifted in a first direction from the first modified region, and forming a third modified region at a third distance from the second surface in the thickness direction, the third distance being less than the second distance, the third modified region overlapping the first modified region in a top-view. In the thickness direction of the sapphire substrate, a greater number of modified regions that include second modified portions are formed than modified regions that include first modified portions.

Abstract: A light source includes an array of light emitters, with at least some light emitters having a central patterned surface and an unpatterned border; a light blocking metal layer positioned between each of the array of light emitters; and down-converter material positioned on each of the array of light emitters.

Abstract: A method of manufacturing a light-emitting element includes: providing a semiconductor structure including: a first layer containing gallium and nitrogen, a second layer of a first conductive type, the second layer containing gallium, aluminum, and nitrogen and being located on or above the first layer, an active layer located on or above the second layer, and a third layer of a second conductive type, the third layer located on or above the active layer, wherein a thickness of the first layer is larger than a thickness of the second layer; performing chemical-mechanical polishing from a first layer side to reduce the thickness of the first layer; and performing dry etching from the first layer side to remove the first layer and reduce the thickness of the second layer.

Abstract: A light emitting element includes a substrate and a semiconductor structure. The substrate has a hexagonal shape in a top view. The semiconductor structure is disposed on an upper surface of the substrate. The first lateral surface of the substrate includes a first region including a modified region, the first region having an elongated shape extending along a first direction, a second region including a modified region, the second region having an elongated shape, and the first region and the second region being aligned along the first direction, and a third region disposed between the first region and the second region, the third region having a surface state different from a surface state of the first region or a surface state of the second region.

Abstract: A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; depositing a first dielectric layer and a second dielectric layer over the substrate; performing a first treatment by introducing a trap-repairing element on the first and second dielectric layers; forming a dummy gate electrode over the second dielectric layer; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; and forming an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions.

Abstract: Provided is a method for manufacturing a semiconductor nanoparticle, the method includes performing a heat treatment of a first mixture containing a silver (Ag) salt, an alkali metal salt, a salt containing at least one of indium (In) and gallium (Ga), a sulfur source, and an organic solvent. A ratio of the number of atoms of an alkali metal to the total number of atoms of Ag and the alkali metal in the first mixture is greater than 0 and less than 1.