Abstract: A method for arbitrating cluster includes: setting heartbeat between every two adjacent nodes in the cluster; in response to disconnection of heartbeat among nodes occurs, dividing the nodes into a plurality of sub-clusters, and determining whether the sub-cluster having a largest number of nodes is unique; in response to the sub-cluster having the largest number is not unique, selecting one node in the sub-clusters having the largest number of nodes, to make the selected nodes send a request of reservation to a logical volume of a third-party storage; in response to success of reservation of node, determining whether data for arbitrating in the logical volume of the third-party storage is valid; and in response to the data is invalid, writing information for arbitrating of the node of success into the logical volume, to make the sub-cluster, to which the node belongs, obtain a control right of the cluster.

Abstract: A method, computer program product, and computing system for receiving a plurality of physical layer blocks (PLBs). A subset of PLBs may be selected from the plurality of PLBs for combining into a combined PLB based upon, at least in part, a utilization of each PLB of the plurality of PLBs, an average compression per active virtual, and a number of free PLBs generated when combining into the combined PLB. One or more PLBs of the subset of PLBs may be compressed based upon, at least in part, the average compression per active virtual. The one or more PLBs of the subset of PLBs may be combined into the combined PLB.

Abstract: Performance optimization is achieved by clarifying cache usage characteristics of each application from usage conditions of physical resources (caches) in real time and automatically controlling the cache usage amount of each application. Thus, a system includes a main memory to and from which data is written and read, a level 3 cache memory which can be accessed faster than the main memory, a CPU core configured to execute processing by performing write and read to and from the memory and the cache, a usage amount measurement unit configured to measure a usage condition of a cache of each virtual machine (13a to 13c) executed by the CPU core, an allocation amount calculation unit configured to calculate cache capacity to be allocated to each virtual machine (13a to 13c) from the usage condition, and a control unit configured to allocate the cache capacity to each virtual machine (13a to 13c).

Abstract: A data storage method includes: obtaining memory banks of arithmetic data; generating undetermined memory bank numbers of the memory banks sequentially; scanning storage dimensions of the arithmetic data to obtain the undetermined memory bank numbers, filling elements to make the undetermined memory bank numbers continuous if the undetermined memory bank numbers of two adjacent dimensions are not continuous; taking as a current transformation vector through a greedy algorithm a determined transformation vector where conflict is least and the number of the filling elements is smallest; generating current memory bank numbers of the memory banks according to the current transformation vector; converting each of the current memory bank numbers into a physical storage bank address through an offset function to obtain a corresponding internal offset address; and storing the arithmetic data into the memory banks according to the current memory bank numbers and the internal offset addresses.

Abstract: An apparatus is described that includes a memory card. The memory card also includes volatile memory devices. The memory card also includes non volatile memory devices. The memory card is configurable to implement a first portion of the storage space of the non volatile memory devices as system memory. The memory card also includes a controller to manage, upon a power down event, the transfer of information from the volatile memory devices into a second portion of the storage space of the non volatile memory devices.

Abstract: Local memory and disaggregated memory may be identified and monitored for integrating disaggregated memory in a computing system. Candidate data may be migrated between the local memory and disaggregated memory to optimize allocation of disaggregated memory and migrated data according to a dynamic set of migration criteria.

Abstract: An apparatus includes at least one processing device configured to establish a plurality of paths between at least one initiator of a host device and a plurality of targets of respective storage nodes of a distributed storage system, and for each of a plurality of input-output operations generated in the host device for delivery to the distributed storage system: to access a target lookup service of the host device to determine a particular one of the storage nodes that stores data for a logical storage volume and offset targeted by the input-output operation, to select a particular one of the plurality of paths from the initiator to one of the targets on the particular storage node, and to send the input-output operation to the particular storage node over the selected path. The initiator and the targets are illustratively configured in accordance with a designated standard storage access protocol.

Abstract: A memory controller that controls a nonvolatile memory in response to commands from a host includes a normal transfer queue and a priority transfer queue, a transfer packet priority determination unit, a transfer queue selector, and a transfer packet selector. The transfer packet priority determination unit determines whether a transfer packet is a priority packet based on transmission information of the transfer packet. The transfer queue selector selects the priority transfer queue and stores the transfer packet in the priority transfer queue if the transfer packet is determined as a priority packet, and selects the normal transfer queue and stores the transfer packet in the normal transfer queue if the transfer packet is not determined as a priority packet. The transfer packet selector transfers to the host a priority packet stored in the priority transfer queue preferentially with respect to a normal packet stored in the normal transfer queue.

Abstract: Embodiments include herein are directed towards a double data rate (“DDR”) controller system. Embodiments may include a plurality of read data buffers, wherein each of the plurality of read data buffers is configured for read data storage and is of a same size. Embodiments may further include a port read response queue that stores information corresponding to an incoming read and a command queue configured to receive read data buffer state information from the port read response queue. Embodiments may also include a read data buffer allocation tracker configured to track a state of each of the plurality of read data buffers.

Abstract: A computer program product and corresponding computer-implemented method cause the performance of various operations to upgrade a network storage device having first and second storage controllers operating in an active-passive mode and disk media shared by the storage controllers. The first storage controller operating as a passive storage controller is caused to enter a new IQN for each virtual disk into a first iSCSI target configuration file and maintain a corresponding old IQN. The first storage controller is then caused to begin operating as the active storage controller so that the second storage controller, while operating as the passive storage controller, is caused to enter the new IQN for each virtual disk into a second iSCSI target configuration file and maintain the corresponding old IQN. Accordingly, the first and second iSCSI target configuration files map both the old and new IQNs to the virtual disks.

Abstract: Nonsequential readahead based on data access patterns, the method comprising: determining a set of access patterns for stored content; determining, based on the set of access patterns, a list of storage locations for content expected to be used; and prefetching, based on the list of storage locations for content expected to be used, one or more data objects.

Abstract: Nonsequential readahead for deep learning training that includes: receiving an indication of a list of batch storage locations for a batch of data objects; prefetching, for each storage location in the list of batch storage locations, storage content corresponding to the batch of data objects; and storing the storage content corresponding to the batch of data objects within a cache accessible to an artificial intelligence workflow.

Abstract: A method includes determining, in accordance with a first ordering, a plurality of read requests for a memory device. The plurality of read requests are added to a memory device queue for the memory device in accordance with the first ordering. The plurality of read requests in the memory device queue are processed, in accordance with a second ordering that is different from the first ordering, to determine read data for each of the plurality of read requests. The read data for the each of the plurality of read requests is added one of a set of ordered positions, based on the first ordering, of a ring buffer as the each of the plurality of reads requests is processed. The read data of a subset of the plurality of read requests is submitted based on adding the read data to a first ordered position of the set of ordered positions of the ring buffer.

Abstract: Various implementations described herein relate to systems and methods for enabling a data lane for communicating messages for each of a plurality of regions of a non-volatile memory. Each of the plurality of regions includes a plurality of dies. The messages for each of the plurality of regions are communicated via the data lane.

Abstract: An apparatus comprises a first processing device, the first processing device comprising a physical hardware controller configured for coupling with a second processing device. The first processing device is configured to identify remote storage service instances attached to the second processing device, and to initiate storage emulation modules for the remote storage service instances attached to the second processing device, the storage emulation modules emulating physical storage devices configured for attachment to the second processing device.

Abstract: A data storage system with interconnected compute nodes includes a shared memory with volatile and non-volatile portions. Data tracks evicted from the volatile portion are moved to the non-volatile portion based on a cache-miss interarrival rate threshold that is calculated based on capacity and fall-through time of the non-volatile portion of the shared memory. Data extents on non-volatile drives are characterized based on dominant modes of extent-level cache-miss interarrival histograms generated using countdown timers of most recent backend accesses of sub-extents. The dominant mode of the extent in which a backend track evicted from the volatile portion of the shared memory resides is compared with the threshold in order to determine whether to move the backend track to the non-volatile portion of the shared memory.

Abstract: Administering storage access in a cloud-based storage system includes: acquiring, by a first storage controller, in response to a protocol request for exclusive access to an area of storage, a first lease for the area of storage of the cloud-based storage system; and storing, by the first storage controller, a first identifier for the first lease in a predefined portion of the area of storage, where the predefined portion of the area of storage is accessible to a second storage controller.

Abstract: Systems and methods provide alternative store-and-forward mechanisms to utilize a Non-Volatile Memory Express (NVMe™) drive's Controller Memory Buffer (CMB) instead of using a fabric bridge's memory resources to increase overall throughput. In various embodiment this successfully avoids performance scaling limitations of a centralized store-and-forward memory location for data input/output, within a large disk-array, that may otherwise oversubscribe the available memory space.

Abstract: Techniques are provided for latency-based detection of storage volume type. One method comprises sending read commands using a predefined read command sequence to a recipient storage volume, wherein the predefined read command sequence specifies a request size and/or an offset of at least two of the read commands, and wherein an entity associated with a recipient storage volume of a predefined storage volume type is configured to insert a predefined delay before sending a response to at least one of the read commands when the entity detects the predefined read command sequence; evaluating whether the response to at least one of the read commands comprises the predefined delay; and determining whether the recipient storage volume is the predefined storage volume type based on a result of the evaluating. The recipient storage volume may comprise a storage volume and/or a storage data client that exposes a virtual storage volume.

Abstract: A computer system includes a memory controller and a non-volatile dual in-line memory module (NVDIMM) connected to the memory controller. The NVDIMM comprises a non-volatile memory (NVM) for storing data and a media controller. After receiving a read command for reading first data stored in the NVDIMM from the memory controller, the media controller reads multiple data subblocks of the first data from the NVM. After sending multiple ready signals to notify the memory controller that multiple data subblocks of the first data are available, the media controller receives multiple send commands for fetching the multiple data subblocks. The media controller then transmits to the memory controller the multiple data subblocks in response to the multiple send commands.