Patents Examined by Brian R. Peugh
  • Patent number: 11669256
    Abstract: A method for managing storage resources in a network system is described. The method includes registering, by a storage resource controller, with a network repository function; receiving, by the storage resource controller, an operation request from a consumer service; selecting, by the storage resource controller, a resource management instance from a plurality of resource management instances managed by the storage resource controller for assignment to the consumer service; forwarding, by the storage resource controller, the operation request to the selected resource management instance; receiving, by the storage resource controller, an operation response from the selected resource management instance; and forwarding, by the storage resource controller, the operation response to the consumer service.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: June 6, 2023
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Maria Cruz Bartolomé Rodrigo, Antonio Alonso Alarcon
  • Patent number: 11669275
    Abstract: A host operation to be performed can be received. Sub-operations that are associated with the received host operation can be determined. A memory component of multiple memory components can be identified for each sub-operation. Furthermore, each sub-operation can be transmitted to a media sequencer component that is associated with a respective memory component of the memory components.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: June 6, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jiangli Zhu, Cheng Yuan Wu, Ying Yu Tai
  • Patent number: 11669251
    Abstract: Apparatuses and methods related to updating data lines for data generation in, for example, a memory device or a computing system that includes a memory device. Updating data lines can include updating a plurality of data lines. The plurality of data lines can provide data form the memory array responsive to a receipt of the access command. The plurality of data lines can also be updated responsive to a determination that an access command received at a memory device is unauthorized.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: June 6, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Debra M. Bell, Naveh Malihi
  • Patent number: 11662925
    Abstract: A data processing method is provided. The method is implemented in a distributed storage system including at least two storage disk clusters. The at least two storage disk clusters are configured with at least two energy saving states. The method includes: receiving, by a processing module of the distributed storage system, a read request including an identifier of to-be-processed data; reading metadata of the to-be-processed data based on the identifier of the to-be-processed data, to determine a first storage disk cluster and a second storage disk cluster, where the first storage disk cluster and the second storage disk cluster are configured with different energy saving states; and reading first sub-data from the first storage disk cluster, and after the first sub-data is read, reading second sub-data from the second storage disk cluster.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 30, 2023
    Assignee: HUAWEI CLOUD COMPUTING TECHNOLOGIES CO., LTD.
    Inventors: Xinjie Li, Rongfeng He, Bin Zhu, Suhong Wu, Xieyun Fang
  • Patent number: 11662915
    Abstract: A method begins by a processing module of a storage network analyzing storage network memory for a level of usability and based on the analyzing, selecting alternative memory available for receipt of encoded data slices stored in current memory, where a data object is segmented into a plurality of data segments and a data segment of the plurality of data segments is dispersed error encoded in accordance with dispersed error encoding parameters to produce a set of encoded data slices. The method continues with the processing module determining whether to move encoded data slices from current memory to alternative memory and based on a determination to move slices, allocating alternative memory. Finally, the processing module moves at least some encoded data slices from a current memory to alternate memory and updates a memory assignment mechanism for the at least some encoded data slices.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: May 30, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Gary W. Grube, Jason K. Resch, Timothy W. Markison, Ilya Volvovski, Manish Motwani
  • Patent number: 11656799
    Abstract: Systems, apparatuses, and methods related to media type selection are described. Memory systems can include multiple types of memory media (e.g., volatile and/or non-volatile) and can write data to the memory media types. Data inputs can be written (e.g., stored) in a particular type of memory media based on characteristics (e.g., source, attributes, and/or information etc. included in the data). For instance, selection of memory media can be based on characteristics of the memory media type and the attributes of the data input. In an example, a method can include receiving, by a memory system that comprises a plurality of memory media types, data from at least one of a plurality of sensors, identifying one or more attributes of the data; and selecting, based at least in part on the one or more attributes of the data, one or more of the memory media types to write the data to.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: May 23, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Zahra Hosseinimakarem, Carla L. Christensen, Radhika Viswanathan, Bhumika Chhabra
  • Patent number: 11645014
    Abstract: Example implementations relate to disaggregated storage systems. An example method may include initializing a plurality of level 1 (L1) clusters in a disaggregated storage system, where each L1 cluster includes multiple compute nodes. The method may also include electing an L1 leader node in each L1 cluster, and forming a level 2 (L2) cluster including the L1 leader nodes. The method may include electing an L2 leader node by the L1 leader nodes included in the L2 cluster.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: May 9, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Matthew D. Bondurant, Benjamin Simpson
  • Patent number: 11630603
    Abstract: A process includes, responsive to a first epoch of a sequence of epochs, a plurality of processors accessing first entries of a first buffer that is shared among the plurality of processors. The first entries identify a first subset of hardware devices to be polled of a plurality of hardware devices. Responsive to the accessing, the plurality of processors poll the first subset of hardware devices. Responsive to the first epoch, the process includes, responsive to results of the polling, the plurality of processors updating delay orders that are associated with the first subset of hardware devices; and the plurality of processors adding second entries identifying the first subset of hardware devices to a plurality of second buffers based on the delay orders, where each second buffer of the plurality of second buffers corresponds to a different delay order of the delay orders.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: April 18, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Matthew S. Gates
  • Patent number: 11630608
    Abstract: Various embodiments set forth techniques for managing metadata associated with a vblock, In some embodiments, one or more computer-readable media store instructions that, when executed by one or more processors, cause the one or more processors to perform steps including receiving a request to write data to a live vblock, wherein the request to write data is a first write request for the live vblock; accessing a merged metadata record associated with the live vblock, wherein the merged metadata record comprises metadata corresponding to metadata in metadata records for all but a last snapshot included in a set of snapshots having a metadata record; adding metadata associated with the request to write data to a metadata record for the live vblock; merging a metadata record for the last snapshot into the merged metadata record; and updating a first identifier of the merged metadata record to identify the live vblock.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: April 18, 2023
    Assignee: NUTANIX, INC.
    Inventors: Kamalneet Singh, Rishi Bhardwaj, Karan Gupta, Vanita Prabhu
  • Patent number: 11615027
    Abstract: A memory request, including an address, is accessed. The memory request also specifies a type of an operation (e.g., a read or write) associated with an instance (e.g., a block) of data. A group of caches is selected using a bit or bits in the address. A first hash of the address is performed to select a cache in the group. A second hash of the address is performed to select a set of cache lines in the cache. Unless the operation results in a cache miss, the memory request is processed at the selected cache. When there is a cache miss, a third hash of the address is performed to select a memory controller, and a fourth hash of the address is performed to select a bank group and a bank in memory.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: March 28, 2023
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Richard E. Kessler, David Asher, Shubhendu S. Mukherjee, Wilson P. Snyder, II, David Carlson, Jason Zebchuk, Isam Akkawi
  • Patent number: 11615021
    Abstract: A method for configuring a computer system memory, includes powering on the computer system; retrieving options for initializing the computer system; assigning to a first segment of the memory a first pre-defined setting; assigning to a second segment of the memory a second pre-defined setting; and booting the computer system.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: March 28, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Paul Dennis Stultz, James T Bodner, Kevin G Depew
  • Patent number: 11614866
    Abstract: A nonvolatile memory device includes a nonvolatile memory, a volatile memory being a cache memory of the nonvolatile memory, and a first controller configured to control the nonvolatile memory. The nonvolatile memory device further includes a second controller configured to receive a device write command and an address, and transmit, to the volatile memory through a first bus, a first read command and the address and a first write command and the address sequentially, and transmit a second write command and the address to the first controller through a second bus, in response to the reception of the device write command and the address.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 28, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngjin Cho, Sungyong Seo, Sun-Young Lim, Uksong Kang, Chankyung Kim, Duckhyun Chang, JinHyeok Choi
  • Patent number: 11599279
    Abstract: In an information processing system, a storage control server (storage control node) that has received a read request of data from a compute server (compute node) transmits the read request to a drive box. The drive box that has received the read request from the storage control server reads encrypted read target data corresponding to the read request from non-volatile storage media, decrypts the read target data with key data acquired at a predetermined timing, and then transmits the decrypted read target data to the compute server as a read request source.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: March 7, 2023
    Assignee: HITACHI, LTD.
    Inventors: Tatsuya Hirai, Masakuni Agetsuma, Yoshinori Ohira, Takahiro Yamamoto
  • Patent number: 11599285
    Abstract: A data memory system is described, where there may be an asymmetry in the time needed to write or erase data and the time needed to read data. The data may be stored using a RAID data storage arrangement and the reading, writing and erasing operations on the modules arranged such that the erasing and writing operations may be performed without significant latency for performing a read operation. Where a failure of a memory module in the memory system occurs, methods for recovering the data of the failed module are disclosed which may selected in accordance with policies that may relate to the minimizing the possibility of irretrievable data loss, or degradation of latency performance.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: March 7, 2023
    Assignee: Innovations In Memory LLC
    Inventor: Jon C. R. Bennett
  • Patent number: 11586944
    Abstract: An apparatus comprises: a prediction storage structure comprising a plurality of prediction state entries representing instances of predicted instruction behaviour; prediction training circuitry to perform a training operation to train the prediction state entries based on actual instruction behaviour; prediction circuitry to output at least one control signal for triggering a speculative operation based on the predicted instruction behaviour represented by a prediction state entry for which the training operation has provided sufficient confidence in the predicted instruction behaviour; an allocation filter comprising at least one allocation filter entry representing a failed predicted instruction behaviour for which the training operation failed to provide said sufficient confidence; and prediction allocation circuitry to prevent allocation of a new entry in the prediction storage structure for a failed predicted instruction behaviour represented by an allocation filter entry of the allocation filter.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: February 21, 2023
    Assignee: Arm Limited
    Inventors: Luc Orion, Houdhaifa Bouzguarrou, Guillaume Bolbenes, Eddy Lapeyre
  • Patent number: 11586501
    Abstract: A memory system uses a dynamic RAID scheme to dynamically encode RAID address space geometries. The dynamic RAID scheme solves issues with the algorithmic layout approach and flat virtual address space used in conventional RAID systems. The dynamic RAID scheme can be used for any RAID algorithm and does not require static mapping. In other words, there is no requirement that each strip be located in the same relative location in memory devices and there is no requirement that stripes use the same combination of memory devices.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: February 21, 2023
    Assignee: Innovations In Memory LLC
    Inventors: Timothy Stoakes, Mark Lewis
  • Patent number: 11586375
    Abstract: Systems and methods are provided for conducting incremental restore operations on block storage volumes using an object-based snapshot. A full restore from an object-based snapshot can include copying all blocks of a data set from the object-based snapshot to a destination volume. For high capacity volumes, full restores may take large amounts of time. Moreover, full restores may be inefficient where a destination volume already contains some data of the snapshot. Embodiments of the present disclosure provide for incremental restore operations, where a delta data set is transferred from the snapshot to the destination volume, representing data in the snapshot is not known to already exist on the volume or another available volume.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: February 21, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Venkatesh Nagapudi, Sandeep Kumar, Archana Padmasenan
  • Patent number: 11579780
    Abstract: Example implementations described herein involve systems and methods which automatically determine volumes to be replicated for disaster recovery based on the execution priority of an application which uses the volumes. Such example implementations can involve systems and methods involving creating a volume in a first storage system for each of one or more containers newly launched on one or more servers managing a container orchestrator; and establishing replication of the volume for the each of the newly launched one or more containers to a second storage system in order from highest container priority to lowest container priority.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 14, 2023
    Assignee: HITACHI, LTD.
    Inventors: Akiyoshi Tsuchiya, Tomohiro Kawaguchi
  • Patent number: 11573860
    Abstract: A method for verifying a consistency of snapshot metadata maintained in an ordered data structure for a plurality of snapshots in a snapshot hierarchy is provided. The method includes identifying a first plurality of nodes maintained in a first ordered data structure for a first snapshot that is a child of a second snapshot; for a first node of the first plurality of nodes, verifying the first node by checking for the first node in a second node map maintained in memory for the second snapshot, wherein the second node map includes a plurality of verified nodes in a second ordered data structure; and based on whether the first node is in the second node map: adding the first node to a first node map maintained in memory for the first snapshot, wherein the first node map includes verified nodes of the first plurality of nodes; or triggering an alarm.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: February 7, 2023
    Assignee: VMware, Inc.
    Inventors: Enning Xiang, Wenguang Wang, Mrityunjay Kumar
  • Patent number: 11567971
    Abstract: A method of processing data in a system having a host and a storage node may include performing a shuffle operation on data stored at the storage node, wherein the shuffle operation may include performing a shuffle write operation, and performing a shuffle read operation, wherein at least a portion of the shuffle operation is performed by an accelerator at the storage node. A method for partitioning data may include sampling, at a device, data from one or more partitions based on a number of samples, transferring the sampled data from the device to a host, determining, at the host, one or more splitters based on the sampled data, communicating the one or more splitters from the host to the device, and partitioning, at the device, data for the one or more partitions based on the one or more splitters.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: January 31, 2023
    Inventors: Hui Zhang, Joo Hwan Lee, Yiqun Zhang, Armin Haj Aboutalebi, Xiaodong Zhao, Praveen Krishnamoorthy, Andrew Chang, Yang Seok Ki