Abstract: A system and method for providing assisted manual testing of computer related devices. Test commands are routed from a user system through a proxy module to a device under test. The responses of the device are routed through the proxy module to a user system. A user interface is run on the user system that allows the user to view the responses of the device in a log with the issued test commands. The user interface includes annotation dialog boxes and fields, highlighting elements and flagging elements through which a user can annotate and create notes for the test log as the test is being run on the device. Through the proxy module, a third party can act as a user and view the test log and user created annotations and notes as the test is being run on the device. The test log, annotation and notes can also be stored by the proxy module so that a third party can view them at a later time.

Abstract: Test executive system and method of use. The system includes a test executive engine, configured to execute at least one test executive sequence to test at least one unit under test (UUT), a process model that specifies one or more function sequences for pre-test or post-test functionality for the test executive sequences, and a plug-in framework, configured to selectively incorporate one or more process model plug-in instances in the process model. Each process model plug-in instance specifies at least one respective function sequence for pre-test or post-test functionality for the test executive sequences.

Abstract: Systems and methods for detecting anomalies within a multi-tenant environment are described. Diagnostic tests are performed on one or more components, such as host computing devices. The one or more components send resulting diagnostic information to an electronic device such as a monitoring component that processes the diagnostic information. The electronic device determines whether one or more properties, such as errors, are comprised within the one or more components. Based at least in part on properties that may be found, a correlation may be made between at least two properties.

Abstract: A method for data storage includes reading storage values, which represent stored data, from a group of memory cells using read thresholds, and deriving respective soft reliability metrics for the storage values. The storage values are classified into two or more subgroups based on a predefined classification criterion. Independently within each subgroup, a subgroup-specific distribution of the storage values in the subgroup is estimated, and the soft reliability metrics of the storage values in the subgroup are corrected based on the subgroup-specific distribution. The stored data is decoded using the corrected soft reliability metrics.

Abstract: A system for applying a recovery mechanism to a network of medical diagnostics instruments is provided herein. The system includes the following: a plurality of medical diagnostics instruments, each associated with a network connected component; a plurality of communication modules, each associated with a corresponding one of the plurality of network connected components, wherein each one of the plurality of communication modules is arranged to report on malfunctioning components that are network connected with the corresponding component, and a recovery module, configured to: (i) obtain reports from the communication modules; (ii) re-establish the malfunctioning components; and (iii) notify all communication modules of the re-establishment of the malfunctioning components, wherein the communication modules are further configured to re-establish connection between the corresponding components and the re-established components.

Abstract: An integrated circuit (IC) operable in functional and debug modes includes a debug enable circuit, a pad control register, a debug circuit, a pad configuration register, and an input/output (IO) pad. The debug circuit receives a functional signal from a circuit monitoring circuit, a reference signal, a debug control signal from the debug enable circuit, and pull-enable control and pull-type select control signals from the pad control register, and generates pull-enable and pull-type select signals. The pad configuration register receives the pull-enable and pull-type select signals and configures the IO pad in one of logic low, logic high, and high impedance states. When the IO pad is in either of the logic high and low states longer than a predetermined time period, then the IO pad indicates that the IC is held in a reset phase of a reset sequence.

Abstract: A method and apparatus are provided for transmitting and receiving information in a broadcasting/communication system. The method includes comparing a number of bits of an information word to be transmitted with a predetermined threshold value; if the number of bits of the information word is less than the predetermined threshold value, determining a first parameter pair; if the number of bits of the information word is not less than the predetermined threshold value, determining a second parameter pair; determining a number of bits to be punctured based on one of the first parameter pair and the second parameter pair; and puncturing the determined number of bits to be punctured, with respect to parity bits of a codeword generated by encoding the information word.

Abstract: An apparatus comprising a plurality of devices connected in series with one another, each of the devices comprising a test enable pin for receiving a test enable signal that indicates enablement of a test mode, and a test output pin for outputting a test output signal in the test mode, and a controller coupled to the devices and comprising an additional test output pin for outputting a test channel output signal, wherein a failure of at least one of the test output signals and the test channel output signal indicates the existence of one or more potential defects associated with the plurality of devices and the controller.

Abstract: An integrated circuit memory includes a memory array, including a plurality of data lines. A buffer structure is coupled to the plurality of data lines, including a plurality of storage elements to store bit-level status values for the plurality of data lines. The memory includes logic to indicate bundle-level status values of corresponding bundles of storage elements in the buffer structure based on the bit-level status values of bits in the corresponding bundles. A plurality of bundle status circuits is arranged in a daisy chain and coupled to respective bundles in the buffer structure, producing an output of the daisy chain indicating detection of a bundle in the first status. Control circuitry executes cycles to determine the output of the daisy chain, each cycle clearing a bundle status circuit indicating the first status if the output indicates detection of a bundle in the first status in the cycle.

Abstract: Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets, including: determining, by a socket configuration module, a number of CPUs to be utilized during operation of the computing system; determining, by the socket configuration module, error characteristics associated with each available CPU, wherein the error characteristics associated with each available CPU include error information for computing devices that are coupled to one or more of the available CPUs; and selecting, by the socket configuration module in dependence upon the error characteristics associated with each available CPU and a predetermined error tolerance policy, a target CPU to utilize as a boot CPU.

Abstract: A circuit provides parallel computation of error codes for simultaneously received words. The words received simultaneously may be portions of a common data message, or may be portions of distinct data messages. Accordingly, the circuit selectively accumulates the error codes based on their association with successive data words, outputting an accumulated error code when the last word of a data message has been received and the respective error code is calculated. Based on such information, the error codes calculated in parallel can be output independently, accumulated with one another, or accumulated with the error codes of a previous or subsequent calculation cycle. Thus, the circuit dynamically provides a single parallel error code generation of a given width or multiple parallel error code generations, each of a width divisible by the given width.

Abstract: A computer-implemented method for predictively preparing restore packages may include (1) monitoring a computing system for evidence of potential data failures within the computing system, (2) detecting evidence that indicates a potential data failure within the computing system while monitoring the computing system, (3) predicting a scope of the potential data failure based at least in part on the evidence that indicates the potential data failure, and then (4) preparing a restore package configured to restore at least a portion of data implicated by the predicted scope of the potential data failure prior to detecting a request to initiate a restore operation in connection with the potential data failure. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Example apparatus and methods treat some erasure codes differently than other erasure codes. For example, erasure codes that are only involved in error-recovery may never be read and thus may be stored using a different approach than erasure codes that are involved in more regular data reading. If different types of data stores are available, then the erasure codes that are more likely to be read may be stored in data stores having a first (e.g., higher, faster) type of read performance while the erasure codes that are less likely to be read may be stored in data stores having a second (e.g., lower, slower, less expensive) type of read performance. Different data stores may be located on different data storage devices. Different data stores may even be located on a single data storage device.

Abstract: A method of fault testing in a storage device comprises testing, in accordance with a storage device testing protocol, operability of a plurality of distinct portions on the storage device. The testing includes, for each of the plurality of distinct portions on the storage device: performing one or more operations on a respective portion of the storage device; recording data corresponding to electrical current drawn during performance of the one or more operations on the respective portion of the storage device; analyzing the recorded data, including determining whether one or more predefined characteristics of the recorded data meets predetermined failure criteria; and, in accordance with a determination that the recorded data meets the predetermined failure criteria, performing one or more remedial actions including updating a mapping of the storage device to mark the respective portion as a known-bad portion.

Abstract: The present application relates to an apparatus for detecting software interference and the method of operating thereof. A processor and at least one shared resource form a computing shell to execute a first, functional safety critical application and at least one second application in time-shared operation. One or more performance counters are provided to adjust a counter value in response to a performance related event. A reference value storage stores one or more threshold values, each of which is associated with one of the performance counters. A comparator receives the performance counter values, compares the performance counter values with the respective threshold values and generates at least one comparison signal in response to results of the comparisons. An interference indication generator receives the at least one comparison signal and generates at least one interference indication in response to the at least one received comparison signal.

Abstract: A method of encoding a data set including one or more n-bit pre-coded symbols in an encoder of a computing system includes determining a plurality of n+2-bit code words, each of the plurality of n+2-bit code words having two or greater Hamming distance from one another. The method further includes mapping each of the plurality of n+2-bit code words to a corresponding source symbol, receiving the one or more n-bit pre-coded symbols at the encoder, matching each n-bit pre-coded symbol to a corresponding n+2-bit code word based on the mapping to produce encoded data. and outputting the encoded data.

Abstract: A hinge path is used to determine if a first possible root is a root of an error location polynomial. A positive limb path is used to determine if a second possible root is a root of the error location polynomial, including by using a sequence of coefficients associated with the error location polynomial. The sequence of coefficients is reversed and a negative limb path is used to determine if a third possible root is a root of the error location polynomial, including by using the reversed sequence of coefficients, wherein the negative limb path is a copy of the positive limb path.

Abstract: A method of fault detection includes, while in normal operation: recording data corresponding to measurements of electrical current drawn during performance of a respective operation on a specified portion of a storage device; analyzing the recorded data, including determining whether one or more predefined characteristics of the recorded data meets predetermined failure criteria; and in accordance with a determination that the recorded data meets the predetermined failure criteria, performing one or more remedial actions, the one or more remedial actions including marking the specified portion as a known-bad portion.

Abstract: A dynamic, lazy type system is provided for a dynamic, lazy programming language. Consequently, programs can benefit from runtime flexibility and lightweight notation in combination with benefits afforded by a substantial type system.

Abstract: A dispersed storage processing unit selects a slice length for a data segment to be stored in a dispersed storage network (DSN). The data segment is encoded using a dispersed storage error coding function to produce a set of data slices in accordance with the slice length. A storage file is selected based on the slice length. A storage file identifier (ID) is generated that indicates the storage file. A set of DSN addresses are generated corresponding to the set of data slices, wherein the set of DSN addresses each include the storage file ID and a corresponding one of a plurality of offset identifiers (IDs). The set of data slices are written in accordance with the set of DSN addresses. A directory is updated to associate the set of DSN addresses with an identifier of the data segment.