Patents Examined by Bryce Bonzo
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Patent number: 9436576Abstract: Methods and apparatus are disclosed to capture error conditions in lightweight virtual machine managers. A disclosed example method includes defining a shared memory structure between the VMM and a virtual machine (VM), when the VM is spawned by the VMM, installing an abort handler on the VM associated with a vector value, in response to detecting an error, transferring VMM state information to the shared memory structure, and invoking the abort handler on the VM to transfer contents of the shared memory structure to a non-volatile memory.Type: GrantFiled: June 29, 2012Date of Patent: September 6, 2016Assignee: Intel CorporationInventors: Bing Zhu, Peng Zou, Madhukar Tallam, Luhai Chen, Kai Wang
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Patent number: 9430325Abstract: A method for programming data, a memory storage device and a memory control circuit unit are provided. The method includes: receiving a writing command which instructs to write data to a logical address belonging to a logical programming unit; if a physical erasing unit of a physical programming unit which the logical programming unit is mapped to is a first type physical erasing unit, programming the data and a parity code corresponding to the data into the physical programming unit according to a first code rate; and if the physical erasing unit is a second type physical erasing unit, programming the data and the parity code corresponding to the data into the physical programming unit according to a second code rate. The first code rate is higher than the second code rate. Therefore, the lifespan of the physical erasing unit having a higher bit error rate may be extended.Type: GrantFiled: June 12, 2014Date of Patent: August 30, 2016Assignee: PHISON ELECTRONICS CORP.Inventor: Ming-Jen Liang
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Patent number: 9430326Abstract: Methods for writing multiple codewords having multiple sizes to a solid-state device are provided. In one aspect, a method includes receiving a plurality of host data units for storage in a solid-state non-volatile memory. The method includes dividing the plurality of host data units among a plurality of data payloads, wherein a first data payload comprises a first host data unit and a second data payload comprises a portion of a second host data unit. The method includes encoding the first data payload into a first codeword having a first codeword size. The method includes encoding the second data payload into a second codeword having a second codeword size, the second codeword size being different from the first codeword size. The method includes writing the first codeword and the second codeword to a first page in the solid-state non-volatile memory. Systems and machine-readable media are also provided.Type: GrantFiled: July 22, 2014Date of Patent: August 30, 2016Assignee: HGST Netherlands B.V.Inventor: Richard David Barndt
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Patent number: 9432054Abstract: A method for iteratively decoding a word of a correcting code by an iterative decoding algorithm in the course of which, for each bit of said code word, at least one extrinsic information item is generated at each iteration, includes the following steps: an initial step of decoding by means of said iterative decoding algorithm; simultaneously, for each bit of said code word, a step of developing a criterion representing the number of oscillations of at least one extrinsic information item or of one extrinsic information item with regard to another extrinsic information item; if the decoding does not converge; a step of modifying the value of the bit of said code word for which said number of oscillations is highest; and, an additional step of decoding said at least one modified code word by means of said iterative decoding algorithm.Type: GrantFiled: July 28, 2014Date of Patent: August 30, 2016Assignee: ThalesInventors: Benjamin Gadat, Nicholas Van Wambeke
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Patent number: 9430321Abstract: Techniques for operating a storage system are disclosed. A read request with an object identifier for a data object is received. A synchronous group of data storage devices across a plurality of enclosures is identified. The synchronous group is associated with the object identifier. A request is sent to the plurality of enclosures to synchronously activate the data storage devices in the synchronous group. After sending the request, data fragments associated with the object identifier are retrieved from the synchronous group of data storage devices. The data fragments are erasure decoded into a contiguous data range to reconstruct the data object.Type: GrantFiled: May 13, 2014Date of Patent: August 30, 2016Assignee: NetApp, Inc.Inventor: David Slik
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Patent number: 9424117Abstract: A technique performs virtual storage processor (VSP) failover. The technique involves accessing, by a first physical storage processor of the data storage apparatus, a VSP to create an operating environment for a host file system from the first physical storage processor. The technique further involves, after accessing the VSP to create the operating environment for the host file system from the first physical storage processor, detecting a failure of the first physical storage processor. The technique further involves accessing, in response to detecting the failure of the first physical storage processor and by a second physical storage processor of the data storage apparatus, the VSP to re-create the operating environment for the host file system from the second physical storage processor.Type: GrantFiled: March 15, 2013Date of Patent: August 23, 2016Assignee: EMC CorporationInventors: Jean-Pierre Bono, Frederic Corniquet, Miles A. de Forest, Himabindu Tummala, Walter C. Forrester
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Patent number: 9423454Abstract: A test circuit of a semiconductor apparatus includes a plurality of pads, a pattern generator configured to generate at least one internal test pattern in response to at least one pattern select signal, and a plurality of test units configured to transmit the at least one internal test pattern through the plurality of pads in response to a self test mode signal, and to compare the at least one test pattern received via the plurality of pads with the at least one generated internal test pattern and generate at least one test determination value based on the comparison.Type: GrantFiled: May 16, 2014Date of Patent: August 23, 2016Assignee: SK hynix Inc.Inventor: Ki Up Kim
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Patent number: 9417967Abstract: In a method for automatically recovering a basic input-output system (BIOS) of a computing device, the computing device includes a serial peripheral interface (SPI) ROM, a storage device, and a supper I/O (SIO) controller. The SPI ROM stores a first BIOS booting block and a main BIOS, and the SIO controller stores a second BIOS booting block. An integrity of the main BIOS stored in the SPI ROM is checked when the computing device is powered on. The first BIOS booting block boots the computing device when the main BIOS is partially damaged, and the second booting block powers on the computing device when the main BIOS is fully damaged. A backup BIOS is obtained from the storage device, and is written into the SPI ROM to update data of the main BIOS.Type: GrantFiled: October 29, 2014Date of Patent: August 16, 2016Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Hung-Chi Huang, Ching-Jou Chen
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Patent number: 9417988Abstract: A mechanism for tracking subclasses of and operations performed by generic objects in a computer system is disclosed. A method of the disclosure includes receiving, by a debugging tool executed from a processing device, an invocation from a code annotation in a function executed by the processing device, the invocation to initialize an object subclass tracking module of the debugging tool, requesting a stack trace of a call stack of the function, generating an identification (ID) using the requested stack trace, and storing the generated ID and the stack trace in a new entry in an object tracking table.Type: GrantFiled: February 26, 2013Date of Patent: August 16, 2016Assignee: Red Hat, Inc.Inventor: Johannes Weiner
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Patent number: 9405468Abstract: A system for memory device control may include a stacked memory device and a memory controller. The stacked memory device may include a stack of chips connected to a package substrate by electrical interconnects. The stack may include a plurality of memory chips, a primary control chip, and a secondary control chip. The primary and secondary control chips may be electrically connected to the plurality of memory chips by an internal data bus. The primary control chip may have logic to provide an interface between the internal data bus and a first external data bus. The secondary control chip may have logic to provide an interface between the internal data bus and a second external data bus.Type: GrantFiled: May 13, 2014Date of Patent: August 2, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: Venkatraghavan Bringivijayaraghavan, Saurabh Chadha, Abhijit Saurabh, Saravanan Sethuraman, Kenneth L. Wright
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Patent number: 9405646Abstract: Disclosed is an apparatus and a method to inject errors to a memory. In one embodiment, a dedicated interface includes an error injection system address register and an error injection mask register coupled to the error injection system address register. If the error injection system address register includes a system address that matches an incoming write address, the error injection mask register outputs an error to the memory.Type: GrantFiled: September 29, 2011Date of Patent: August 2, 2016Inventors: Theodros Yigzaw, Kai Cheng, Mohan J. Kumar, Jose A. Vargas, Gopikrishna Jandhyala
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Patent number: 9405715Abstract: In a method for managing serial attached small computer system interface (SAS) expanders using a host computer, the host computer connects to an SAS expander storage system through a redundant array of independent disks (RAID) card. The SAS expander storage system includes a first switch device, a first SAS expander, a second SAS expander, a second switch, a flash memory, and hard disk drives. The method controls the first switch device to switch the RAID card from the first SAS expander to the second SAS expander when the first SAS expander fails to function, controls the second switch device to switch the flash memory from the first SAS expander to the second SAS expander, and controls the first switch device to connect each of the hard disk drives to the second SAS expander.Type: GrantFiled: September 30, 2013Date of Patent: August 2, 2016Assignee: Zijilai Innovative Services Co., Ltd.Inventor: Chih-Huang Wu
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Patent number: 9400602Abstract: A system for memory device control may include a stacked memory device and a memory controller. The stacked memory device may include a stack of chips connected to a package substrate by electrical interconnects. The stack may include a plurality of memory chips, a primary control chip, and a secondary control chip. The primary and secondary control chips may be electrically connected to the plurality of memory chips by an internal data bus. The primary control chip may have logic to provide an interface between the internal data bus and a first external data bus. The secondary control chip may have logic to provide an interface between the internal data bus and a second external data bus.Type: GrantFiled: August 20, 2014Date of Patent: July 26, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: Venkatraghavan Bringivijayaraghavan, Saurabh Chadha, Abhijit Saurabh, Saravanan Sethuraman, Kenneth L. Wright
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Patent number: 9396096Abstract: The present disclosure provides an Android automated cross-application testing device and method. The device comprises a primary application testing unit, a trigger monitoring unit, a secondary application testing control unit, a secondary application testing unit, a secondary application test result recording unit, a library file storage unit, a primary application test checking unit, a test result processing unit, and a test result output unit. The method comprises monitoring the starting of a secondary application in the primary application testing process; testing the secondary application and collecting and processing the test result of the secondary application; and continuing the test of the primary application. If the test of the secondary application is successful, the above steps are repeated until the test of the primary application is completed. The method further comprises terminating the test of the primary application if the test of the secondary application times out or fails.Type: GrantFiled: July 7, 2014Date of Patent: July 19, 2016Assignee: Borqs Wireless Ltd.Inventors: Jin Wu, Hui Zhao, Wei Ding
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Patent number: 9396055Abstract: An electronic device includes a plurality of buffers and a log recording portion. In the plurality of buffers, a plurality of kinds of logs are to be recorded. The log recording portion records each log in a buffer, among the plurality of buffers, that is assigned in accordance with a recording interval of the log.Type: GrantFiled: April 23, 2014Date of Patent: July 19, 2016Assignee: KYOCERA Document Solutions Inc.Inventor: Kazuhisa Arakawa
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Patent number: 9396072Abstract: The invention relates to a system for data synchronization between two or more computer terminals including, at least one client terminal, a server terminal, a communication network connecting said client and server terminals, a data string being created on said client terminal, said client terminal being configured to send the data string to the server terminal for synchronization between the two terminals, characterized in that upon synchronization failure, reconciliation data with the latest synchronization information including said data string, is configured to be stored in a database on the client terminal and resent later according to a retry counter.Type: GrantFiled: October 11, 2010Date of Patent: July 19, 2016Assignee: AMADEUS S.A.S.Inventors: Konstantin Sorokin, Huong-Ly Mai, Sarah Prioux, Herve Braganti, Eric Habermacher, Annick Whitfield
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Patent number: 9396592Abstract: Methods and maintenance systems for use in analyzing data related to maintenance of at least one vehicle are disclosed. One example method includes retrieving, by a computing device, a plurality of diagnostic entries associated with at least one fault message from a database of diagnostic entries, each diagnostic entry including an identified corrective action and a date on which the identified corrective action was taken; identifying a plurality of groups of diagnostic entries, wherein the diagnostic entries in a group have a same corrective action, and each group has a confidence level associated with its corrective action; and weighting the confidence level for each group based on an age of the plurality of diagnostic entries in the group.Type: GrantFiled: August 5, 2013Date of Patent: July 19, 2016Assignee: The Boeing CompanyInventors: Steven David Chapman, Peter J. Lake, Jay Kevin McCullough
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Patent number: 9396076Abstract: A Version Control System (VCS) and methods having high availability, and combining the advantages of a centralized VCS while overcoming the limitations of centralized VCSs in a cluster environment. The system and method copes with failures of components in a cluster environment gracefully to guarantee uptime. The VCS and methods support high availability in a centralized VCS utilizing a plurality of repositories having a suitable architecture. In particular embodiments the architecture utilizes one or more of: Active-Passive repository replication; Active-Passive repository replication with automatic recovery; Active-Active repository replication; and hybrid model (Active-Active and Passive repository replication).Type: GrantFiled: June 7, 2013Date of Patent: July 19, 2016Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Paulo Gustavo Veiga, Ignacio Manzano, Juan Ignacio Vimberg, Ariel Morelli Andres
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Patent number: 9389967Abstract: A method and apparatus that allow a user to easily operate a self-service device despite the presence of damage is provided. Anticipated damage includes extreme environmental conditions such as earthquakes, flooding, strong winds, tsunamis, etc. These conditions may cause a failure in a portion of the self-service device. Improved ruggedness and redundant components are coordinated by suitable software to provide service despite damage to the self-service device. Additionally, access to some user accounts despite the loss of connectivity to a server maintaining user accounts is provided.Type: GrantFiled: June 16, 2011Date of Patent: July 12, 2016Assignee: Bank of America CorporationInventor: Nathan Dent
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Patent number: 9389974Abstract: Data is retrieved from a stacked memory device having a plurality of slave memory chips in response to recognizing a problem in the stacked memory device. The problem is determined to be associated with a primary driver module in the stacked memory device. In response, the primary driver module is disabled and an emergency driver module is enabled. Each of the plurality of slave memory chips are selected using a multiplexing unit to retrieve data using the emergency driver module.Type: GrantFiled: August 19, 2014Date of Patent: July 12, 2016Assignee: International Business Machines CorporationInventors: Saurabh Chadha, Hillery C. Hunter, Kyu-hyoun Kim, Abhijit Saurabh, Saravanan Sethuraman, Kenneth L. Wright