Abstract: Certain aspects of the present disclosure generally relate to a low voltage, accurate current mirror, which may be used for distributed sensing of a remote current in an integrated circuit (IC). One example current mirror typically includes a first pair of transistors, a second pair of transistors in cascode with the first pair of transistors, a switching network coupled to the second pair of transistors, and a third pair of transistors coupled to the switching network. An input node between the first and second pairs of transistors may be configured to receive an input current for the current mirror, and an output node at the first pair of transistors may be configured to sink an output current for the current mirror, proportional to the input current. This current mirror architecture offers a hybrid low-voltage/high-voltage solution, tolerates low input voltages, provides high output impedance, and offers low area and power consumption.

Abstract: Embodiments of the invention provide a pool cleaner receiving fluid flow from a pool hose, the pool cleaner comprising a supply mast configured for connection to a pool hose and directing fluid flow from the pool hose and a generator positioned within the pool cleaner. The pool cleaner further includes a paddle wheel coupled to the generator, the paddle wheel and the generator generating electric power using the fluid flow directed through the pool cleaner and control circuitry coupled to the generator, the control circuitry receiving the generated power from the generator for providing energy to operate at least one function of the swimming pool cleaner.

Abstract: A wideband highly-linear buffer circuit exhibiting a low output impedance comprises a first PFET (PFET1), a second PFET (PFET2), a first NFET (NFET1), and a second NFET (NFET2). Sources of PFET1 and PFET2 are coupled to VDD. PFET1's drain is coupled to an output lead. PFET2 acts as a current source. NFET1's drain is coupled to PFET2's drain and to PFET1's gate. NFET1's source is coupled to the output lead. NFET2's source is coupled to ground. NFET2's drain is coupled to NFET1's source and to the output lead. NFET1's gate is AC coupled to a first input lead. In a single-ended input example, NFET2's gate is AC coupled NFET1's drain. In a differential input example, NFET2's gate is AC coupled to a second input lead. In another differential input example, PFET2 is not just a current source, but rather PFET2's gate is AC coupled to the first input lead.

Abstract: RF switching circuitry includes one or more RF switching elements, a control signal input node, a common resistor, and common resistor bypass circuitry. The one or more RF switching elements are coupled in series between a switch input node and a switch output node. A state of each one of the one or more switching elements is determined based on a control signal. The control signal input node is configured to receive the control signal. The common resistor is coupled between the control signal input node and the one or more RF switching elements. The common resistor bypass circuitry is configured to receive the switching control signal and bypass the common resistor for a predetermined time period following one or more of a leading edge of the switching control signal and a falling edge of the switching control signal.

Abstract: A circuit, an installation that uses the circuit, and its design method, the circuit for distributing electricity that can supply at least two loads from two sources, and including: conductors, some of which form outputs configured to be connected to external equipment, and switching devices configured to establish a path between each load and the two sources by connecting the loads and sources to the outputs. For at least one pair of determined loads, the two switching devices on the paths connecting each source to the two loads of the pair are integrated in a double-flow switch. The double-flow switch is connected at its central point to the output that can be connected to the corresponding source.

Abstract: A power feeding device includes a cover, a primary coil covered with the cover and provided in a predetermined direction with respect to the cover, and a temperature-sensitive detector that detects the temperature of an object on the cover. When the distance from the surface of the cover to the temperature-sensitive detector in the predetermined direction is denoted by L [m], the temperature of the object to be subjected to thermometry by the temperature-sensitive detector is denoted by T0 [K], the temperature to be detected by the temperature-sensitive detector is denoted by T1 [K], and the thermal conductivity of the cover is denoted by ? [W/(m·K)], L satisfies the following equation L ? ? × ( T 0 - T 1 ) 5 × T 1 . ( 1 ) This allows the temperature of the object on the cover to be accurately detected.

Abstract: A power receiving unit adopted for this power receiving device includes a core unit having a plate-like shape and including a side surface, an upper surface and a lower surface, and a power receiving coil helically wound about a coil winding axis to surround the core unit including the upper and lower surfaces, the shield including a first shield disposed on the side of one end of the power receiving unit in an axial direction of the coil winding axis, and a second shield disposed on the side of the other end of the power receiving unit in the axial direction of the coil winding axis, the shield being absent at least at a location directly above a center portion of the power receiving unit.

Abstract: A semiconductor integrated circuit, supplied with a power source voltage generated by a power supplier and having a level determined in accordance with an analog signal, includes: an output unit outputting, as the analog signal, an output voltage signal indicating the power source voltage; an input unit including an input interface identical in specifications to an output interface of the output unit, and receiving an input signal indicating a voltage and input from an outside of the semiconductor integrated circuit; and a voltage control circuit generating the output voltage signal, based on the input signal and operating voltage information indicating a voltage required for an operation of the semiconductor integrated circuit.

Abstract: A load driver circuit includes a detection circuit periodically detecting an inrush current that flows to the detection capacitor from the first terminal through the first switch element and outputting a detection signal responsive to a result of the detection at the first node; a peak hold circuit holding a peak voltage of the detection signal and outputting the held peak voltage as a detection voltage; a comparison circuit comparing the detection voltage with a threshold voltage and outputting a comparison result signal responsive to a result of the comparison; a control circuit controlling the first switch element to switch on and off, controlling a current detection operation of the detection circuit, and outputting a load control signal that controls the operation of the load; and a logic circuit controlling the load switch element based on the comparison result signal and the load control signal.

Abstract: A high-voltage switch module, such as a cascode module, includes an electrically insulating heatsink with a patterned conductor layer on which high-voltage and low-voltage active semiconductor components are bonded, along with clamping, loading, and dynamic balancing components such as diodes, resistors, and capacitors. The heatsink may be alumina or aluminum nitride, for example. The conductor layer may be copper affixed to the heatsink via by direct-copper bonding or active metal brazing, for instance. High-voltage cascode modules may be formed using a low-voltage MOSFET in combination with a chain of silicon carbide normally-on n-channel JFET devices with a variety of configurations of clamping, loading, and balancing devices, for example.

Abstract: A phase adjustment device includes: a detection signal generator configured to generate a pair of first and second detection signals for detecting a phase difference between two signals whose phases have been adjusted by two phase adjusters, respectively, a maximum sensitivity phase difference of one of the first and second detection signals being not overlap with that of the other, and detection sensitivity of the phase difference becoming maximum at the maximum sensitivity phase difference; a detection signal selector configured to select one of the first and second detection signals whose predetermined range around the maximum sensitivity phase difference covers a preset phase difference; and a phase controller configured to control an amount of phase-adjusting by at least one of the two phase adjusters based on a difference between the phase difference detected within the predetermined range using the selected detection signal and the preset phase difference.

Abstract: An internal voltage generation circuit may be provided. The internal voltage generation circuit may include a pulse generation circuit configured to generate a first pulse and a second pulse in response to an external voltage. The internal voltage generation circuit may include a pulse synthesis circuit configured for synthesizing the first pulse and the second pulse to generate a synthesis pulse.

Abstract: An electronic apparatus includes a switch control section configured to: determine whether a received signal is any one of a power signal and a data signal based on the received signal, and select any one of a power-reception operation and a data-transmission operation based on the determination of the received signal.

Abstract: A system for use in automation technology comprising: an Ethernet-enabled field device configured to measure a physical variable, and to generate data representative of the measured physical variable; an Ethernet cable connectable/connected to said field device, wherein said Ethernet cable having PoE (Power over Ethernet) capability so as to both transmit the data from the field device as well as supply power to the field device over the Ethernet cable; and a power sourcing equipment with at least a first output port to which the Ethernet cable is connectable/connected, wherein the power sourcing equipment is arranged so that an input alternating voltage is transformed to a first alternating output voltage, which is provided at the first output port to supply power to the field device over the Ethernet cable.

Abstract: A power switching circuit includes a current mirror circuit to generate mirror currents, by transferring, at different mirror ratios, monitored currents that are obtained by monitoring power supply voltages, a selector to select the mirror currents with a combination having the different mirror ratios for the monitored currents, according to a switching state of the power supply voltages, a comparator to compare the mirror currents selected by the selector and output a comparison result, and a switching circuit to switch a supply voltage to be supplied to a load to one of the power supply voltages, based on the comparison result.

Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.

Abstract: A switch for controlling a power supply and a method of operating the switch are disclosed. The switch includes a first transistor having a drain and a source connected between VIN and VOUT and a gate connected to be driven to a first voltage that is greater than VIN, an external capacitor operable, when connected to the gate of the first transistor, to control a rise time of VOUT, and a circuit coupled to the gate of the first transistor and to the external capacitor, the circuit connected to couple the external capacitor to the gate of the first transistor responsive to an enable signal turning on and to uncouple the external capacitor from the gate of the first transistor responsive to the voltage on the gate reaching the first voltage.

Abstract: A spread spectrum clock generator includes: a phase comparing unit that receives a reference clock signal and a feedback clock signal, and generates a control voltage corresponding to a phase difference between the reference clock signal and the feedback clock signal; a voltage-controlled oscillator that oscillates at an oscillating frequency corresponding to the control voltage, and generates an output clock signal; a delta-sigma modulator that receives a waveform signal for controlling spreading of a spectrum of the output clock signal, and outputs bits larger than 1 bit based on the waveform signal; a control circuit that controls a multiplication number according to an output signal of the delta-sigma modulator; and a divider that generates the feedback clock signal by dividing the output clock signal according to the multiplication number controlled by the control circuit, and supplies the feedback clock signal to the phase comparing unit.

Abstract: A power supply startup system activates a power supply of a device provided with a battery or the like at high speed by a wireless signal while suppressing current consumption on standby. The power supply startup system includes a battery, a device supplied with a power from the battery, and a controller which performs wireless communication with the device. The device includes a power supply section which generates a power supply from the battery, a startup section which receives a wireless startup signal transmitted by the controller and outputs a startup signal to the power supply section, a control section which controls the power supply section and the startup section, and a wireless communication section which performs wireless communication with the controller. The wireless startup signal includes at least two signal regions of a first stage and a second stage.

Abstract: A connecting arrangement for electrically connecting at least two cable ends of electrical cables, in particular of stranded wires, and for providing a hermetic seal between the cable ends has a connection sleeve for receiving the cable ends. The connection sleeve comprises at least a first chamber for receiving one of the cable ends, wherein the first chamber includes a partition wall with respect to the other cable end.