Abstract: A watchdog timer circuit for use in microcomputer monitor systems is disclosed. This circuit includes a timer circuit responsive to receipt of a count clock signal for counting it up, and a timer control circuit which loads an externally inputted data signal (stn) in sync with a timer refresh instruction (prun) and holds therein a sequentially loaded latest multi-bit data signal as reference data. When the reference data agrees with a predefined pattern and simultaneously another prespecified condition is met, the timer control circuit interrupts the clock signal counting operation of the timer circuit. During interruption of the counting operation, when the reference data does not agree with the predefined pattern or when the above-stated another prespecified condition becomes unsatisfied, the control circuit allows the timer circuit to restart the clock signal counting operation.

Abstract: Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The interface may include a primary link, an auxiliary link, and a hot plug detect link. The source processor may be operable to send a wake-up command to the sink processor via the auxiliary link. The source processor may send initialization parameters to the sink processor via the primary link. The initialization parameters may include a clock data recovery lock parameter and an idle parameter. Following the initialization parameters, the source processor may send a synchronization signal to the sink processor via the primary link. The source processor may then send a sleep command via the primary link to the sink processor.

Abstract: The feature size of semiconductor devices continues to decrease in each new generation. Smaller channel lengths lead to increased leakage currents. To reduce leakage current, some power domains within a device may be powered off (e.g., power collapsed) during periods of inactivity. However, when power is returned to the collapsed domains, circuitry in other power domains may experience significant processing overhead associated with reconfiguring communication channels to the newly powered domains. Provided in the present disclosure are exemplary techniques for isolating power domains to promote flexible power collapse while better managing the processing overhead associated with reestablishing data connections.

Abstract: A method for performing system power budgeting within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and performing configuration adjustment on at least one portion of the electronic device according to the power consumption index corresponding to the specific subsystem.

Abstract: An assembly includes a cabinet having an interior and a door to gain access to the interior. An intelligent electronic device (IED) is within the interior of the cabinet and includes inputs providing electrical connections to the IED, pushbuttons to provide user input to the IED, a display module including a display, a component, and a timer circuit. The timer circuit powers the component OFF or places it in a reduced power state when not in use after a certain amount of time. A switch is associated with the door and is electrically connected to at least one of the inputs so that when the display module is powered OFF or in the reduced power state and when the door is opened, the switch causes a signal to be sent to the timer circuit to cause the timer circuit to power the component fully ON.

Abstract: An electronic device receives data associated with at least one biometric detected by a sensor of a remote control device that is operable to transmit one or more instructions to the electronic device. A profile for a user associated with the data is determined out of a number of profiles for the user based on the data. The electronic device is then be configured in one or more ways according to the determined user profile. A user may have any number of different profiles for the electronic device, each associated with a different biometric or combination of biometrics. In this way, a user may easily access different experiences with the same device that may each be fully personalized in a different way and/or for a particular purpose.

Abstract: A SBSP writes a log into a spad in a log processor and the writing of the log from the spad to a serial port is performed by the log processor. When initialization of a main memory has been completed, the log processor temporarily writes the data read from the spad into a logmem and then clears the spad. Furthermore, when an output of the log performed by the log processor has been completed, the SBSP adds, in cooperation with the BIOS and the OS, the log processor and the logmem as the resources.

Abstract: A method and corresponding apparatus for aligning a data signal with a corresponding clock signal include oversampling the data signal based on the corresponding clock signal and generating corresponding data samples. An indication of skew between the data signal and the corresponding clock signal is detected based on data samples. A variable delay line coupled to the data signal is then adjusted based on the indication of skew detected. According to at least one example implementation, the data signal is oversampled based on the corresponding clock signal and multiple time-shifted versions of the corresponding clock signal. At least one signal of the corresponding clock signal and the multiple time-shifted versions of the corresponding clock signal is employed in sampling the data signal at a potential transition edge of the data signal.

Abstract: Methods and apparatus for implementing Power over Ethernet (PoE) for auxiliary power in computer systems. Under aspects of the methods, one or more voltage inputs comprising standard power input is employed by a power control component in a network interface in an apparatus such as a network adaptor board, a System on a Chip (SoC), computer server or server blade to supply power to a network controller on the apparatus when the apparatus is operating at a normal power state. To enable the apparatus to maintain network communication when operating at a reduced power state, a PoE power input derived from at least one PoE signal received at at least one Ethernet jack of the apparatus is employed to provide power to the network controller absent use or availability of the standard power input. Accordingly, the PoE power input facilitates an auxiliary power function that may be used alone or in combination with existing (as applicable) auxiliary power input when apparatus are operated in reduced power states.

Abstract: The invention relates to an electronic device that includes a wake-up system that operates at a substantially low power level and is applied to wake up the electronic device from a sleep mode. The wake-up system comprises a sound transducer that converts a received sound signal to an electrical signal and a keyword detection logic that preliminarily identifies a speech energy profile that corresponds to at least one of a plurality of keywords in a part of the electrical signal. In some embodiments, a keyword finder is further activated to identify with an enhanced accuracy whether the at least one keyword exists in the part of the electrical signal, and generates a wake-up control to activate a host of the electronic device from its sleep mode.

Abstract: Techniques for detecting mobile computing power states are described herein. An active state may be detected in a mobile computing device. A timestamp may be requested at predetermined intervals while in the active state. A first timestamp and a second timestamp may be received in response to the timestamp requests. If a difference between a first time stamp and a second time stamp exceeds the predetermined interface, the mobile computing device is identified to have entered a sleep state during a time period indicated by the determined timestamp difference.

Abstract: A data interface includes a first sampler sampling a first bitset and a second sampler sampling a second bitset. The first bitset includes a first bit which is included in a first image data and a third bit which is included in a second image, and the second bitset includes a second bit which is included in the first image data and is a higher-order bit than the first bit and a fourth bit which is included in the second image data and is a higher-order bit than the third bit. The data interface further includes a clock generator configured to adjust a sampling timing of the first and second bitsets based on a multi-phase clock, and a clock data recovery (CDR) circuit shared by the first sampler, the second sampler and configured to output the multi-phase clock to the clock generator.

Abstract: Systems and methods for providing power savings and interference mitigation on physical transmission media are disclosed. Exemplary aspects include the ability to change physical layer (PHY) configurations based on operating conditions. By changing the PHY configuration, power consumption and electromagnetic interference (EMI) may be reduced. Still other operating conditions may be used to initiate switching between different PHYs. In another exemplary aspect, parameters of the PHY, such as slew rate, may be modified based on operating conditions to save power and/or reduce interference.

Abstract: Certain aspect of the present disclosure relates to a power management system. A detection device generates detection signals based on detection of a plurality of user identification (ID) devices, and sends the detection signals to a power management controller. For each of the user ID devices being detected, the power management controller retrieves the corresponding user ID, and determines a user ID device presence event based on the received detection signals. In response to determining the user ID device presence event, the power management controller retrieves device IDs associated with the corresponding user ID of the user ID device from a database, and determine a target device based on the retrieved device IDs. Then the power management controller may power on or power off the target device based on the determined user ID device presence event and the power state of the target device.

Abstract: A power control apparatus includes a processor configured to collect first information related to operation of a performing unit configured to perform data processing and information related to operation of a bus configured to transfer data; determine an operating frequency and an operating voltage for the performing unit, based on the collected information; estimate based on the collected information, a period elapsing until the performing unit suspends operation and a period elapsing until the bus suspends operation; derive a discriminant that obtains a difference of total power consumption and power consumption pre-switching; and execute a switching of an operating frequency and an operating voltage of the performing unit, based on a value of the discriminant.

Abstract: An electronic device includes a chargeable battery, a system section, and a charging control section. The charging control system allocates electrical current supplied from the external device to the system section for use thereby and the battery for charging. The charging control section stops charging of the battery temporarily when a prescribed condition is met in the system section and the electrical current supplied via the cable is not a maximum current for the cable, and regulates the electrical current supplied via the cable to be at a constant level below the maximum current. The charging control section supplies electrical current from the battery to the system section as needed to meet a power demand by the system section that is not met by the electric current via the cable, while the electrical current supplied via the cable is being regulated to be at the constant level.

Abstract: A data storage device including a flash memory and a controller. The controller enables the flash memory to transmit a predetermined parameter stored in the flash memory according to a first predetermined trigger edge of a clock signal and reads the predetermined parameter transmitted by the flash memory according to the first predetermined trigger edge of the clock signal to obtain a first reference parameter in an asynchronous mode. The controller enables the flash memory to switch to a synchronous mode and transmit the predetermined parameter and reads the predetermined parameter transmitted by the flash memory according to the first predetermined trigger edge of the clock signal to obtain a second reference parameter in a detection mode.

Abstract: A circuit for processing data in an integrated circuit device comprises a selection circuit; a first register coupled to a first output of the selection circuit; a second register implemented as a latch and coupled to a second output of the selection circuit; and a signal line coupled between the output of the first register and an input of the selection circuit. The selection circuit enables the coupling of an output signal of the first register to an input of the second register. A method of processing data in an integrated circuit device is also disclosed.

Abstract: An intermediate electronic device, arranged to be coupled to a host system and an electronic device. The intermediate electronic device includes: a controller, enabled by an enable signal to process the data transmission between the host system and the electronic device; and a power transmission unit disposed between the host system and the electronic device. The power transmission units detect whether the power transmission unit is coupled to the host system or an external power source. When the power transmission unit detects that the power transmission unit is coupled to the host system, but not coupled to the external power source, the power transmission unit informs the host system to raise the voltage output to the intermediate electronic device to supply power to the electronic device, and outputs the enable signal.

Abstract: In an embodiment, a system on a chip includes: a single core to execute a legacy instruction set, the single core configured to enter a system management mode (SMM) to provide a trusted execution environment to perform at least one secure operation; and a memory controller coupled to the single core, the memory controller to interface with a system memory, where a portion of the system memory comprises a secure memory for the SMM, and the single core is to authenticate and execute a boot firmware, and pass control to the SMM to obtain a key pair from a protected storage and store the key pair in the secure memory. Other embodiments are described and claimed.