Patents Examined by Chie Yew
  • Patent number: 11740838
    Abstract: An information handling system includes a first storage array having a first logical block table with logical block addresses. Each logical block address includes a pointer to an associated data block in a first storage volume of the first storage array. The second storage array includes a second logical block table having the logical block addresses and a second storage volume. The first storage array receives a data read command from the second storage array to a first logical block address, and in response to the data read command, determines that a data block pointed to by the first logical block address in the first storage array is also pointed to by second logical block address that is adjacent to the first logical block address in the first logical block table, and sends the data block and metadata to the second storage array, the metadata indicating that the second logical block address points to the data block.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: August 29, 2023
    Assignee: Dell Products L.P.
    Inventors: TingWei Wang, Ming Tong, KeCheng Bi
  • Patent number: 11734192
    Abstract: An approach is disclosed that identifies a home node of a data granule. The process is performed by an information handling system (a local node) that retrieves a global virtual address directory. The global virtual address directory maps shared virtual addresses to a number nodes that includes the local node with one of the nodes being the home node. The shared virtual addresses correspond to a plurality of memory addresses that are stored in a shared virtual memory that is shared amongst the plurality of nodes. The approach receives a selected shared virtual address, retrieves, from the global virtual address directory, the home node associated with the selected shared virtual address, and accesses the data granule corresponding to the selected shared virtual address from the home node.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: August 22, 2023
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Johns, Jose R. Brunheroto
  • Patent number: 11709612
    Abstract: A data storage device includes a memory device including multiple memory blocks corresponding to multiple sub-regions and a memory controller. The memory controller accesses the memory device and updates content of a read count table in response to a read command with at least one designated logical address issued by a host device. Each field of the read count table records a read count associated with one sub-region and the content of the read count table is updated by increasing the read count associated with the sub-region that the designated logical address belongs to. The memory controller selects at least one sub-region to be rearranged according to the content of the read count table and performs a data rearrangement procedure to move data of logical addresses belonging to the selected at least one sub-region to a first memory space of the memory device having continuous physical addresses.
    Type: Grant
    Filed: May 2, 2021
    Date of Patent: July 25, 2023
    Assignee: Silicon Motion, Inc.
    Inventor: Yu-Ta Chen
  • Patent number: 11709781
    Abstract: A method of managing data in a storage device is provided. The storage device includes a plurality of nonvolatile memory chips each including a plurality of pages. A first data object is received from an external host device. The first data object has an unfixed size and corresponds to a first logical address which is a single address. Based on determining that it is impossible to store the first data in a single page among the plurality of pages, a buffering policy for the first data object is set based on at least one selection parameter. While mapping the first logical address of the first data object and a first physical address of pages in which the first data object is stored, a first buffering direction representing the buffering policy for the first data object is stored with a mapping result.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: July 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jaeju Kim, Youngho Park, Sangyoon Oh, Hyungchul Jang, Jekyeom Jeon
  • Patent number: 11704238
    Abstract: A method of caching mapping table for use in a flash memory device having a flash memory controller and a flash memory is provided. The method includes: in response to a host read/write command, checking a G2F mapping table to determine whether a required group of a L2P mapping table has been loaded to a DRAM of the flash memory controller and accordingly obtain a node index indicating which memory node of the DRAM the group is stored in; recording the node index to a first region of a SRAM of the flash memory controller; accessing the DRAM to obtain an L2P address indicating a physical address that is associated with the host read/write command from the group of the L2P mapping table by referencing the node index stored in the first region of the SRAM; and performing a read/write operation on the flash memory according to the L2P address.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: July 18, 2023
    Assignee: Silicon Motion, Inc.
    Inventor: Yi-Kai Pai
  • Patent number: 11698867
    Abstract: A logical-to-physical (L2P) data structure and a physical-to-logical (P2L) data structure are maintained. The L2P data structure comprises table entries that map a logical address to a physical address. The P2L data structure comprises data entries that map a physical address to a logical address. The P2L data entries also comprise a data move status, a base address, and a boundary indicator. A move operation is detected, wherein the move operation indicates that data referenced by a logical address is to be moved from a source physical address to a destination physical address. Responsive to detecting the move operation, the data move status associated with the source physical address in the P2L data structure is updated.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: July 11, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Seungjune Jeon, Fangfang Zhu, Juane Li, Jiangli Zhu, Ning Chen
  • Patent number: 11698855
    Abstract: An operating method of a memory controller configured to control a memory device including memory blocks each for storing a plurality of pages is provided. The operating method includes transferring a program command to the memory device based on a write request from a host, updating a valid page bitmap representing validity of a plurality of pages based on valid page information received from the memory device, calculating a fragmentation ratio representing a segmentation degree between at least one valid page and at least one invalid page of a memory block based on the valid page bitmap, determining source blocks among the memory blocks in ascending order of fragmentation ratios, and performing garbage collection on the source blocks.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: July 11, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dongeun Shin, Jonghwa Kim, Alain Tran
  • Patent number: 11698760
    Abstract: Disclosed are various embodiments for improving the resiliency and performance of cluster memory. First, a computing device can submit a write request to a byte-addressable chunk of memory stored by a memory host, wherein the byte-addressable chunk of memory is read-only. Then, the computing device can determine that a page-fault occurred in response to the write request. Next, the computing device can copy a page associated with the write request from the byte-addressable chunk of memory to the memory of the computing device. Subsequently, the computing device can free the page from the memory host. Then, the computing device can update a page table entry for the page to refer to a location of the page in the memory of the computing device.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: July 11, 2023
    Assignee: VMWARE, INC.
    Inventors: Marcos K. Aguilera, Keerthi Kumar, Pramod Kumar, Pratap Subrahmanyam, Sairam Veeraswamy, Rajesh Venkatasubramanian
  • Patent number: 11693781
    Abstract: A processing device in a memory system receives, from a host system, a read command comprising an indication of a sub-region of a logical address space of a memory device. The processing device increments a counter associated with a region of the logical address space, the region comprising a plurality of sub-regions including the sub-region, the counter to track a number of read operations performed on the plurality of sub-regions of the region, wherein the counter is periodically decremented in response to an occurrence of a recency event on the memory device. The processing device further determines whether a value of the counter satisfies a cacheable threshold criterion and, responsive to the value of the counter satisfying the cacheable threshold criterion, sends, to the host system, a recommendation to activate the sub-region.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: July 4, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Dionisio Minopoli, Daniele Balluchi
  • Patent number: 11693577
    Abstract: Systems and methods for storage operation processing during data migration using selective block migrated notifications are disclosed. A host system may be configured with connections to a source storage node and a destination storage node while a data migration is moving data blocks from the source to the destination. The host may send a storage request to the source storage node and receive a block migrated notification from the source storage node. The host may then store a migrated indicator for that data block in a migration table and direct future storage requests to the destination storage node.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: July 4, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Senthil Kumar Veluswamy, Rahul Gandhi Dhatchinamoorthy, Kumar Ranjan
  • Patent number: 11687463
    Abstract: A method is used for uninterrupted data flushing in a storage system. A barrier in a page descriptor ring is determined to distinguish between a filling flushing work set (FWS) and a frozen FWS. A sequence number of an I/O request is compared to the barrier. A FWS corresponding to the I/O request is identified based on the comparison. The I/O request is committed to the identified FWS.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: June 27, 2023
    Assignee: Dell Products L.P.
    Inventors: Yousheng Liu, Vladimir Shveidel, Geng Han
  • Patent number: 11681448
    Abstract: Fabric modules in a storage system offer differing device IDs from a deterministic sequence to a storage device being added to the storage system. The storage device that is being added accepts a device ID that is higher in the deterministic sequence. The fabric module that offered the device ID same as was accepted by the storage device determines to proceed with initializing the storage device.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: June 20, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Ian Juch, Hao Liu, Boris Feigin, Haijie Xiao, Gordon James Coleman
  • Patent number: 11675523
    Abstract: A primary storage system reads a plurality of journal data, and performs collective compression that is compression of data that is at least a part of the plurality of pieces of journal data in the plurality of journals and is larger than a size of one journal data. The collectively compressed data, which is a plurality of pieces of journal data subjected to collective compression, is a transfer target from the primary storage system to the secondary storage system. The journal is journal data and metadata including a write order of the journal data and associated with the journal data. The journal data is a copy of data written in the primary volume. The secondary storage system acquires a plurality of pieces of journal data by decompressing one or more pieces of collectively compressed data, and writes the plurality of pieces of journal data to the secondary volume.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: June 13, 2023
    Assignee: Hitachi, Ltd.
    Inventors: Akira Deguchi, Nobuhiro Yokoi, Hiroka Ihara
  • Patent number: 11675513
    Abstract: A computer-implemented method, according to one embodiment, includes: storing records in an input data buffer, where each of the records include a key which is appended to payload data in the respective record. Moreover, for each of the records: shearing the key associated with the record from the payload data, normalizing the sheared key, and storing the normalized sheared key in a first target area of memory. A determination is made as to whether a size of the payload data in the record is outside a predetermine range, and in response to determining that the size of the payload data in the record is outside the predetermine range, the payload data is stored in a second target area of memory. A data locator is also appended to the normalized sheared key in the first target area of memory to form a sheared record.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: June 13, 2023
    Assignee: International Business Machines Corporation
    Inventors: Scott B. Compton, Jeffrey Richard Suarez, Matthew Michael Garcia Pardini, Christian Jacobi, Dominik Steenken, Sri Hari Kolusu, Vicky Vezinaw
  • Patent number: 11669441
    Abstract: Embodiments are disclosed for recycling memory after a virtual machine reboots. Memory allocated to a rebooting virtual machine instance can be associated with the instance or otherwise marked as to be reserved for use after the virtual machine instance reboots. Subsequently, after the reboot process is initiated, the reserved memory can be reallocated to the virtual machine instance. Memory scrubbing can be ordinarily performed to avoid data leakage between customers, but scrubbing can be inhibited for memory that is returned to a rebooting virtual machine instance. Further features, such as API calls to configure memory recycling, indications to disable recycling, and the like can be supported.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 6, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Eden Grail Adogla, Philip John Nesser, II, Steven Michael Noonan
  • Patent number: 11662937
    Abstract: Techniques for replicating data involve: determining overwritten probabilities of a plurality of data blocks of a source storage device. The techniques further involve: classifying the plurality of data blocks as cold data blocks or hot data blocks based on the overwritten probabilities in the plurality of data blocks. The techniques further involve: replicating at least a portion of the cold data blocks to a target storage device prior to the hot data blocks. Accordingly, transmission resources used to re-replicate overwritten data during an initial replication period can be reduced, thereby achieving efficient data replication.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: May 30, 2023
    Assignee: EMC IP Holding Company LLP
    Inventors: Yuanyang Wu, Yifeng Lu
  • Patent number: 11662954
    Abstract: Computer software and/or hardware configured to select a first tape medium of a first pool and a second tape medium of a second pool based, at least in part, on a migration command for a file, instruct a tape drive to write the file to both the first tape medium of the first pool and a third tape medium of a system pool of a tape library, record a file identifier (ID) for the file and an identifier for the second tape medium of the second pool in a copy tape database (CTDB), wherein the file ID points to the file written to the third tape medium of the system pool, and instruct the tape drive to read the file from the third tape medium of the system pool utilizing the file ID in the CTDB and to write the file to the second tape medium of the second pool.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: May 30, 2023
    Assignee: International Business Machines Corporation
    Inventors: Hiroshi Itagaki, Shinsuke Mitsuma, Tsuyoshi Miyamura, Noriko Yamamoto, Tohru Hasegawa, Atsushi Abe
  • Patent number: 11657001
    Abstract: A management technology for mapping data of a non-volatile memory is shown. A controller establishes a first mapping table and a second mapping table. By looking up the first mapping table, the controller maps a first logical address issued by the host for data reading to a first block substitute. By looking up the second mapping table, the controller maps the first block substitute to a first physical block of the non-volatile memory. The first mapping table further records a first offset for the first logical address. According to the first offset recorded in the first mapping table, the first logical address is mapped to a first data management unit having the first offset in the first physical block represented by the first block substitute.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: May 23, 2023
    Assignee: SILICON MOTION, INC.
    Inventor: Sheng-Hsun Lin
  • Patent number: 11650931
    Abstract: A variety of applications can include systems and methods that utilize a hybrid logical to physical (L2P) caching scheme. A L2P cache and a L2P changelog in a storage device can be controlled for use in write and read operations of a memory system. A page pointer table in the L2P cache can be accessed, for performance of a write operation in the memory system, to obtain a specific physical address mapped to a specified logical block address from a host, where the access is based on the page pointer table loaded into the L2P cache from the L2P changelog. The L2P cache area can be progressively configured with the most frequently accessed page pointer tables in the L2P changelog in the latest host accesses.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: May 16, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Carminantonio Manganelli, Yoav Weinberg, Alberto Sassara, Paolo Papa, Luigi Esposito, Giuseppe D'Eliseo, Angelo Della Monica, Massimo Iaculo
  • Patent number: 11635921
    Abstract: A data-storage-destination environment-determination module set determines any of a plurality of storage environments as a storage destination environment for storing data, based on a used-data table set about the characteristics of data and the storage environments. The data migration module transmits the data to the storage destination environment.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: April 25, 2023
    Assignee: HITACHI, LTD.
    Inventors: Iku Matsui, Hiroshi Arakawa, Hideo Tabuchi