Abstract: A collective communication apparatus and method for parallel computing systems. For example, one embodiment of an apparatus comprises a plurality of processor elements (PEs); collective interconnect logic to dynamically form a virtual collective interconnect (VCI) between the PEs at runtime without global communication among all of the PEs, the VCI defining a logical topology between the PEs in which each PE is directly communicatively coupled to a only a subset of the remaining PEs; and execution logic to execute collective operations across the PEs, wherein one or more of the PEs receive first results from a first portion of the subset of the remaining PEs, perform a portion of the collective operations, and provide second results to a second portion of the subset of the remaining PEs.

Abstract: Low cost storage for write once read rarely data is described. In an embodiment a storage device comprises a plurality of hard disk drives connected to a server via an interconnect fabric. The storage device comprises a cooling system which is only capable of cooling a first subset of the hard disk drives and a power supply system which is only capable of powering a second subset of the hard disk drives and in some examples, the interconnect fabric may be only capable of providing full bandwidth for a third subset of the hard disk drives. Each subset may comprise only a small fraction of hard disk drives. A control mechanism, which may be implemented in software, is provided which controls which hard disk drives are active at any time in order that the constraints set by the cooling and power supply systems and interconnect fabric are not violated.

Abstract: This invention combines a multicore shared memory controller and an asynchronous protocol converting bridge to create a very efficient heterogeneous multi-processor system. After traversing the protocol converting bridge the commands travel through the regular processor port. This allows the interconnect to remain unchanged while having any combination of different processors connected. This invention tightly integrates all of the processors into the same memory controller/interconnect.

Abstract: A backplane controller to couple to a carrier interface and a plurality of host controllers of different types. The backplane controller is to identify a host controller corresponding to a type of a storage device of a storage device carrier. The storage device carrier is to interface with the carrier interface. The backplane controller is to arbitrate multiplexing of communication between the carrier interface and the identified host controller.

Abstract: Systems and methods for reducing metadata in a write-anywhere storage system are disclosed herein. The system includes a plurality of clients coupled with a plurality of storage nodes, each storage node having a plurality of primary storage devices coupled thereto. A memory management unit including cache memory is included in the client. The memory management unit serves as a cache for data produced by the clients before the data is stored in the primary storage. The cache includes an extent cache, an extent index, a commit cache and a commit index. The movement of data and metadata is by an interval tree. Methods for reducing data in the interval tree increase data storage and data retrieval performance of the system.

Abstract: Apparatus, system and method for docking and/or undocking a remote device, A docking body includes a docking cavity and an access cavity, for providing lateral support, guidance and access for the remote device. Communications is configured to receive a control signal based on a sensed condition, wherein the sensed condition may include a proximity and/or position of a user's hand relative to the docking body, and/or an operating parameter of a vehicle. A coupling apparatus is provided for magnetically coupling the body of the remote device to at least a portion of the docking body. The coupling apparatus may be configured to modify the strength of the magnetic coupling based on the control signal to assist in insertion/removal. Under illustrative configurations, the docking body and the coupling apparatus allow for oblique insertion and oblique removal of the body of the remote device.

Abstract: A paired queue apparatus and method comprising request and response queues wherein queue head and tail pointer update values are communicated through an enhanced pointer word data format providing pointer indicator information and optional auxiliary information in a single transfer, wherein auxiliary information provides additional system communication without consuming additional bandwidth. Auxiliary information is optionally contained in a response data entry written to a response queue or in a request entry written to a request queue.

Abstract: A mobile information communication apparatus includes a data processing device for sending plotting command/data to a display control device that controls the pixels of a display panel belonging to the mobile information communication apparatus. An interface device is provided which receives the plotting command/data generated by the data processing device and sends, based on plotting command/data, an external display signal to the external display device. The data processing device and the interface device are configured to send, from the interface device, a higher-resolution external display signal.

Abstract: Provided is a method of delivering a user input received from a Human Interface Device (HID) to a source device by a sink device. The method includes: receiving the user input from the HID; generating HID user input information including a first field that represents a type of the HID, a second field that represents an interface type of the HID, and a third field that includes the user input received from the HID; and transmitting the configured HID user input information to the source device.

Abstract: A capture service running on an application server receives events from a client application running on an application server to be stored in a data store and stores the events in an in-memory bounded buffer on the application server, the in-memory bounded buffer comprising a plurality of single-threaded segments, the capture service to write events to each segment in parallel. The in-memory bounded buffer provides a notification to a buffer flush regulator when a number of events stored in the in-memory bounded buffer reaches a predefined limit. The in-memory bounded buffer receive a request to flush the events in the in-memory bounded buffer from a consumer executor service. The consumer executor service consumes the events in the in-memory bounded buffer using a dynamically sized thread pool of consumer threads to read the segments of the bounded buffer in parallel, wherein consuming the events comprises writing the events directly to the data store.

Abstract: Within a networking device, packet portions from multiple PDRSDs (Packet Data Receiving and Splitting Devices) are loaded into a single memory, so that the packet portions can later be processed by a processing device. Rather than the PDRSDs managing and handling the storing of packet portions into the memory, a packet engine is provided. A device interacting with the packet engine can use a PPI (Packet Portion Identifier) Addressing Mode (PAM) in communicating with the packet engine and in instructing the packet engine to store packet portions. Alternatively, the device can use a Linear Addressing Mode (LAM) to communicate with the packet engine. A PAM/LAM selection code field in a bus transaction value sent to the packet engine indicates whether PAM or LAM will be used.

Abstract: A method of reading from and writing to a resistive memory cache includes receiving a write command and dividing the write command into multiple write sub-commands. The method also includes receiving a read command and executing the read command before executing a next write sub-command.

Abstract: A centralized resource manager manages the routing of audio or visual information within a device, including a handheld device such as a smartphone. The resource manager evaluates data-driven policies to determine how to route audio or visual information to or from various input or output components connected to the device, including headphones, built-in speakers, microphones, bluetooth headsets, cameras, and so on. Among the data considered in the policies are connection status data, indicating if a device is connected, routing status data, indicating if a device is permitted to route information to or from a component, and grouping data, indicating logical relationships between various components. Components may be considered inherently routable, automatically mutable, or optionally routable. Numerous other uses exist for such data, including providing simpler and more logical management interfaces.

Abstract: Various embodiments for cache management in a distributed computing storage environment are provided. In one embodiment, a processor device, for a plurality of input/output (I/O) operations, initiates a process, separate from a process responsible for data segment assembly, for waking a predetermined number of waiting I/O operations.

Abstract: According to one embodiment, a processor system includes a variable capacity memory. The memory includes a memory cell array including basic units, each of the basic units including one cell transistor and one variable resistance element, a mode selector switching between first and second modes, a read/write of one bit executed in 2n basic units (n is an integer) among the basic units in the first mode, the read/write of the one bit executed in 2m basic units (m is an integer, m?n) among the basic units in the second mode, and a control circuit which controls the switching between the first and second modes.

Abstract: A memory controller includes a first interface and a microprocessor. The first interface is configured to receive a first command, a first address, an address state separation command, and a second address, the first address corresponding to the first command, and the address state separation command separating the first and second addresses from each other. The microprocessor is configured to decode the first command, map the first address to a non-volatile memory device, execute the first command relative to the first address mapped to the non-volatile memory device, and determine a relation between the first address and the second address. The microprocessor is further configured to selectively execute the second command relative to the second address mapped to the non-volatile memory device concurrently with the first command based on the relation between the first address and the second address.

Abstract: An electronic device comprising a semiconductor memory unit that may a variable resistance element configured to be changed in its resistance value in response to current flowing through both ends thereof; an information storage unit configured to store switching frequency information corresponding to a switching frequency which minimizes an amplitude of a voltage to be applied to both ends of the variable resistance element to change the resistance value of the variable resistance element and switching amplitude information corresponding to a minimum amplitude; and a driving unit configured to generate a driving voltage with the switching frequency and the minimum amplitude in response to the switching frequency information and the switching amplitude information and apply the driving voltage to both ends of the variable resistance element.

Abstract: A flash memory system comprises a logic block interface operable to receive a write command from a host computer, the write command specifying data and a write destination address in a flash memory device, the flash memory device operable to store data at a complementary address corresponding to the specified write destination address. The system further comprises a journal communicatively coupled to the flash memory device and the logic block interface operable to temporarily store data from the complementary address of the flash memory device, and to provide the stored data in the journal to be restored to the flash memory device at the complementary address in the event of an error occurring while executing the write command.

Abstract: A data communication interface for an agricultural utility vehicle, particularly an agricultural tractor, having an interface connector that can be connected either to a first data communication network or to a second data communication network by means of an electrically operatable changeover device, wherein the first data communication network is terminated at a line end associated with the interface connector by means of a disconnectable terminating resistor, and having a control unit that connects the interface connector to the first data communication network by means of appropriate operating of the changeover device exclusively when it infers the presence of a control signal that is provided for disconnecting the terminating resistor.

Abstract: A system and method of managing the storage of data is described where a plurality of requesting entities can be permitted access to a shared data resource. When a modification to the data is needed, the request may be executed as an atomic operation. To do this the memory region is temporarily locked until the atomic operation is completed so that other operations related to the data are deferred until the atomic operation has completed. The lock is secured by reference to a data array or register of fixed length where the address of the locked data region is represented by a bit, the position of which is determined by computing a hash value of the address modulo the length of the lock register.