Patents Examined by Christopher Young
  • Patent number: 9568827
    Abstract: An object of the present invention is to provide a fabrication method for pattern-formed structure having a smooth three-dimensional structure through a fewer processes. To achieve the object, the present invention provides a fabrication method for pattern-formed structure comprising: a dot modulation pattern forming process of binarizing a shape of a targeted three-dimensional structure to form a dot modulation pattern, a writing process of using the dot modulation pattern to write directly by a writer on a photosensitive resin layer formed on a substrate, and a developing process of developing the photosensitive resin layer after the writing to form a resin layer with three-dimensional structure, wherein the writing process is performed by a writing energy supplying method in which writing energy is supplied to the photosensitive resin layer by an area larger than a minimum dot area in the dot modulation pattern.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: February 14, 2017
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Makoto Abe, Masaaki Kurihara, Kazuaki Baba
  • Patent number: 9563118
    Abstract: On a photomask used for exposure processing, a plurality of pattern regions on which predetermined patterns are formed using a light shielding material are provided, and calibration marks are formed at positions corresponding to at least two opposite sides of each pattern region. During exposure processing, a deformation state of the photomask is detected based on calibration marks formed on the photomask and marks formed on a substrate stage, and a projection condition for projecting a pattern formed on the photomask on the substrate is corrected based on the detection result.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: February 7, 2017
    Assignee: Sakai Display Products Corporation
    Inventor: Masahiro Kato
  • Patent number: 9557649
    Abstract: A photolithographic technique includes receiving a mask having a printing feature region, a sub-resolution assist feature (SRAF) region, and a third region. Each region has a different thickness of an absorptive layer disposed therein. The technique also includes exposing the mask to radiation, such that an intensity of radiation reflected by the SRAF region is substantially between an intensity of radiation reflected by the printing feature region and an intensity of radiation reflected by the third region. Using the radiation reflected by the printing feature region, the radiation reflected by the SRAF region, and the radiation reflected by the third region a workpiece is exposed.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tao-Min Huang, Chia-Jen Chen, Hsin-Chang Lee, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9547232
    Abstract: Disclosed herein are various pellicles for use during extreme ultraviolet (EUV) photolithography processes. An EUV radiation device disclosed herein includes a reticle, a substrate support stage, a pellicle positioned between the reticle and the substrate support stage, wherein the pellicle includes an aerogel grid and a membrane formed on the aerogel grid, and a radiation source that is adapted to generate radiation at a wavelength of about 20 nm or less that is to be directed through the pellicle toward the reticle.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 17, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Harry J. Levinson, Obert R. Wood, II
  • Patent number: 9548291
    Abstract: Provided is a semiconductor structure. The semiconductor structure is formed on a substrate, and includes a first region and a second region surrounded by the first region. The first region has a first pattern density, and the second region has a second pattern density. The first pattern density is smaller than the second pattern density. The second region includes a central region and a boundary region. The central region has a first critical dimension, and the boundary region has a second critical dimension. Variation between the first critical dimension and the second critical dimension is smaller than 6.5%.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: January 17, 2017
    Assignee: MACRONIX International Co., Ltd.
    Inventor: Feng-Nien Tsai
  • Patent number: 9541823
    Abstract: A photomask blank comprising a transparent substrate and a chromium-containing film deposited thereon is provided. The chromium-containing film comprises at least one CrC compound layer comprising up to 50 at % of Cr, at least 25 at % of O and/or N, and at least 5 at % of C. From the blank, a photomask having a photomask pattern formed on the substrate is produced, the photomask being used in photolithography of forming a resist pattern with a line width of up to 0.1 ?m, using exposure light having a wavelength of up to 250 nm.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: January 10, 2017
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Kouhei Sasamoto, Yukio Inazuki, Souichi Fukaya, Hideo Nakagawa, Hideo Kaneko
  • Patent number: 9535318
    Abstract: This invention provides a reflective mask blank capable of preventing peeling-off of a multilayer reflective film due to cleaning or the like in a mask manufacturing process or during mask use. The reflective mask blank includes a multilayer reflective film, a protective film, an absorber film, and a resist film formed in this order on a substrate. Assuming that a distance from the center of the substrate to an outer peripheral end of the multilayer reflective film is L(ML), that a distance from the center of the substrate to an outer peripheral end of the protective film is L(Cap), that a distance from the center of the substrate to an outer peripheral end of the absorber film is L(Abs), and that a distance from the center of the substrate to an outer peripheral end of the resist film is L(Res), L(Abs)>L(Res)>L(Cap)?L(ML) and the outer peripheral end of the resist film is located inward of an outer peripheral end of the substrate.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: January 3, 2017
    Assignee: HOYA CORPORATION
    Inventors: Kazuhiro Hamamoto, Tatsuo Asakawa, Osamu Maruyama, Tsutomu Shoki
  • Patent number: 9535317
    Abstract: A method for forming a lithography mask includes forming a capping layer on a reflective multilayer layer, the capping layer comprising a first material, forming a patterned patterning layer on the capping layer, and introducing a secondary material into the capping layer, the secondary material having an atomic number that is smaller than 15.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Cheng Hsu, Chih-Cheng Lin, Ta-Cheng Lien, Wei-Shiuan Chen, Hsin-Chang Lee, Anthony Yen
  • Patent number: 9535319
    Abstract: A method includes providing a pre-optical proximity correction (OPC) layout of at least a portion of at least one reticle. The pre-OPC layout defines a test cell including a first test cell area having a plurality of first target features having a first pitch and a second test cell area having a plurality of second target features having a second pitch. A post-OPC layout of the portion of the reticle is formed on the basis of the pre-OPC layout. The formation of the post-OPC layout includes performing a rule-based OPC process, wherein a plurality of first reticle features for the first test cell area are provided on the basis of the plurality of first target features, and performing a model-based OPC process, wherein a plurality of second reticle features for the second test cell area are provided on the basis of the plurality of second target features.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: January 3, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Guido Ueberreiter, Guoxiang Ning, Jui-Hsuan Feng, Paul Ackmann, Chin Teong Lim
  • Patent number: 9529250
    Abstract: The present disclosure also provides a photolithography mask. The photolithography mask includes a substrate that contains a low thermal expansion material (LTEM). A reflective structure is disposed over the substrate. A capping layer is disposed over the reflective structure. An absorber layer is disposed over the capping layer. The absorber layer contains an indium tin oxide (ITO) material. In some embodiments, the ITO material has a SnO6 crystalline structure.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: December 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Ling Hsieh, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9529271
    Abstract: The present disclosure provides an embodiment of a method, for a lithography process for reducing a critical dimension (CD) by a factor n wherein n<1. The method includes providing a pattern generator having a first pixel size S1 to generate an alternating data grid having a second pixel size S2 that is <S1, wherein the pattern generator includes multiple grid segments configured to offset from each other in a first direction; and scanning the pattern generator in a second direction perpendicular to the first direction during the lithography process such that each subsequent segment of the grid segments is controlled to have a time delay relative to a preceding segment of the grid segments.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: December 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chuan Wang, Burn Jeng Lin, Jaw-Jung Shin, Pei-Yi Liu, Shy-Jay Lin
  • Patent number: 9529251
    Abstract: A method for measuring flare information of a projection optical system includes arranging, on an object plane of the projection optical system, a sectoral pattern surrounded by a first side, a second side which is inclined at a predetermined angle with respect to the first side, and an inner diameter portion and an outer diameter portion which connect both ends of the first side and both ends of the second side; projecting an image of the sectoral pattern via the projection optical system; and determining the flare information based on a light amount of the image of the sectoral pattern and a light amount provided at a position away from the image. With the flare measuring method, it possible to correctly measure the flare information in an arbitrary angle range.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: December 27, 2016
    Assignee: NIKON CORPORATION
    Inventor: Masayuki Shiraishi
  • Patent number: 9524939
    Abstract: Provided is an alignment mark having a plurality of sub-resolution elements. The sub-resolution elements each have a dimension that is less than a minimum resolution that can be detected by an alignment signal used in an alignment process. Also provided is a semiconductor wafer having first, second, and third patterns formed thereon. The first and second patterns extend in a first direction, and the third pattern extend in a second direction perpendicular to the first direction. The second pattern is separated from the first pattern by a first distance measured in the second direction. The third pattern is separated from the first pattern by a second distance measured in the first direction. The third pattern is separated from the second pattern by a third distance measured in the first direction. The first distance is approximately equal to the third distance. The second distance is less than twice the first distance.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: December 20, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Feng Shieh, Ya Hui Chang, Ru-Gun Liu, Tsong-Hua Ou, Ken-Hsien Hsieh, Burn Jeng Lin
  • Patent number: 9519209
    Abstract: The present inventions relates to a substrate for a photolithographic mask comprising a coating deposited on a rear surface of the substrate, wherein the coating comprises (a) at least one electrically conducting layer, and (b) wherein a thickness of the at least one layer is smaller than 30 nm, preferably smaller than 20 nm, and most preferably smaller than 10 nm.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: December 13, 2016
    Assignees: Fundació Institut de Ciències Fotòniques, Cark Zeiss SMT GmbH
    Inventors: Valerio Pruneri, Albert Carrilero, Jan-Hendrik Peters
  • Patent number: 9519227
    Abstract: Methods for measuring photosensitizer concentrations in a photo-sensitized chemically-amplified resist (PS-CAR) patterning process are described. Measured photosensitizer concentrations can be used in feedback and feedforward control of the patterning process and subsequent processing steps. Also described is a metrology target formed using PS-CAR resist, and a substrate including a plurality of such metrology targets to facilitate patterning process control.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: December 13, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Michael A. Carcasi, Mark H. Somervell, Joshua S. Hooge, Benjamen M. Rathsack, Seiji Nagahara
  • Patent number: 9513552
    Abstract: A composite mask suitable for multiple-patterning lithographic processes and a multiple-patterning photolithographic process utilizing the mask are disclosed. An exemplary embodiment includes receiving a mask having a plurality of sub-reticles and a substrate having one or more regions. A first sub-reticle of the plurality of sub-reticles is aligned with a first region of the one or more regions. A movement pattern is designated relative to the substrate. A first photolithographic process is performed including exposing the substrate using the mask to form a first exposed area on the substrate. An alignment of the mask relative to the substrate is shifted according to a first direction determined by the movement pattern. A second photolithographic process is performed including exposing the substrate using the mask to form a second exposed area on the substrate such that the second exposed area overlaps the first.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: December 6, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chue San Yoo, Chang-Jyh Hsieh, Li-Wei Kung, Yung-Cheng Chen
  • Patent number: 9513542
    Abstract: A first embodiment is a lithography mask comprising a transparent substrate and a first molybdenum silicon nitride (MoxSiyNz) layer. The first MoxSiyNz layer is over the transparent substrate. A percentage of molybdenum (x) of the first MoxSiyNz layer is between 1 and 2. A percentage of silicon (y) of the first MoxSiyNz layer is between 50 and 55. A percentage of nitride (z) of the first MoxSiyNz layer is between 40 and 50. The first MoxSiyNz layer has an opening therethrough.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: December 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chue San Yoo, Chun-Lang Chen
  • Patent number: 9507252
    Abstract: A photomask includes a transparent substrate, and a light shield provided to the transparent substrate. The light shield includes a translucent mask pattern opening, and the mask pattern opening includes a plurality of translucent regions which are provided to a periphery of a region corresponding to a desired pattern, and allow exposure light beams to be transmitted at at least three different phases. Each of the plurality of translucent region spaced apart from the region corresponding to the desired pattern, advances more toward an exposure object spaced a predetermined distance apart compared to a phase plane of an exposure light beam transmitted through a translucent region of the plurality of translucent regions, the translucent region close to the region corresponding to the desired pattern, such that the exposure light beams that are transmitted through the mask pattern opening form a projection image of the desired pattern on the exposure object.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: November 29, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Akio Misaka
  • Patent number: 9488905
    Abstract: A method of forming a mask for semiconductor fabrication is disclosed. The method includes providing a substrate and forming a first reflective layer over the substrate, wherein the first reflective layer comprises pairs of alternating materials. The method further includes forming a buffer layer over the first reflective layer and forming a second reflective layer over the buffer layer. The second reflective layer has a total thickness less than 90 nanometer (nm). The method further includes patterning the second reflective layer to form a first state and a second state of the mask. A first reflection coefficient of the first state and a second reflection coefficient of the second state have a phase difference of about 180 degrees.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: November 8, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9488906
    Abstract: The present invention relates to a photomask blank obtained by forming a resist film after performing a silylation process on a silicon-containing inorganic film and provides a method for manufacturing a photomask blank having at least a silicon-containing inorganic film over a transparent substrate and a resist film on the silicon-containing inorganic film, comprising: forming the silicon-containing inorganic film such that a surface that will contact the resist film has an oxygen concentration not less than 55 atomic percent and not more than 75 atomic percent; performing a silylation process after forming the silicon-containing inorganic film; and then forming the resist film by application. The method can inhibit generation of defects due to resist residues or the like after development.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: November 8, 2016
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Yukio Inazuki, Takashi Yoshii, Toyohisa Sakurada, Akira Ikeda, Hideo Kaneko, Satoshi Watanabe, Yoshio Kawai