Abstract: The present disclosure includes apparatuses and methods for operating neural networks. An example apparatus includes a plurality of neural networks, wherein the plurality of neural networks are configured to receive a particular portion of data and wherein each of the plurality of neural networks are configured to operate on the particular portion of data during a particular time period to make a determination regarding a characteristic of the particular portion of data.

Abstract: A bootstrap circuit supporting fast charging and discharging and a chip. A voltage measurement module (12) and a switch module (11) are arranged, and the voltage measurement module (12) controls an operating state of the switch module (11); during charging, under a specific condition, the switch module (11) is enabled to be in an on state so as to achieve fast charging of a voltage output end; and during discharging, the purpose of fast discharging is achieved by means of a second field effect transistor (MP5) arranged in the bootstrap circuit.

Abstract: An apparatus comprises a power source connected to a buffer capacitor. The apparatus comprises a first switch connected between the buffer capacitor and a driven switch. The buffer capacitor is charged by the power source when the first switch is turned off. The apparatus comprises a comparator. The comparator monitors the charging of the buffer capacitor. In response to the buffer capacitor reaching a threshold amount of charge, the comparator turns on the first switch to initiate a charge redistribution of charge from the buffer capacitor to the driven switch.

Abstract: A mechanism is described for facilitating memory handling and data management in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting multiple tables associated with multiple neural networks at multiple autonomous machines, where each of the multiple tables include an index. The method may further include combining the multiple tables and multiple indexes associated with the multiple tables into a single table and a single index, respectively, where the single table is communicated to the multiple autonomous machines to allow simultaneous processing of one or more portions of the single table using one or more memory devices and one or more processors of one or more of the multiple autonomous machines.

Abstract: A comparator receives a target voltage and a reference voltage at its inverting and non-inverting input terminals, and outputs a signal corresponding to the level relationship between those voltages A node provided on the output side of the comparator is fed with a signal equivalent to the output signal of the comparator. Between the node and the non-inverting input terminal of the comparator, a capacitor is inserted.

Abstract: Aspects of the present relate to reflection type phase shifters for radio frequency (RF) wireless devices. Reflection type phase structures in accordance with aspects described herein can improve device performance with compact configurations, such as where magnetic and capacitive coupling is integrated into a device design to integrate interactions between elements for improved phase shifting performance in a compact design with wideband performance.

Abstract: A method for operating a wireless power transmission system includes providing a driving signal for driving a transmission antenna, the driving signal based, at least, on an operating frequency for the wireless power transmission system. The method includes receiving, by at least one transistor of an amplifier of the wireless power transmission system, the driving signal at a gate of the at least one transistor and inverting a direct current (DC) input power signal to generate an AC wireless signal at the operating frequency. The method includes receiving, at a damping transistor of a damping circuit, damping signals for switching the damping transistor to control signal damping during transmission or receipt of wireless data signals in-band of the AC wireless signal. The method includes selectively damping, by the damping circuit, the AC wireless signals, during transmission of the wireless data signals, based, at least in part, on the damping signals.

Abstract: This disclosure describes systems, methods, and apparatus for generating a multi-level pulsed waveform using a DC section and a power amplifier. To improve DC section efficiency, a master state is used to determine when the rail voltage can be lowered, and to only allow a state assigned as the master state to lower the rail voltage. Selection of the master state is based on (1) any state having to raise the rail voltage to meet a power demand or (2) a state having the highest drive voltage as determined at the end of each pulse cycle. Further, to avoid challenges from integrator controller, drive voltage is carried over from a last state of one pulse cycle to a first state of a next pulse cycle and assignment of master state in the first state of each pulse cycle is not important and can be arbitrarily selected.

Abstract: Optimized memory usage and management is crucial to the overall performance of a neural network (NN) or deep neural network (DNN) computing environment. Using various characteristics of the input data dimension, an apportionment sequence is calculated for the input data to be processed by the NN or DNN that optimizes the efficient use of the local and external memory components. The apportionment sequence can describe how to parcel the input data (and its associated processing parameters—e.g., processing weights) into one or more portions as well as how such portions of input data (and its associated processing parameters) are passed between the local memory, external memory, and processing unit components of the NN or DNN. Additionally, the apportionment sequence can include instructions to store generated output data in the local and/or external memory components so as to optimize the efficient use of the local and/or external memory components.

Abstract: An overvoltage protection circuit which can be applied to a motor controller is provided. The overvoltage protection circuit is coupled to an input terminal for receiving an input voltage. The overvoltage protection circuit comprises a switch circuit, a controller, and a comparing unit. When the input voltage is greater than a first voltage, a discharging mechanism is forced to start so as to suppress a voltage spike. When the input voltage is less than a second voltage, the discharging mechanism is closed so as to operate normally.

Abstract: A semiconductor device capable of changing drive capability as appropriate is provided. A semiconductor device (100A) includes first to third circuits (102, 103, 101) and a first holding circuit (SH2), and the first holding circuit (SH2) includes a first holding portion (node ND2) and holds a first potential. The first circuit (102) has a function of changing the first potential of the first holding portion (node ND2) to a second potential, and the second circuit (103) has a function of generating a bias current based on the first potential or the second potential of the first holding portion (node ND2). The third circuit (101) includes first to third terminals (TLa4, TLa1, TLa2) and has a function of generating a third potential in accordance with an input potential to the second terminal (TLa1) by supply of the bias current to the first terminal (TLa4) and outputting the third potential from the third terminal (TLa2).

Abstract: A method for operating a wireless power transmission system includes providing a driving signal for driving a transmission antenna of the wireless power transmission system, the driving signal based, at least, on an operating frequency for the wireless power transmission system. The method further includes receiving, at a damping transistor of a damping circuit, damping signals for switching the damping transistor to one of an active mode and an inactive mode to control signal damping during transmission or receipt of wireless data signals. The method further includes selectively damping, by the damping circuit, the AC wireless signals, during transmission of the wireless data signals if the damping signals set the damping circuit to the active mode.

Abstract: According to an embodiment, a high frequency integrated circuit includes a signal splitter, an attenuator, a first conductive element, and first to eighth switches. The signal splitter receives a high frequency signal at an input terminal, splits the high frequency signal to two lines, and outputs the signals split into the two lines from a first output terminal and a second output terminal. The attenuator has multiple amounts of attenuation values. In the first conductive element, a first amount of attenuation is set. The high frequency integrated circuit outputs a plurality of output signals having different gain values from the first high frequency output terminal and the second high frequency output terminal, respectively.

Abstract: According to one embodiment, in a biquad filter, an output terminal of a first integrator is connected to an input terminal in a negative pole side of a second integrator, an output terminal of the first integrator is connected to a first input terminal in a negative pole side of an adder through the inversion amplifier, an output terminal of the second integrator is connected to a second input terminal in the negative pole side of the adder, an input terminal to which an input signal is input is connected to a third input terminal in the negative side of the adder, and an output terminal of the adder is connected to an input terminal in a negative pole side of the first integrator.

Abstract: According to one embodiment, a current detecting circuit includes: a normally-ON type first switching element that includes a drain, a source, and a gate; a normally-OFF type second switching element including a drain that is connected to the source of the first switching element, a source that is connected to the gate of the first switching element, and a gate; and a differential amplification circuit that outputs a voltage according to a voltage between the drain and the source of the second switching element.

Abstract: In one aspect, a solid-state switching apparatus is provided that includes a pair of anti-parallel thyristors, a quasi-resonant turn-off circuit, a sensor, and a control circuit. The turn-off circuit is coupled in parallel with the pair of anti-parallel thyristors and includes a first selectively conductive path and a second selectively conductive path. The sensor is configured to sense a thyristor current conducted by at least one of the pair of anti-parallel thyristors. The control circuit is configured to receive the sensed thyristor current from the sensor and determine a magnitude of the sensed thyristor current and a polarity of the sensed thyristor current. The control circuit is further configured to activate, in response to determining that the magnitude is greater than a threshold value, one of the first selectively conductive path and the second selectively conductive path based on the polarity to commutate and interrupt the thyristor current.

Abstract: A directional power detector device includes a directional coupling network including a first transmission path connected between a radio frequency (RF) input and an RF output, the first transmission path having a voltage transmission gain A, phase ? and characteristic impedance Zo, a second transmission path having the same voltage transmission gain A, phase ? and characteristic impedance Zo, and a resistor connected between the first transmission path at the RF output and the second transmission path, where the resistor has a value including the characteristic impedance Zo. The directional power detector device further includes a detector diode including an anode connected to the second transmission path and a cathode, a capacitor connected between the cathode of the detector diode and the RF input port, and a detector output connected to the cathode of the detector diode.

Abstract: A monopod for mounting to the boat seat mount of a marine vessel, such as a bass boat or speed boat, which is capable of providing power for mobile accessories via a second monopod affixed to the navigation light port of the boat. The monopod is extendable to heights up to or exceeding eight feet (8?) above the deck of the boat, providing exceptional views for recording with a mounted camera while users participate in sports or other events within the boat. A release mechanism allows one portion of the monopod to telescope away from a second portion, thereby extending the monopod.

Abstract: An ultra-high frequency power combiner according to the disclosure includes a first input line connected to a first input port, a second input line connected to a second input port, an output line connected to an output port, a first transmission line between the first input line and the output line, a second transmission line between the second input line and the output line, a first series capacitor, a resistor, and a second series capacitor connected in series between a first node between the first input line and the first transmission line and a second node between the second input line and the second transmission line, and a first parallel capacitor, an inductor, and a second parallel capacitor connected in parallel with the resistor and connected in series with one another.

Abstract: Various embodiments relate to a circuit system, including: an original circuit; a dual circuit, wherein the dual circuit is a dual of the original circuit; an input inverter connected the dual circuit, wherein the input inverter inverts system inputs; an output inverter connected to one of the original circuit and the dual circuit, wherein the output inverter inverts the output of the connected original circuit or dual circuit; and a comparator receiving and comparing the output of the invertor and the output of one of the original circuit and the dual circuit not connected to the inverter, wherein the comparator indicates an error when the received outputs are not identical and indicating no error when the received outputs are identical.