Abstract: A method for accessing a storage system, the method may include receiving a block call, from a processor that executes an application and by a storage engine of a computer that is coupled to a storage system; generating, by the storage engine and based on the block call, a key value call; and sending the key value call to a key value frontend of the storage system.

Abstract: Garbage collection is performed for a virtualized storage system whose virtual address space is addressed in extents. Valid data in source extents is copied via a cache into destination extents. Once all valid data in a source extent is copied into one or more destination extents, the source extent may be reused. A source extent is released for reuse only after the one or more destination extents that received the valid data copied from the source extent are determined to be full, and the valid data copied from the source extent to the destination extent via the cache is flushed out of the cache.

Abstract: A memory system includes a memory device comprising a plurality of planes and a controller suitable for controlling the memory device. The controller may include a processor suitable for determining at least one busy plane and at least one idle plane among the plurality of planes in response to a host command, and controlling the memory device such that the busy plane performs an operation associated with the host command and the idle plane performs an operation of erasing a complete dirty block in the idle plane. The busy plane and the idle plane may operate in parallel in response to control of the processor.

Abstract: The subject technology provides for managing a data storage system. A host write command to write host data associated with a logical address to a non-volatile memory is received. A first physical address in the non-volatile memory mapped to the logical address in an address mapping table is determined. An indicator that the first physical address is bad checked. If the first physical address is indicated as bad, a valid count associated with a first set of physical addresses at a current value is maintained. The first set of physical addresses comprises the first physical address. If the first physical address is not indicated as bad, the first physical address is marked as invalid. The valid count associated with the first set of physical addresses is decremented.

Abstract: According to one embodiment, an electronic device connectable to a host via an interface includes a nonvolatile memory and a controller electrically connected to the nonvolatile memory and capable of processing commands issued by the host in parallel. When the electronic device is connected to the host, the controller determines, when one or more commands to be processed by one or more deadline times, respectively, are issued by the host, scheduling indicative of timings at which the one or more commands are processed, respectively, based on the one or more deadline times. The controller performs processing corresponding to the one or more commands in accordance with the scheduling.

Abstract: A system comprises a memory, a plurality of memory banks, and an organizer. The memory is configured to store elements of a matrix, wherein the elements are distributed into overlapping subgroups and each shares at least one element of the matrix with another overlapping subgroup. The plurality of memory banks is configured to store the overlapping subgroups, wherein the subgroups are distributed among the memory banks using a circular shifted pattern. The organizer is configured to read specific ones of the overlapping subgroups in the plurality of memory banks in a specified pattern associated with transposing the matrix.

Abstract: Methods, non-transitory machine readable media, and computing devices that facilitate efficient storage operations using host-managed solid-state disks (SSDs) are disclosed. With this technology, a direct memory access (DMA) transfer is initiated of a data block from a location indicated in an application write request to a write buffer in a device memory of an SSD. A determination is made when write rule(s) are satisfied based on content of the write buffer including at least the data block and other data block(s) previously transferred to the write buffer. A copy request is issued to transfer a portion of the content to flash media of the SSD, when the write rule(s) are satisfied. This technology does not require host memory for write buffering or processor cycles for copying data from application data buffers to a write buffer in host memory, and thereby significantly improves resource utilization of host devices managing SSDs.

Abstract: A device may include a plurality of data processing engines. Each of the data processing engines may include a core and a memory module. The plurality of data processing engines may be organized in a plurality of rows. Each core may be configured to communicate with other neighboring data processing engines of the plurality of data processing engines by shared access to the memory modules of the neighboring data processing engines.

Abstract: Disclosed are systems, methods, and apparatuses for providing a high-speed data path to storage devices. In one embodiment, a method is disclosed comprising receiving, by the processor, a data access command, the data access command specifying a location in memory to access data; issuing, by the processor, the data access command to the storage device via a first datapath, the first datapath comprising a non-block datapath; and accessing, by the processor, the non-volatile storage component through the first datapath and the memory, wherein the non-volatile storage component of the storage device is mapped to memory accessible by the processor.

Abstract: An archival blockchain system is disclosed that includes a cache-tier storage level where blockchain blocks for a contiguous blockchain are generated and stored before they have met a first aging criteria, a disk-tier storage level where the blockchain blocks are stored after they have met the first aging criteria, but before they have met a second aging criteria, and a tape-tier storage level where the blockchain blocks are stored after they have met the second aging criteria. This archival blockchain system also includes a blockchain appliance in digital data communication with the cache-tier, disk-tier, and tape-tier storage levels that maintains a blockchain ledger that stores data pointers to the blockchain blocks stored on the cache-tier, disk-tier, and tape-tier storage levels to logically link them into the contiguous blockchain.

Abstract: Techniques for data processing may include: receiving a data chunk and an associated digest; and performing data deduplication processing for the data chunk comprising: determining whether there is an existing entry in a deduplication digest cache for the digest; and responsive to determining there is no existing entry in the deduplication digest cache, performing processing including: determining whether there is an existing entry in a mapping structure for the digest, the mapping structure mapping digests to associated pages of related entries in a deduplication data store; and responsive to determining there is an existing entry in the mapping structure, performing second processing including: obtaining, from the existing entry, a page mapped to the digest; and loading the page of entries from the deduplication data store into the deduplication digest cache. At least some entries of the page may be prefetched and loaded into the deduplication digest cache prior to use.

Abstract: Topology of clusters of processors of a computer configuration, configured to support any of a plurality of cache coherency protocols, is discovered at initialization time to determine which one of the plurality of cache coherency protocols is to be used to handle coherency requests of the configuration.

Abstract: A method of applying an address space to data storage in a non-volatile solid-state storage is provided. The method includes receiving a plurality of portions of user data for storage in the non-volatile solid-state storage and assigning to each successive one of the plurality of portions of user data one of a plurality of sequential, nonrepeating addresses of an address space. The address range of the address space exceeds a maximum number of addresses expected to be applied during a lifespan of the non-volatile solid-state storage. The method includes writing each of the plurality of portions of user data to the non-volatile solid-state storage such that each of the plurality of portions of user data is identified and locatable for reading via the one of the plurality of sequential, nonrepeating addresses of the address space.

Abstract: One example method includes reading a data chunk from a data stream, compressing the data chunk, and calculating a chunk delta. When the chunk delta is greater than zero, the compressed data chunk is appended to an incomplete data chunk. When the chunk delta is zero or less, the boundaries of a completed and compressed data chunk having a size at least as large as a minimum size are declared.

Abstract: A plurality of types of user data are collected and stored into a plurality of data queues, where each data queue of the plurality of data queues has a predetermined maximum length and stores one type of user data. A weighting coefficient and a current length of user data is determined for each data queue. A priority data queue is selected from the plurality of data queues based on the weighting coefficient and the current length of user data corresponding to each data queue. The priority data queue is written to a data buffer.

Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

Abstract: A guarded storage facility sets up a boundary indicating a range of addresses to be guarded or protected. When a program attempts to access an address in a guarded section defined by the boundary, a guarded storage event occurs. Use of this facility facilitates performance of certain tasks within a computing environment, including storage reclamation.

Abstract: Embodiments of the present disclosure provide a method and apparatus for providing data storage service. The method comprises: receiving a storage service template from an user, the storage service template specifying a storage service policy for the user and a service instance to launch; and providing a storage service according to the storage service template; wherein the storage service policy defines a storage function to be performed for data of the user. With the method and apparatus according to embodiments of the present disclosure, a unified solution for overall orchestration of storage functions can be provided to enable the user to customize the required storage function flexibly.

Abstract: A backup and archival policy method, system, and non-transitory computer readable medium, includes performing correlation analytics to determine identification of a backup policy aligned with a criticality of operational data and backup data including identifying low value backup data having a value less than a predetermined low value threshold, creating a one-time archival of the operational data and the backup data including the low value backup data, and removing the low value backup data from a future data protection policy.

Abstract: An access method of a nonvolatile memory device included in a user device includes receiving a write request to write data into the nonvolatile memory device; detecting an application issuing the write request, a user context, a queue size of a write buffer, an attribute of the write-requested data, or an operation mode of the user device; and deciding one of a plurality of write modes to use for writing the write-requested data into the nonvolatile memory device according to the detected information. The write modes have different program voltages and verify voltage sets.