Patents Examined by Eric S Cardwell
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Patent number: 9971701Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. According to one embodiment, a request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: GrantFiled: October 16, 2015Date of Patent: May 15, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andre L. Albot, Vishal C. Aslot, Mark D. Rogers, Randal C. Swanberg
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Patent number: 9946488Abstract: In a hierarchical storage memory (HSM), a file recalled by a specific application is migrated as soon as possible after completion of the application process. Specifically, the effective UID of a specific process is preregistered on an HSM client. After a recall operation is performed on a certain file from the user ID, when there is no access from the UID to the file for a given length of time, the file is migrated. This prevents files premigrated by access from any application other than the specific one from being handled in the same way, resolving a disadvantageous problem caused when these (premigrated) files are not desired to be migrated preferentially.Type: GrantFiled: August 21, 2015Date of Patent: April 17, 2018Assignee: International Business Machines CorporationInventors: Hiroshi Araki, Hiroyuki Miyoshi, Satoshi Takai
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Patent number: 9898417Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. According to one embodiment, a request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.Type: GrantFiled: January 4, 2016Date of Patent: February 20, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andre L. Albot, Vishal C. Aslot, Mark D. Rogers, Randal C. Swanberg
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Patent number: 9891863Abstract: Systems and methods for handling Shingled Magnetic Recording (SMR) drives in a tiered storage system. In some embodiments, an Information Handling System (IHS) may include a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution by the processor, cause the IHS to: identify, among data stored in a first storage medium, a data subset that has a selected access pattern, wherein the selected access pattern is indicative of how often data is updated; and move the data subset from the first storage medium to one or more SMR drives.Type: GrantFiled: July 31, 2015Date of Patent: February 13, 2018Assignee: Dell Products, L.P.Inventors: William Price Dawkins, Kevin Thomas Marks
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Patent number: 9881040Abstract: User data of different snapshots for the same virtual disk are stored in the same storage object. Similarly, metadata of different snapshots for the same virtual disk are stored in the same storage object, and log data of different snapshots for the same virtual disk are stored in the same storage object. As a result, the number of different storage objects that are managed for snapshots do not increase proportionally with the number of snapshots taken. In addition, any one of the multitude of persistent storage back-ends can be selected as the storage back-end for the storage objects according to user preference, system requirement, snapshot policy, or any other criteria. Another advantage is that the storage location of the read data can be obtained with a single read of the metadata storage object, instead of traversing metadata files of multiple snapshots.Type: GrantFiled: August 20, 2015Date of Patent: January 30, 2018Assignee: VMware, Inc.Inventors: Mayank Rawat, Ritesh Shukla, Li Ding, Serge Pashenkov, Raveesh Ahuja
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Patent number: 9870177Abstract: A method for operating a device adapted to store information with high reliability includes determining a storage address for a data payload portion of a write request in accordance with a configuration of a communications interface coupled to the device, where the data payload is to be stored in mirroring groups of cache storage partitions of a plurality of cache storage modules. The method also includes generating a payload read request in accordance with the storage address, and prompting the communications interface to initiate the storing of the data payload, in parallel, in the mirroring groups in accordance with the payload read request.Type: GrantFiled: April 16, 2015Date of Patent: January 16, 2018Assignee: Futurewei Technologies, Inc.Inventors: Mark Allan Kampe, Cameron Bahar, Jinshui Liu, Wesley Shao, Huawei Liu
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Patent number: 9851903Abstract: A semiconductor system includes a controller and a semiconductor device. The controller generates command signals, a composite control signal, and data signals. The semiconductor device generates a first mode signal and a second mode signal according to the command signals. The semiconductor device includes a write control circuit suitable for receiving the composite control signal and the data signals to determine an execution/non-execution of a data masking operation and a data bus inversion (DBI) operation when a write operation or a masking write operation is performed according to the first and second mode signals.Type: GrantFiled: April 20, 2015Date of Patent: December 26, 2017Assignee: SK hynix Inc.Inventor: Young Jun Yoon
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Patent number: 9847140Abstract: An operating method of a storage device which includes a nonvolatile memory and a memory controller configured to control the nonvolatile memory, may include tracking a clock signal; entering a vendor mode of the storage device when the clock signal corresponds to a vendor pattern; and maintaining a normal mode of the storage device when the clock signal does not correspond to the vendor pattern, wherein, in the normal mode, a command received from an external host device is executed according to a first rule, and wherein, in the vendor mode, the command received from the external host device is executed according to a second rule different from the first rule.Type: GrantFiled: October 16, 2015Date of Patent: December 19, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hae-Sung Bae, Taekkyun Lee, Hyun-Ju Kim, Hwan-Chung Kim, Jonghwan Lee, Young Woo Jung
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Patent number: 9841929Abstract: A computer-executable method, system, and computer program product for providing data services, using a single control path, on a data storage resource selected from a plurality of heterogeneous storage resources, the computer-executable method comprising receiving a request for managing the data storage resource, analyzing the request to determine if a service for managing the data storage resource is available for satisfying the request, and based on the analyzing, providing access to the service for managing the data storage resource from the heterogeneous storage resources.Type: GrantFiled: September 28, 2012Date of Patent: December 12, 2017Assignee: EMC IP Holding Company LLCInventor: Won T. Cho
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Patent number: 9836408Abstract: A data processing method, a computer readable medium, and a data processing device capable of improving processing efficiency are provided. A storage destination of sub-read blocks is changed to a high-speed small-capacity memory on a high layer by adding a shape attribute in an attribute group for data blocks, adding a memory access monitoring unit for obtaining the shape attribute of a data block to the configuration of a data processing device, obtaining the shape attribute of the non-rectangular read block by executing a program on a trial basis, and propagating this shape attribute in a direction opposite to a data flow or a process flow within the program.Type: GrantFiled: October 16, 2015Date of Patent: December 5, 2017Assignee: Renesas Electronics CorporationInventor: Katsunori Tanaka
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Patent number: 9830109Abstract: The subject matter disclosed herein provides methods for materializing data from an in-memory array to one or more pages. An in-memory array holding a column of data can be maintained. One or more pages can be maintained. Each of the one or more pages can have one or more rows for storing the column of data. At least one of the one or more pages can be marked for materialization. The column of data can be materialized by copying the data from the in-memory array to the one or more rows of the one or more pages. The materializing can be based on the marking. Related apparatus, systems, techniques, and articles are also described.Type: GrantFiled: December 5, 2016Date of Patent: November 28, 2017Assignee: SAP SEInventors: David Wein, Mihnea Andrei, Dirk Thomsen, Ivan Schreter
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Patent number: 9830090Abstract: In a reliable distributed computing system, techniques where user actions or events affecting real system devices (RSD's), or causing the system to make changes to metadata, require fewer accesses to RSD's. When a virtual system device (VSD) is mounted, substantially all the metadata, or at least that associated with data recovery, is read into memory. Changes to that metadata can be made substantially without any metadata accesses to RSD's. No metadata accesses to RSD's are made for read operations, as the RSD would remain unchanged. Metadata is flushed from memory upon write operations. Metadata about data locations can be maintained in memory, so as to be available if any RSD becomes corrupted or otherwise comes to lose data.Type: GrantFiled: November 25, 2014Date of Patent: November 28, 2017Assignee: Scale Computing IncInventors: Nate Hardt, Scott Loughmiller, Philip White
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Patent number: 9830264Abstract: A cache memory system includes a cache memory, which stores cache data corresponding to portions of main data stored in a main memory and priority data respectively corresponding to the cache data; a table storage unit, which stores a priority table including information regarding access frequencies with respect to the main data; and a controller, which, when at least one from among the main data is requested, determines whether cache data corresponding to the request is stored in the cache memory, deletes one from among the cache data based on the priority data, and updates the cache data set with new data, wherein the priority data is determined based on the information regarding access frequencies.Type: GrantFiled: September 29, 2014Date of Patent: November 28, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeong-soo Park, Kwon-taek Kwon, Jeong-ae Park
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Patent number: 9824032Abstract: Systems and methods for guest page table validation by virtual machine (VM) functions. An example method comprises: storing a first VM function invocation instruction in a first memory page executable from a default memory view of a VM, wherein executing the first VM function invocation instruction switches a page table pointer to a trampoline memory view of the VM; configuring a write access permission, from the trampoline memory view, to a page table comprised by a VM page table hierarchy; storing a second VM function invocation instruction in a second memory page executable from the trampoline memory view, wherein executing the second VM function invocation instruction switches the page table pointer to an alternative memory view of the VM; storing, in the second memory page, validation instructions to validate the VM page table hierarchy; and storing protected instructions within a third memory page executable from the alternative memory view.Type: GrantFiled: April 16, 2015Date of Patent: November 21, 2017Assignee: Red Hat Israel, Ltd.Inventors: Michael Tsirkin, Paolo Bonzini
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Patent number: 9811590Abstract: Techniques are described for managing cached data in a network environment. In one example, the techniques include receiving a client request for a data group, determining that a cached copy of the requested data group that is stored in the persistent cache storage is no longer valid relative to a current copy of the data group stored at a remote data source system, obtaining from the remote data source system information about differences between the cached copy and the current copy and instructions associated with the identified differences, modifying, by the configured server computing system, the cached copy to include the identified differences in accordance with the received instructions, and providing, by the configured server computing system, the modified cached copy of the requested data group to the client in response to the client request.Type: GrantFiled: February 13, 2012Date of Patent: November 7, 2017Assignee: Amazon Technologies, Inc.Inventors: Prashanth A. Acharya, Jonathan B. Corley, Nathan Alan Dye, Craig W. Howard, Harvo R. Jones, John K. Loendorf, Bradley E. Marshall, Imran Patel, Lee B. Rosen, Ronald James Snyder, Jr., Ryan F. Watson
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Patent number: 9811461Abstract: In an embodiment of the invention, a method comprises: requesting an update or modification on a control data in at least one flash block in a storage memory; requesting a cache memory; replicating, from the storage memory to the cache memory, the control data to be updated or to be modified; moving a clean cache link list to a dirty cache link list so that the dirty cache link list is changed to reflect the update or modification on the control data; and moving the dirty cache link list to a for flush link list and writing an updated control data from the for flush link list to a free flash page in the storage memory.Type: GrantFiled: April 17, 2015Date of Patent: November 7, 2017Assignee: BiTMICRO Networks, Inc.Inventors: Marvin Dela Cruz Fenol, Jik-Jik Oyong Abad, Precious Nezaiah Umali Pestano
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Patent number: 9792069Abstract: A method for managing a flash storage system includes reading flash data units from flash memory into a buffer, wherein each of the flash data units includes host data units, and determining an identifier for each host data unit. The method includes selecting a set of unique identifiers from the determined identifiers based on a number of host data units sharing the respective unique identifier. For each unique identifier in the set of unique identifier, the method includes designating one of the host data units as a master data unit, wherein the logical address of the designated host data unit is mapped to a physical address. The logical addresses of the other host data units sharing the unique identifier are remapped to the master physical address, and the physical addresses previously mapped to the remapped logical addresses are invalidated.Type: GrantFiled: September 29, 2014Date of Patent: October 17, 2017Assignee: Western Digital Technologies, Inc.Inventors: Gunter Knestele, Jeffrey L. Furlong
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Patent number: 9792060Abstract: Write optimization for block-based storage performing snapshot operations may be implemented. Write requests for a particular data volume may be received for which a snapshot operation is in progress. A determination may be made as to whether a data chunk of the data volume modified as part of the write request has not yet been stored to a remote snapshot data store as part of the snapshot operation. For a data chunk that is to be modified and that has not yet been stored, the data chunk may be stored in a local in-memory volume snapshot buffer. Once the data chunk is stored in the in-memory volume snapshot buffer, the write request may be performed and acknowledged as complete. The data chunk may be sent to the remote snapshot data store asynchronously with regard to the acknowledgment of the write request.Type: GrantFiled: July 21, 2016Date of Patent: October 17, 2017Assignee: Amazon Technologies, Inc.Inventors: Danny Wei, Nandakumar Gopalakrishnan, Jiahua He, John Luther Guthrie, II, James Michael Thompson, Jianhua Fan, Fnu Amit Anand Amleshwaram, Kerry Quintin Lee
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Patent number: 9785372Abstract: A storage subsystem capable of satisfying conditions such as storage capacity and access performance requested by users and to enable expansion of storage drives that are not in RAID group (RG) units is provided at a low cost. The storage subsystem includes a first storage drive for storing data sent from a host computer, a second storage drive having a property that differs from the first storage drive for storing data sent from the host computer, and a processor for controlling the first storage drive and the second storage drive, wherein a processor receives RG configuration requirements from the host computer and determines whether an RG satisfying the RG configuration requirements can be configured, and if the processor determines that an RG can be configured, the first storage drive and the second storage drive are combined to configure the RG.Type: GrantFiled: May 17, 2013Date of Patent: October 10, 2017Assignee: HITACHI, LTD.Inventors: Yukiyoshi Takamura, Tomohisa Ogasawara
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Patent number: 9778877Abstract: Memory devices and a memory controller that controls such memory devices. Multiple memory devices receive commands and addresses on a command/address (C/A) bus that is relayed point-to-point by each memory device. Data is received and sent from these devices to/from a memory controller in a point-to-point configuration by adjusting the width of each individual data bus coupled between the individual memory devices and the memory controller. Along with the C/A bus are clock signals that are regenerated by each memory device and relayed. The memory controller and memory devices may be packaged on a single substrate using package-on-package technology. Using package-on-package technology allows the relayed C/A signals to connect from memory device to memory device using wire bonding. Wirebond connections provide a short, high-performance signaling environment for the chip-to-chip relaying of the C/A signals and clocks from one memory device to the next in the daisy-chain.Type: GrantFiled: October 29, 2012Date of Patent: October 3, 2017Assignee: Rambus Inc.Inventor: Frederick Ware