Abstract: A plurality of storage nodes in a single chassis is provided. The plurality of storage nodes in the single chassis is configured to communicate together as a storage cluster. Each of the plurality of storage nodes includes nonvolatile solid-state memory for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes such that the plurality of storage nodes maintain the ability to read the user data, using erasure coding, despite a loss of two of the plurality of storage nodes. The plurality of storage nodes configured to initiate an action based on the redundant copies of the metadata, responsive to achieving a level of redundancy for the redundant copies of the metadata. A method for accessing user data in a plurality of storage nodes having nonvolatile solid-state memory is also provided.

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes computing circuit boards having processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation. The regions are connected by a plurality of power connectors that convey power from the computing circuit boards to the memory, and a plurality of data connectors that convey data between the first and second regions. The power and data connectors are configured redundantly so that failure of a computing circuit board, a power connector, or a data connector does not interrupt the computation. A method of performing such a computation, and a computer program product implementing the method, are also disclosed.

Abstract: The system utilizes a plurality of layers to provide a robust storage solution. One layer is the RAID engine that provides parity RAID protection, disk management and striping for the RAID sets. The second layer is called the virtualization layer and it separates the physical disks and storage capacity into virtual disks that mirror the drives that a target system requires. A third layer is a LUN (logical unit number) layer that is disposed between the virtual disks and the host. By using this approach, the system can be used to represent any number, size, or capacity of disks that a host system requires while using any configuration of physical RAID storage.

Abstract: Embodiments of the present invention provide a method for storing small volumes of data within a grid-scale storage system. The method includes creating a container within a storage disk. The method includes distributing data evenly between storage disks. A partition is created within the container. Data is received and stored in the partition, wherein the partition is at least as large as the data. The method may also include setting an offset associated with the partition to allow for partition expansion.

Abstract: Write optimization for block-based storage performing snapshot operations may be implemented. Write requests for a particular data volume may be received for which a snapshot operation is in progress. A determination may be made as to whether a data chunk of the data volume modified as part of the write request has not yet been stored to a remote snapshot data store as part of the snapshot operation. For a data chunk that is to be modified and that has not yet been stored, the data chunk may be stored in a local in-memory volume snapshot buffer. Once the data chunk is stored in the in-memory volume snapshot buffer, the write request may be performed and acknowledged as complete. The data chunk may be sent to the remote snapshot data store asynchronously with regard to the acknowledgment of the write request.

Abstract: A content addressable memory (CAM) system can include a comparator core in which all of the keys of the CAM are embedded in comparator blocks. A search key can be provided to each of the comparator blocks, which can compare the search key to its embedded key and determine whether the search key matches the embedded key. The comparator blocks can be organized into paged sets in the comparator core such that only one of the comparator blocks in each paged set is selected and compares its embedded key to the search key at any given time. The comparator block selected in each paged set can be incremented until the search key has been compared to the keys embedded in all of the comparator blocks of the comparator core.

Abstract: For performing efficient full-stride copy source-to-target operations in a computing storage environment by a processor device, pursuant to a destage operation, a determination is made whether to destage a full stride or one track of data on a target volume by comparing a counted number of modified tracks for the full stride against a predetermined threshold.

Abstract: A processor with coherency-leveraged support for low latency message signaled interrupt handling includes multiple execution cores and their associated cache memories. A first cache memory associated a first of the execution cores includes a plurality of cache lines. The first cache memory has a cache controller including hardware logic, microcode, or both to identify a first cache line as an interrupt reserved cache line and map the first cache line to a host physical memory address translated from a guest physical memory address in the address space of a virtual machine to which an I/O device has been assigned. The controller may set a coherency state of the first cache line to shared and, in response to detecting an I/O transaction including I/O data from the I/O device and containing a reference to the host physical memory address, emulate a first message signaled interrupt identifying the host physical memory address.

Abstract: Write pointer management for a disk drive including a disk having a plurality of sectors and a non-volatile memory (NVM) for storing data. Data is sequentially written sector by sector on the disk. The data written in a sector includes a write status indicator indicating that data has been written in the sector. A write pointer is stored on the disk or the NVM as a check-pointed write pointer. The write pointer corresponds to a current sector for writing data on the disk. During a write pointer recovery process, the check-pointed write pointer is retrieved, and at least one write status indicator is scanned in a range of sectors from the sector corresponding to the retrieved check-pointed write pointer and a last sector to identify the current sector for writing data. The write pointer is set to correspond to the identified current sector.

Abstract: Provided are a computer program product, system, and method for selecting pages implementing leaf nodes and internal nodes of a data set index for reuse in memory. Pages in the memory are allocated to internal nodes and leaf nodes of a tree data structure representing all or a portion of a data set index for the data set. At least at least one duration parameter indicates an amount of time after which an unused page implement one of the internal nodes or leaf nodes is eligible for reuse. Selection is made of at least one selected page allocated to at least one of the leaf nodes and the internal nodes that has not been used for one of the at least one duration parameter for reuse.

Abstract: Embodiments of systems, apparatuses, and methods for determining if an instruction of a virtual machine is allowed to modify a protected memory region are described. In some embodiments, a system detects an indication of an attempt by the instruction to write to the protected memory region. In addition, the system determines if the instruction is allowed to write to the protected memory region based on a starting address and data length of the instruction. Furthermore, if the instruction is allowed to write to the protected memory region, the system updates the protected memory region with the instruction results.

Abstract: To provide enhanced operation of data storage devices and systems, various systems, methods, and software are provided herein. In a first example, a data storage system is configured to provide at least a portion of a first data storage device as a verification cache for a storage region of a second data storage device, write data for storage in the verification cache of the first data storage device and write the data for storage in the storage region of the second data storage device. The data storage system is configured to perform a verification process on the data written to the storage region after a verification trigger condition has been met. The data storage system is configured to transfer portions of the data that fail to pass the verification process from the verification cache to supersede the one or more parts of the data in the storage region.

Abstract: An apparatus and method are described for fetching and storing a plurality of portions of a data stream into a plurality of registers. For example, a method according to one embodiment includes the following operations: determining a set of N vector registers into which to read N designated portions of a data stream stored in system memory; determining the system memory addresses for each of the N designated portions of the data stream; fetching the N designated portions of the data stream from the system memory at the system memory addresses; and storing the N designated portions of the data stream into the N vector registers.

Abstract: The present invention is directed to computer storage systems and methods thereof. More specifically, embodiments of the present invention provide an isolated storage control system that includes both a non-volatile memory and a volatile memory. The non-volatile memory comprises a data area and a metadata area. In power failure or similar situations, content of the volatile memory is copied to the data area of the non-volatile memory, and various system parameters are stored at the metadata area. When the system restores its operation, the information at the metadata area is processed, and the content stored at the data area of the non-volatile memory is copied to the volatile memory. There are other embodiments as well.

Abstract: A block-based storage system may implement dynamic durability adjustment for page cache write logging. A rate of incoming write requests for data volumes maintained at a storage node may be monitored. Based, at least in part, on the rate of incoming write requests, a dynamic modification to a durability property for a data volume may be made, such as enabling page cache write logging the data volume or disabling write logging for the data volume. When incoming write requests are received, a determination may be made as to whether page cache write logging for a particular data volume is enabled. For write requests with disabled page cache write logging, the page cache may be updated and the write request may be acknowledged without storing a log record describing the update in a page cache write log.

Abstract: A method for monitoring changes in an inventory of media cartridges in a media library includes the steps of determining with a controller that the inventory of media cartridges in the media library has changed, and asynchronously reporting with the controller the specific change in inventory of media cartridges that has occurred in the media library. The method can also include the step of determining whether the change in inventory included an increase or a decrease in the quantity of media cartridges within the media library, or whether the change in inventory did not include an increase or decrease in the quantity of media cartridges within the media library. Further, the method can also include the step of determining whether the change in inventory of media cartridges is required to be reported. A media library system includes a media library having a plurality of media cartridges, and a controller that determines a change in an inventory of media cartridges in the media library.

Abstract: According to one embodiment, a memory system, such as a SDIO card, includes a nonvolatile semiconductor memory device, a control section, a memory, an extended function section, and an extension register. The extended function section is controlled by the control section. A first command reads data from the extension register in units of given data lengths. A second command writes data to the extension register in units of given data lengths. A extension register includes a first area, and second area different from the first area, information configured to specify a type of the extended function and controllable driver, and address information indicating a place to which the extended function is assigned, the place being on the extension register, are recorded in the first area, and the second area includes the extended function.

Abstract: A cache memory includes: a tag storage section in which one of a plurality of indexes, each index containing a plurality of tag addresses and one suspension-indicating section, is looked up by a first address portion of an accessed address; a data storage section; a tag control section configured to, when the suspension-indicating section contained in the looked-up index indicates suspension, allow access relevant to the accessed address to wait, and when the suspension-indicating section contained in the looked-up index indicates non-suspension, compare a second address portion different from the first address portion of the accessed address to each of the plurality of tag addresses contained in the looked-up index, and detects a tag address matched with the second address portion; and a data control section.

Abstract: A technique for performing cache injection includes monitoring, at a host fabric interface, snoop responses to an address on a bus. When the snoop responses indicate a data block associated with the address is in a shared state, input/output data associated with the address on the bus is directed to a cache that includes the data block in the shared state and is located physically closer to the host fabric interface than one or more other caches that include the data block associated with the address in the shared state.

Abstract: According to one embodiment, a method includes determining, using a processor, which physical blocks are priority physical blocks based on at least one of: a number of application blocks referencing the physical block, and a number of accesses to the physical block, creating a reference to each priority physical block, and outputting the reference. According to another embodiment, a method includes receiving a reference to one or more priority physical blocks in a storage pool, and adjusting an amount of redundancy parity encoding for each of the one or more priority physical blocks based on the reference.