Abstract: An imaging apparatus includes a pixel array unit including a plurality of pixel groups, each of the plurality of pixel groups being one of i) a normal pixel group including only normal pixels, or ii) a mixed pixel group including at least one normal pixel and at least one phase difference detection pixel, wherein the pixel array unit comprises at least one normal pixel group and at least one mixed pixel group. For each normal pixel group, the normal pixels receive light transmitted through a same colored color filter. For each mixed pixel group, the at least one phase difference detection pixel shares an on-chip lens with at least one other phase difference detection pixel and receives light transmitted through a same colored color filter as the at least one other phase difference detection pixel.

Abstract: A display panel is provided. At least two first wires in a second direction are electrically connected to each other and at least two second wires in the second direction are electrically connected to each other. The space in the second direction is fully used to arrange the first wires and the second wires to ensure the number of first via holes disposed corresponding to the first wires and the number of second via holes disposed corresponding to the second wire, thereby ensuring the connectivity of a transparent conductive block that bridges the first wires and the second wires through the first via holes and the second via holes.

Abstract: A method for producing an at least partially transparent device is provided, including producing, on a first substrate, first and second separation layers one against the other; producing, on the second separation layer, an at least partially transparent functional layer; making the functional layer integral with a second at least partially transparent substrate; forming a mechanical separation at an interface between the separation layers; removing the second separation layer; producing a first at least partially transparent electrode layer on the functional layer; where the materials of the stack are chosen such that the interface between the separation layers corresponds to that, among all the interfaces of the stack, having the lowest adherence force.

Abstract: Disclosed are a quantum dot material, a method for patterning a quantum dot film and a quantum dot light emitting device. when preparing a patterned quantum dot film, firstly, a quantum dot film is made by using the quantum dot material with the photolysis group, and a corresponding region of the quantum dot film is irradiated with ultraviolet light under the shielding of a mask template, so that the photolysis group in the corresponding region is photolyzed into the polarity change group, thereby changing the solubility of the quantum dot material in the corresponding region; and subsequently, the quantum dot film is cleaned by using a solvent which can dissolve the quantum dot material with the photolysis group, the quantum dot material in non-irradiated regions is dissolved and removed, and the quantum dot material in the corresponding region is retained to form a pattern of the quantum dot film.

Abstract: Discussed is an apparatus for self-assembling semiconductor light-emitting devices, the apparatus including a fluid chamber to accommodate the semiconductor light-emitting devices, each semiconductor light-emitting device having a magnetic body; a magnet to apply a magnetic force to the semiconductor light-emitting devices while an assembly substrate is disposed at an assembly position of the self-assembly apparatus; a power supply to induce formation of an electric field on the assembly substrate to allow the semiconductor light-emitting devices to be seated at a preset positions on the assembly substrate in a process of moving the semiconductor light-emitting devices due to a change in a position of the magnet; and a fluid injector to shoot a fluid to some of the semiconductor light-emitting devices to allow the some of the semiconductor light-emitting devices seated on the assembly substrate to be separated from the assembly substrate.

Abstract: A light-trapping image sensor includes a pixel array and a lens array. The pixel array is formed in and on a semiconductor substrate and including photosensitive pixels each including a reflective material forming a cavity around a portion of semiconductor material to at least partly trap light that has entered the cavity. The cavity has a ceiling at a light-receiving surface of the semiconductor substrate, and the ceiling forms an aperture for receiving the light into the cavity. The lens array is disposed on the pixel array. Each lens of the lens array is aligned to the aperture of a respective cavity to focus the light into the cavity through the aperture.

Abstract: A substrate stage includes: a base portion having a mounting surface; an annular support configured to support a substrate; an annular partition wall configured to divide the mounting surface into an outer region and an inner region in a radial direction of the substrate; a plurality of protrusions provided on the mounting surface and configured to support the substrate with a gap left between an upper end surface of the partition wall and the substrate; an outer flow path in communication with the outer region, and configured to allow a heat transfer gas supplied to a space between the substrate and the mounting surface to flow therethrough; an inner flow path in communication with the inner region, and configured to allow the heat transfer gas to flow therethrough; and an annular diffusion portion configured to diffuse the heat transfer gas along a circumferential direction of the partition wall.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: The present invention relates to an electrode assembly comprising nano-scale-LED elements and a method for manufacturing the same and, more specifically, to an electrode assembly comprising nano-scale-LED elements and a method for manufacturing the same, in which the number of nano-scale-LED elements included in a unit area of the electrode assembly is increased, the light extraction efficiency of individual nano-scale-LED elements is increased so as to maximize light intensity per unit area, and at the same time, nano-scale-LED elements on a nanoscale are connected to an electrode without a fault such as an electrical short circuit.

Abstract: Discussed is a substrate chuck including: a substrate support part for supporting a substrate having an assembly electrode; a vertical moving part which moves the substrate so that one surface of the substrate comes in contact with a fluid in a state in which the substrate is supported by the substrate support; an electrode connection part for applying power to the assembly electrode to generate an electric field so that semiconductor light-emitting diodes are placed at the predetermined positions of the substrate in a process of moving the semiconductor light-emitting diodes by a position change of at least one magnet; and a rotating part for rotating the substrate support part around a rotating shaft so that the substrate is placed in an upward or downward direction, wherein the rotating shaft is spaced apart from a center of the substrate support part at a predetermined distance.

Abstract: Various embodiments of the present disclosure provide a method for forming a recessed gate electrode that has high thickness uniformity. A gate dielectric layer is deposited lining a recess, and a multilayer film is deposited lining the recess over the gate dielectric layer. The multilayer film comprises a gate electrode layer, a first sacrificial layer over the gate dielectric layer, and a second sacrificial layer over the first sacrificial dielectric layer. A planarization is performed into the second sacrificial layer and stops on the first sacrificial layer. A first etch is performed into the first and second sacrificial layers to remove the first sacrificial layer at sides of the recess. A second etch is performed into the gate electrode layer using the first sacrificial layer as a mask to form the recessed gate electrode. A third etch is performed to remove the first sacrificial layer after the second etch.

Abstract: A piezoelectric micromachined ultrasonic transducer (PMUT) device includes a substrate having an opening therethrough and a membrane attached to the substrate over the opening. An actuating structure layer on a surface of the membrane includes a piezoelectric layer sandwiched between the membrane and an upper electrode layer. The actuating structure layer is patterned to selectively remove portions of the actuating structure from portions of the membrane to form a central portion proximate a center of the open cavity and three or more rib portions projecting radially outward from the central portion.

Abstract: A transfer device, configured to hold a substrate to be thinned and configured to be moved along a transfer path through which the substrate is transferred, includes a grip member configured to hold a frame to which the substrate is mounted with a tape therebetween; a guide member configured to be moved along the transfer path together with the grip member and configured to place thereon the frame held by the grip member; and a moving mechanism configured to move the grip member with respect to the guide member to move the frame held by the grip member along the guide member.

Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.

Abstract: A Pb-free Sn-halide Perovskite solar cell with improved photoelectric conversion efficiency is provided. A solar cell uses a perovskite compound represented by ABX3 where A is a cation, B is a metal, and X is a halogen, wherein each of A, B and X may be composed of a plurality of elements, and B includes Sn and Ge.

Abstract: Provided is an elliptically polarizing plate and an organic light-emitting device. The elliptically polarizing plate of the present application can provide an elliptically polarizing plate with superior visibility having excellent reflection characteristics and color characteristics on the side as well as the front, and an organic light-emitting device comprising the same.

Abstract: A method of generating a piezoelectric actuator includes: forming a piezoelectric member upon a rigid substrate; and removing one or more portions of the rigid substrate to form one or more gaps in the rigid substrate, thus defining at least one deformable portion of the piezoelectric member and at least one rigid portion of the piezoelectric member.

Abstract: According to one embodiment, there is provided a substrate bonding apparatus including a first chucking stage, a second chucking stage, and an alignment unit. The first chucking stage is configured to chuck a first substrate. The second chucking stage is disposed facing the first chucking stage. The second chucking stage is configured to chuck a second substrate. The alignment unit is configured to be inserted between the first chucking stage and the second chucking stage. The alignment unit includes a base body, a first detection element, and a second detection element. The base body includes a first main face and a second main face opposite to the first main face. The first detection element is disposed on the first main face. The second detection element is disposed on the second main face.

Abstract: A die bond head apparatus has a die bond head body coupled to a die bond head motion table, a die holder motion table mounted on the die bond head body and a die holder which is operative in use to secure a semiconductor die to a substrate. The die holder is positionable by the die holder motion table independently of the die bond head motion table.

Abstract: According to an embodiment, a non-volatile memory device includes a first conductive layer, electrodes, an interconnection layer and at least one semiconductor layer. The electrodes are arranged between the first conductive layer and the interconnection layer in a first direction perpendicular to the first conductive layer. The interconnection layer includes a first interconnection and a second interconnection. The semiconductor layer extends through the electrodes in the first direction, and is electrically connected to the first conductive layer and the first interconnection. The device further includes a memory film between each of the electrodes and the semiconductor layer, and a conductive body extending in the first direction. The conductive body electrically connects the first conductive layer and the second interconnection, and includes a first portion and a second portion connected to the second interconnection. The second portion has a width wider than the first portion.