Abstract: Various embodiments comprise systems, methods, architectures, mechanisms, apparatus, and improvements thereof for in-memory computing using charge-domain circuit operation to provide energy efficient, high speed, capacitor-based in-memory computing. Various embodiments contemplate controlling input signal presentation within in-memory computing structures/macros in accordance with predefined or dynamic switch selection criteria to reduce energy consumption associated with charging and/or discharging summing capacitors during reset and evaluation operating modes of multiplying bit-cells (M-BCs).

Abstract: The present invention provides a control module and a control method thereof for an SDRAM. The control module includes at least one register and a controller. The controller is configured to: control the SDRAM to switch from a bus data access mode to a dynamic pin (DPIN) operating mode; setting value of the at least one register under the DPIN operating mode; and control the SDRAM according to the value of the at least one register.

Abstract: A method and apparatus for operating a solid state drive is disclosed comprising receiving at least two commands from a host requiring an action by the solid state drive in a preliminary order, ordering the at least two commands based upon a quality of service classification for the at least two commands to a final order and executing the at least two commands on the solid state drive in the final order, wherein an operational parameter of the solid state drive is modified by at least one of the at least two commands.

Abstract: Snapshots are processed without holding all write operations while the snapshots are being activated. Rather than holding all write operations until snapshots are activated, write operations may be allowed to proceed. Snapshot write processing may be temporarily suspended while the snapshots are being activated, including snapshot metadata being updated, while write operations received while the snapshots are being activated are logged. After snapshots have been activated for all logical LSUs for which snapshots were instructed to be activated, the logging of write operations may be stopped, and the logged write entries processed to determine whether any of the logged write operations require updating snapshot information of any logical storage elements (LSEs) of the LSUs. While the logged write operations are being processed, any write operations received from a host for an LSE having a logged write operation may be held until the held operation, or all held operations are processed.

Abstract: According to one embodiment, a controller of a memory system executes communication with a host in conformity with a standard of NVM express. When fetching a command from a first submission queue, the controlled of the memory system determine the number of commands to be fetched with the number of free slots among a plurality of slots included in a first completion queue as an upper limit. The controller fetches the determined number of commands from the first submission queue.

Abstract: In a computer system, in a case where a throughput upper limit value is set as upper limit value 1, a throughput limit notification program executed by a storage device gives a notification to a storage management device when a throughput of a logical volume reaches the upper limit value 1. In response to this notification, a throughput upper limit value setting program executed by the storage management device outputs, to the storage device, a command for switching the throughput upper limit value from the upper limit value 1 to upper limit value 2, such that the throughput upper limit value is switched.

Abstract: An in-memory computing device includes in some examples a two-dimensional array of memory cells arranged in rows and columns, each memory cell made of a nine-transistor current-based SRAM. Each memory cell includes a six-transistor SRAM cell and a current source coupled by a switching transistor, which is controlled by input signals on an input line, to an output line associates with the column of memory cells the memory cell is in. The current source includes a switching transistor controlled by the state of the six-transistor SRAM cell, and a current regulating transistor adapted to generate a current at a level determined by a control signal applied at the gate. The control signal can be set such that the total current in each output line is increased by a factor of 2 in each successive column of the memory cells.

Abstract: A method of writing data in a storage device is provided. The method includes: receiving an identifier information request; outputting information indicating a plurality of identifiers based on the identifier information request; receiving a first write command and first data, the first write command comprising a first identifier among the plurality of identifiers; performing a data write operation on the first data based on the first write command; receiving a first attribute assignment command comprising the first identifier and a first attribute among a plurality of attributes; and assigning the first attribute to the first data that is already stored in the storage device based on the first attribute assignment command.

Abstract: The present invention provides a microcontroller, wherein the microcontroller includes a processor, a first memory and a cache controller. The first memory includes at least a working space. The cache controller is coupled to the first memory, and is arranged for managing the working space of the first memory, and dynamically loading at least one object from a second memory to the working space of the first memory in an object-oriented manner.

Abstract: The method includes: an FPGA board feeds back the quantity of controllers and the total quantity of DDR memories after receiving a hardware information acquisition request from a host; after a data space application request is received from the host, on the basis of the data space application request, perform data slice processing on data to be calculated, wherein the data space application request carries the dedicated application space capacity of each DDR and the data to be calculated, and the total quantity of slices of the data to be calculated is the same as the total quantity of DDR memories; and transmit each sliced data to a corresponding DDR space, and according to a data storage position of the sliced data in each DDR, read the data from the DDR memory space in parallel by means of the plurality of controllers and calculate same.

Abstract: The present application discloses a magnetic disk management method, an apparatus and an electronic device by providing an engine layer including a plurality of space files and an encapsulation layer including a file directory tree of a space file structure; where the engine layer responds to a data management operation performed for a target space file of the file directory tree output by the engine layer, and a target magnetic disk space corresponding to the target space files is determined through the address association list of the encapsulation layer, and data management is performed on the data in the target magnetic disk space. Thereby, different data can be isolated by different space files when entering through the engine layer, which ensures that security issues such as leakage of the data in the magnetic disk will not occur.

Abstract: A data storage device may include a storage including a plurality of memory blocks composed of system memory blocks for storing system data and user memory blocks for storing user data; and a controller configured to: control exchange of the system and user data with the storage in response to a request of a host device; and determine whether a start condition for performing a garbage collection operation on the storage is satisfied, based on a number of bad memory blocks in the plurality of memory blocks.

Abstract: Various embodiments comprise systems, methods, architectures, mechanisms or apparatus for providing programmable or pre-programmed in-memory computing operations.

Abstract: Embodiments that process data are described. For instance, a method includes receiving, at a first disk management device in a storage system, an access request for accessing data in a plurality of disks associated with the storage system. The method further includes determining whether a first access engine for accessing the plurality of disks in the first disk management device is available. The method further includes redirecting the access request to a second disk management device in the storage system if it is determined that the first access engine is unavailable, wherein a second access engine in the second disk management device is available to access the plurality of disks. By means of this method, effective data access can be performed when an access engine of a disk management device is unavailable, thus realizing a more stable access capability and improving the user experience.

Abstract: An amount of storage space required to maintain counter information for a storage system is reduced without reducing a temporal granularity or tracking granularity of the counter information. Rather than periodically recording actual (i.e., raw) counter values for counters, difference (i.e., delta) values may be recorded. For a given counter, a difference (delta value) between a value of the counter for a given point in time (PIT) and a value of the counter for a previous PIT may be determined, and this delta value may be stored as opposed to storing the raw counter value. This delta value may be a significantly smaller value than the raw value. To further reduce the amount of storage space required, no value may be stored for a counter for a given PIT if it is determined that there is no difference between a counter value for the given PIT and a previous PIT.

Abstract: The present disclosure includes apparatuses and methods for performing operations by a memory device in a self-refresh state. An example includes an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to direct performance of compute operations on data stored in the array when the array is in a self-refresh state.

Abstract: The present disclosure generally relates to improving data transfer in a data storage device. Not only prior to executing a command received from a host device, but even before scheduling the command, the data storage device parses the command and fetches physical region page (PRP) entries and/or scatter-gather list (SGL) entries. The fetching occurs just after receiving the command. Additionally, the host buffer pointers, which are described in PRP or SGL methods, associated with the entries are also fetched prior to scheduling the command. The fetching is a function of device constraints, queue depth, and/or tenant ID in a multi-tenant environment. The immediate fetching of at least part of the host buffers improves device performance, particularly in sequential write or read look ahead (RLA) scenarios.

Abstract: A method in one embodiment comprises separating logical block addresses of one or more storage devices of a storage system into a plurality of ranges of logical block addresses using a designated chunk size, the chunk size denoting a particular number of logical block addresses. The method further comprises assigning different ones of the ranges of logical block addresses to different ones of a plurality of cache entities of the storage system, to select paths for delivery of respective input-output operations from a host device to the storage system based at least in part on the assigning, detecting particular ones of the input-output operations that each overlap with two or more adjacent ranges of the plurality of ranges, and responsive to the detected input-output operations exceeding a threshold, modifying the chunk size and repeating at least portions of the separating, assigning, selecting and detecting utilizing the modified chunk size.

Abstract: A distributed storage system including memory hosts and at least one curator in communication with the memory hosts. Each memory host has memory, and the curator manages striping of data across the memory hosts. In response to a memory access request by a client in communication with the memory hosts and the curator, the curator provides the client a file descriptor mapping data stripes and data stripe replications of a file on the memory hosts for remote direct memory access of the file on the memory hosts.

Abstract: A computer-implemented method according to one aspect includes receiving an indication of a track range to be released within a storage volume; identifying a data backup within a backup storage space for the storage volume that corresponds to the track range; and releasing the track range within the storage volume in response to determining that the corresponding data backup has expired within the backup storage space.