Patents Examined by Han Yang
  • Patent number: 11683924
    Abstract: A static random access memory device includes a first gate of a write port circuit disposed in a standard threshold voltage region of a substrate and a second gate of a read port circuit disposed in a low threshold voltage region, abutting the standard threshold voltage region, of the substrate. A distance between a first edge, corresponding to an edge of the first gate, and a boundary, between the standard threshold voltage region and the low threshold voltage region, is different from a distance between the boundary and a second edge, corresponding to an edge of the second gate.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: June 20, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Hung Lo, Feng-Ming Chang, Ying-Hsiu Kuo
  • Patent number: 11676655
    Abstract: To provide a semiconductor device which can be stably operated while achieving a reduction of the power consumption. A semiconductor device includes a CPU, a system controller which designates an operation speed of the CPU, P-type SOTB transistors, and N-type SOTB transistors. The semiconductor device is provided with an SRAM which is connected to the CPU, and a substrate bias circuit which is connected to the system controller and is capable of supplying substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors. Here, when the system controller designates a low speed mode to operate the CPU at a low speed, the substrate bias circuit supplies the substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: June 13, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shiro Kamohara, Yasushi Yamagata, Takumi Hasegawa, Nobuyuki Sugii
  • Patent number: 11670362
    Abstract: Disclosed herein are related to a memory system including unit storage circuits. In one aspect, each of the unit storage circuits abuts an adjacent one of the unit storage circuits. In one aspect, each of the unit storage circuits includes a first group of memory cells, a second group of memory cells, a first sub-word line driver to apply a first control signal to the first group of memory cells through a first sub-word line extending along a direction, and a second sub-word line driver to apply a second control signal to the second group of memory cells through a second sub-word line extending along the direction. In one aspect, the memory system includes a common word line driver abutting one of the unit storage circuits and configured to apply a common control signal to the unit storage circuits through a word line extending along the direction.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Tzu Chen, Ching-Wei Wu, Hau-Tai Shieh, Hung-Jen Liao
  • Patent number: 11664086
    Abstract: Various implementations described herein are directed to a device having memory architecture with an array of memory cells arranged in multiple columns with redundancy including first columns of memory cells disposed in a first region along with second columns of memory cells and redundancy columns of memory cells disposed in a second region that is laterally opposite the first region. The device may have column shifting logic that is configured to receive data from the multiple columns, shift the data from the first columns in the first region to a first set of the redundancy columns in the second region, and shift data from the second columns in the second region to a second set of the redundancy columns in the second region.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: May 30, 2023
    Assignee: Arm Limited
    Inventors: Yew Keong Chong, Andy Wangkun Chen, Bikas Maiti, Vivek Nautiyal
  • Patent number: 11657878
    Abstract: Methods, systems, and devices for initialization techniques for memory devices are described. A memory system may include a memory array on a first die and a controller on a second die, where the second die is coupled with the first die. The controller may perform an initialization procedure based on operating instructions stored within the memory system. For example, the controller may read a first set of operating instructions from read-only memory on the second die. The controller may obtain a second set of operating instructions stored at a memory block of the memory array on the first die, with the memory block indicated by the first set of operating instructions. The controller may complete or at least further the initialization procedure based on the second set of operating instructions.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: May 23, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Antonino Pollio, Giuseppe Vito Portacci, Mauro Luigi Sali, Alessandro Magnavacca
  • Patent number: 11657859
    Abstract: A method of operating a memory device includes receiving a training request for a data channel, detecting at least one mode parameter according to the training request, transmitting the detected mode parameter to an external device, setting at least one of an NRZ mode and a PAM4 mode to a transmission signaling mode based on mode register set setting information from the external device, and performing communications with the external device according to the set transmission signaling mode.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: May 23, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyunyoon Cho, Sukhee Cho, Younghoon Son, Youngdon Choi, Junghwan Choi
  • Patent number: 11657166
    Abstract: Systems and methods for intelligent display of content are disclosed herein. According to one illustrative method, a computing device camera captures an image of a face. The control circuitry determines, based on the captured image, whether at least a portion of the face is directed toward a computing device display. The control circuitry retrieves, from a memory, a rule specifying criteria for determining whether to block or permit presentation of content based on whether one or more faces are directed toward the display. The control circuitry determines, based on the rule and whether at least a portion of the face is directed toward the display, whether to block or permit the presentation of the content, and blocks or permits the presentation of the content via the computing device based on a result of the determining.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: May 23, 2023
    Assignee: ROVI GUIDES, INC.
    Inventors: Jing Sun, Yunbo Tang
  • Patent number: 11646075
    Abstract: A neural network device with synapses having memory cells each having a floating gate and a first gate over first and second portions of a channel region disposed between source and drain regions, and a second gate over the floating gate or the source region. First lines each electrically connect the first gates in one of the memory cell rows, second lines each electrically connect the second gates in one of the memory cell rows, third lines each electrically connect the source regions in one of the memory cell columns, and fourth lines each electrically connect the drain regions in one of the memory cell columns. The synapses receive a first plurality of inputs as electrical voltages on the first or second lines, and provide a first plurality of outputs as electrical currents on the third or fourth lines.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: May 9, 2023
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Steven Lemke, Vipin Tiwari, Nhan Do, Mark Reiten
  • Patent number: 11647026
    Abstract: Aspects of the disclosure relate to account lineage tracking and automatically executing responsive actions upon detecting an account lineage. A computing platform may receive a first account-change message from a source-level interceptor. The first account-change message may include information identifying a source account associated with a first computing device and identifying a first target account. The first target account may be associated with a target application configured to access the target database. The computing platform may receive a second account-change message from a database-level interceptor. The second account-change message may include information identifying the first target account as a database-level source account and identifying a second target account associated with one or more target databases.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: May 9, 2023
    Assignee: Bank of America Corporation
    Inventors: George Albero, Edward Lee Traywick, Scot L. Daniels
  • Patent number: 11646895
    Abstract: Systems and methods are provided for provisioning identity credentials based on interactions with verifying or trusted users. One exemplary computer-implemented method includes receiving a request for a digital identity from a user, where the request includes identifying information for the user and a verified user identifier, and transmitting, to a verified user associated with the verified user identifier, an attestation request for the user. The method also includes receiving, from the verified user, an attestation in response to the attestation request with regard to at least some of the identifying information for the user, generating a digital identity for the user based on a number of attestations of the identifying information for the user, and sharing a digital identity notice with the user including an identifier for the user, whereby the user is permitted to share the digital identity with a relying party via the identifier.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: May 9, 2023
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Prashant Sharma, Bryn Anthony Robinson-Morgan
  • Patent number: 11641276
    Abstract: The present disclosure generally relates to effective key management by properly matching keys used for encryption to data that needs to be decrypted after receiving instructions to change or delete keys. By matching the actual key, rather than just a key index, to a command, each command will use the correct key throughout the entire life-span of the command, even if the key is switched or deleted prior to servicing the command. To implement the key management, a snapshot of the doorbell database is taken. All pending commands that are in the snapshot are then fetched prior to updating a key database with either the change or deletion of the key. After fetching of all pending commands from the snapshot and ensuring the keys are stored in a command context, the key database is updated.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: May 2, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Shay Benisty, Amir Segev
  • Patent number: 11640475
    Abstract: In various embodiments, once the client registers onto the system, a third party (a “requestor”) may transmit a request to the client for the client to provide the requestor with access to the client data. In at least one embodiment, a requestor may be an entity or person that desires to utilize client data for the requestor's business purposes. In one embodiment, upon registration with the application, the system generates and assigns the requestor a requestor key. In one or more embodiments, the system transmits the requestor key along with each requestor request. In some embodiments, the client may accept or reject the requestor's request. In many embodiments, if the client accepts the requestor's request, the system grants the requestor access to the client data.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: May 2, 2023
    Assignee: GoBeep, Inc.
    Inventors: Paul Della Maggiora, David Olds
  • Patent number: 11636914
    Abstract: According to one embodiment, a memory system includes: a controller configured to execute an error correction process on first data read from a first area at a first address of a memory device and determine a read level used for reading data at the first address according to a result of the correction process. The controller executes the correction process on first frame data of the first data. When the correction process on the first frame data has failed, the controller executes the correction process on second frame data of the first data. When the correction process on the second frame data has succeeded, the controller determines the read level based on a result of comparison between the second frame data and a result of the correction process on the second frame data.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: April 25, 2023
    Assignee: Kioxia Corporation
    Inventors: Marie Takada, Masanobu Shirakawa
  • Patent number: 11636893
    Abstract: An example memory sub-system includes: a plurality bank groups, wherein each bank group comprises a plurality of memory banks; a plurality of row buffers, wherein two or more row buffers of the plurality of row buffers are associated with each bank group; and a processing logic communicatively coupled to the plurality of bank groups and the plurality of row buffers, the processing logic to perform operations comprising: receiving, from a host, a command identifying a row buffer of the plurality of row buffers; and perform an operation with respect to the identified row buffer.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: April 25, 2023
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sean S. Eilert, Ameen D. Akel, Shivam Swami
  • Patent number: 11631471
    Abstract: The present disclosure relates to a method for generating a pattern of a memory, a computer-readable storage medium and a computer device, the method for generating a pattern of a memory includes: presetting mapping relationships between a physical address and a row, a column and a bank, and determining bits of the physical address corresponding to the row, the column and the bank; taking a preset number of values as setting data, the preset number being the same as a number of signal address lines in the memory; obtaining a command truth value table, which is used to define relationships between bits of the physical address and commands; determining values of the row, the column and the bank based on the command truth value table and the setting data; generating the pattern based on the values of the row, the column and the bank and the mapping relationships.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: April 18, 2023
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Guangteng Long, Lixia Zhang, Yinhuan Chu
  • Patent number: 11630907
    Abstract: The techniques utilize an authentication process to authenticate the user to view protected data and an image monitoring process to monitor the field of view of the image detection component. When a user requests access to the protected data, the authentication process is activated. After a user is authenticated, the data may be displayed and an image monitoring process is activated and may use the image detection component to monitor the field of view to determine whether the user is actively viewing the data or that an additional person is in the field of view. When either event is detected, the protected data is concealed at the display of the user device.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: April 18, 2023
    Assignee: Salesforce, Inc.
    Inventor: João Henrique Pimentel Wanderley Neves
  • Patent number: 11630683
    Abstract: A system includes an application trusted execution environment (“TEE”) instance and an escrow TEE instance. The escrow TEE instance is hosted along with the application TEE instance and is outside the control of a TEE instance owner. The system also includes a server, which is configured to receive a request to start the application TEE instance. The server is also configured to launch the escrow TEE instance. The escrow TEE instance is validated by the TEE instance owner. Additionally, the escrow TEE instance is configured to obtain a key for the application TEE instance, validate the application TEE instance, and provide the key to the application TEE instance.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: April 18, 2023
    Assignee: Red Hat, Inc.
    Inventor: Michael Tsirkin
  • Patent number: 11630889
    Abstract: Aspects of the disclosure relate to physiological sensor-based monitoring and control systems. A computing device may determine a physiological measurement. Then, the computing device may compare the physiological measurement with one or more baseline values to determine whether the physiological measurement is anomalous with respect to the one or more baseline values. When the physiological measurement is determined to be anomalous with respect to the one or more baseline values, the computing device may execute access control on a device to prevent access by a user to one or more systems, applications, resources, or the like.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: April 18, 2023
    Assignee: Bank of America Corporation
    Inventors: Elizabeth R. Liuzzo, George Albero, Edward Lee Traywick, Elijah Clark
  • Patent number: 11632380
    Abstract: Embodiments are disclosed for a method for identifying large database transactions. The method includes generating a token marker sequence of a database transaction. The token marker sequence includes multiple token markers. The token markers include a token of the database transaction and a position corresponding to the token. The method further includes sorting the token markers based on a probability that the token occurs in a stream of database transactions. Additionally, the method includes reducing a size of the token marker sequence based on a predetermined threshold.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: April 18, 2023
    Assignee: International Business Machines Corporation
    Inventors: Leonid Rodniansky, Peter Maniatis, Tania Butovsky, Dmitri Dodor
  • Patent number: 11630908
    Abstract: Secure access to data within a communications platform is provided on a need-to-know basis. Inputs provided at the communication platform are intercepted and cognitively analyzed to determine context of the interaction and related data requirements. In response, data access rules are generated and/or retrieved and applied at an access gateway. As data requests as received from the called party from within the communications platform, the data access rules are applied to the request to determine if a match exists and, if so, data access rules-based access is provided to the data. In response to determining the context of the interaction, a context access token is generated and communicated to a virtual database assembler, which assembles a virtual database that only contains data responsive to the context of the interaction.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: April 18, 2023
    Assignee: BANK OF AMERICA CORPORATION
    Inventor: Vijay Kumar Yarabolu