Patents Examined by Henry Choe
  • Patent number: 11664771
    Abstract: A power amplifier includes a first transistor with a gate to which input power is applied and a drain from which output power is provided, a bias circuit configured to apply a bias to the gate of the first transistor, and a coupler configured to distribute the input power to the gate of the first transistor and to the bias circuit. The bias circuit includes a voltage generator circuit including a second transistor with a gate to which the power distributed to the bias circuit by the coupler is applied, the voltage generator circuit being configured to generate a first DC voltage increasing in accordance with an increase in the power distributed to the bias circuit. The bias circuit includes a level shifter circuit configured to generate a second DC voltage increasing in accordance with an increase in the first DC voltage.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: May 30, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masahiro Tanomura
  • Patent number: 11658410
    Abstract: An apparatus has a Radio Frequency (RF) signal generator to produce RF signals phase shifted relative to one another in accordance with RF frequency waveform parameters. Amplifier chains process the RF signals to produce channels of amplified RF signals. Each amplifier chain has amplifiers and at least one amplifier has a tunable gate voltage synchronized with the RF signals.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: May 23, 2023
    Assignee: Epirus, Inc.
    Inventors: Yiu Man So, Michael Borisov, Daniel G. Thompson, Alex Scott, Nathan Mintz, Max Mednik, Ryan Ligon, Harry B. Marr
  • Patent number: 11658615
    Abstract: Multi-level envelope trackers with an analog interface are provided herein. In certain embodiments, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system includes a multi-level supply (MLS) DC-to-DC converter that outputs multiple regulated voltages, and an MLS modulator that controls selection of the regulated voltages over time based on an analog envelope signal corresponding to an envelope of the RF signal amplified by the power amplifier.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 23, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Florinel G. Balteanu, Serge Francois Drogi, Shayan Farahvash, David Richard Pehlke
  • Patent number: 11658622
    Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: May 23, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Yusuke Tanaka, Satoshi Arayashiki
  • Patent number: 11652454
    Abstract: There is provided a monolithic microwave integrated circuit, MMIC, front-end module (100) comprising: a gallium nitride structure (110) supported by a silicon substrate (120); a silicon-based transmit/receive switch (130) having a transmit mode and a receive mode; a transmit amplifier (112) configured to amplify an outgoing signal to be transmitted by said MMIC front-end module, wherein said transmit amplifier is electrically connected (132) to said transmit/receive switch, wherein said transmit amplifier comprises a gallium nitride high-electron-mobility transistor, HEMT, (114) formed in said gallium nitride structure; and a receive amplifier (113) configured to amplify an incoming signal received by said MMIC front-end module, wherein said receive amplifier is electrically connected (133) to said transmit/receive switch, wherein said receive amplifier comprises a gallium nitride HEMT (115) formed in said gallium nitride structure.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: May 16, 2023
    Assignee: EPINOVATECH AB
    Inventor: Martin Andreas Olsson
  • Patent number: 11652451
    Abstract: A power amplifier device includes: a first power supply terminal for inputting a first power supply voltage; a first transistor for power amplification that (i) includes a first gate to which a bias voltage is applied, and (ii) is supplied with power from the first power supply terminal; a second power supply terminal for inputting a second power supply voltage lower than the first power supply voltage; a second transistor for monitoring that (i) includes a second gate to which the bias voltage is applied, (ii) is supplied with power from the first power supply terminal or the second power supply terminal, and (iii) imitates an operation of the first transistor; and a bias circuit that is supplied with power from the second power supply terminal and generates and adjusts the bias voltage according to a drain current or a source current of the second transistor.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: May 16, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Takashi Saji, Kaname Motoyoshi, Shingo Matsuda
  • Patent number: 11652458
    Abstract: A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: May 16, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Michele Vaiana, Angelo Recchia
  • Patent number: 11646707
    Abstract: An analog front end circuit with pulse width modulation current compensation comprises sensing a current condition and determining if the current condition is a positive or negative current condition. An appropriate control signal is determined according to the current condition and sent to turn on a positive current electronic switch if the current condition is a negative current condition or sent to turn on a negative current electronic switch if the current condition is a positive current condition. A positive compensation current flows to offset negative parasitic current when the positive current electronic switch is turned on and a negative compensation current flows to offset positive parasitic current when the negative current electronic switch is turned on. A master control unit utilizes pulse width modulation signals of various widths associated with various current conditions to be sent to turn on the positive electronic switch or the negative electronic switch.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: May 9, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventor: Yen-Cheng Cheng
  • Patent number: 11646703
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 9, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11646277
    Abstract: According to certain aspects, a chip includes a pad, a power amplifier, a transformer coupled between an output of the power amplifier and the pad, a transistor coupled between the transformer and a ground, and a first clamp circuit coupled between a gate of the transistor and a drain of the transistor.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: May 9, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Muhammad Hassan, Bhushan Shanti Asuri, Jeremy Darren Dunworth, Ravi Sridhara
  • Patent number: 11646722
    Abstract: In one embodiment, an apparatus includes a clock generator circuit to receive a first clock signal at a first frequency and output a second clock signal at a second frequency less than the first clock frequency. The clock generator circuit may include: a divider circuit to divide the first clock signal to obtain at least a first divided clock signal and a second divided clock signal; and a gating circuit coupled to the divider circuit, the gating circuit to gate the first clock signal with at least one of the first divided clock signal and the second divided clock signal to output the second clock signal.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: May 9, 2023
    Assignee: Silicon Laboratories Inc.
    Inventor: Abdulkerim L. Coban
  • Patent number: 11637532
    Abstract: An amplifier circuit includes: a transistor provided between an input terminal and an output terminal and having a gate connected to the input terminal, a source connected to a ground, and a drain connected to the output terminal; an inductor connected between the source and the ground; an inductor connected between the gate and the input terminal, and switches connected to at least one of the inductors and configured to change a mutual inductance of the inductors.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: April 25, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Kawanami, Makoto Tabei
  • Patent number: 11632085
    Abstract: A distortion compensation device includes: a first predistorter configured to compensate for a distortion in an amplifier; and a second predistorter configured to compensate for the distortion in the amplifier, and update distortion compensation characteristics at a higher frequency than that of the first predistorter.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: April 18, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Eiji Mochida
  • Patent number: 11632090
    Abstract: A push-push frequency doubler based on complementary transistors is provided. The first differential amplifier circuit receives a differential input signal having an initial frequency, and amplifies the amplitude of the second harmonic of the differential input signal to obtain a first signal. The second differential amplifier circuit receives the differential input signal with the initial frequency and amplifies the amplitude of the second harmonic of the differential input signal to obtain the second signal. Where, the first signal and the second signal are a set of differential signals with the same amplitude and a phase difference of 180°. The output load circuit extracts the second harmonic signal in the first and second signal respectively to obtain and output a pair of differential output signal with first output frequency whose value is twice of the initial frequency. As a result, the frequency doubler with differential output signal is realized.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: April 18, 2023
    Assignee: THE CHINESE UNIVERSITY OF HONG KONG, SHENZHEN
    Inventors: Liang Wu, Xiaoping Wu, Yihui Wang
  • Patent number: 11626847
    Abstract: Various examples are directed to amplifier circuits and methods for operating amplifier circuits. The amplifier circuit may comprise a first amplifier stage. The first amplifier stage comprises a first amplifier, a first feedback resistance, a second amplifier, a second feedback resistance, and a gain resistance. A first current source may be electrically coupled to provide a first current across the gain resistance in a first direction. A second current source may be electrically coupled to provide a second current across the gain resistance in a second direction opposite to the first direction.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 11, 2023
    Assignee: Analog Devices, Inc.
    Inventors: David James Plourde, Greg L. Disanto
  • Patent number: 11626844
    Abstract: An envelope tracking (ET) radio frequency (RF) front-end circuit is provided. The ET RF front-end circuit includes an ET integrated circuit(s) (ETIC(s)), a local transceiver circuit, a target voltage circuit(s), and a number of power amplifiers. The local transceiver circuit receives an input signal(s) from a coupled baseband transceiver and generates a number of RF signals. The target voltage circuit(s) generates a time-variant ET target voltage(s) based on the input signal(s). The ETIC(s) generates multiple ET voltages based on the time-variant ET target voltage(s). The power amplifiers amplify the RF signals based on the ET voltages. Given that the time-variant ET target voltage(s) is generated inside the self-contained ET RF front-end circuit, it is possible to reduce distortion in the time-variant ET target voltage(s), thus helping to improve operating efficiency of the power amplifiers, especially when the RF signals are modulated with a higher modulation bandwidth (e.g., ?200 MHz).
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: April 11, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Marcus Granger-Jones
  • Patent number: 11621206
    Abstract: A device includes a semiconductor die including a transistor. The transistor includes a plurality of parallel transistor elements. Each transistor element includes a drain region, a source region, and a gate region. The semiconductor die includes a first temperature sensor between a first transistor element in the plurality of transistor elements and a second transistor element in the plurality of transistor elements. The first temperature sensor is configured to generate a first output signal having a magnitude that is proportional to a temperature of the first temperature sensor.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: April 4, 2023
    Assignee: NXP USA, Inc.
    Inventors: Lionel Mongin, David Paul Lester, Philippe Renaud
  • Patent number: 11621682
    Abstract: Apparatus and methods for true power detection are provided herein. In certain embodiments, a power amplifier system includes an antenna, a directional coupler, and a power amplifier electrically connected to the antenna by way of a through line of the directional coupler. The power amplifier system further includes a first switch, a second switch, and a combiner that combines a first coupled signal received from a first end of the directional coupler's coupled line through the first switch and a second coupled signal received from a second end of the directional coupler's coupled line through the second switch.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: April 4, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Foad Arfaei Malekzadeh, Abdulhadi Ebrahim Abdulhadi, Sanjeev Jain
  • Patent number: 11616481
    Abstract: Systems and apparatuses are disclosed that include an RF generator configured to generate RF signals having a wavelength. Amplifiers are configured to receive and amplify the RF signals from the RF generator and are separated from each other by a separation distance in a range between about 0.2 times the wavelength and about 10.0 times the wavelength. A power management system is configured to control one or more of the amplifiers based on information received that is associated with the RF signals.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: March 28, 2023
    Assignee: Epirus, Inc.
    Inventors: Denpol Kultran, Yiu Man So, Albert Montemuro, Jacob Zinn Echoff, Michelle Marasigan, Michael John Hiatt, Jason Reis Chaves, Michael Alex Borisov, Jar Jueh Lee, Harry Bourne Marr, Jr., Scott William Buetow
  • Patent number: 11611319
    Abstract: A front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: March 21, 2023
    Assignee: pSemi Corporation
    Inventors: Emre Ayranci, Miles Sanner