Abstract: A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. The methods may include thermally reacting the silicon-containing precursor, the oxygen-containing precursor, and the carbon-containing precursor at a temperature below about 650° C. The methods may include forming a silicon-and-oxygen-and-carbon-containing layer on the substrate.

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Abstract: A method of detecting a Facet region includes: a fluorescence luminance detecting step of detecting fluorescence luminance unique to SiC by irradiating a SiC ingot with exciting light having a predetermined wavelength from a top surface of the SiC ingot; and a coordinate setting step of setting a region in which the fluorescence luminance is equal to or higher than a predetermined value in the fluorescence luminance detecting step as a non-Facet region, setting a region in which the fluorescence luminance is lower than the predetermined value in the fluorescence luminance detecting step as a Facet region, and setting coordinates of a boundary between the Facet region and the non-Facet region.

Abstract: A semiconductor device including a substrate, a gate structure, a source/drain region, an epitaxial layer, and a spacer wall is provided. The substrate has an upper surface. The gate structure is arranged on the upper surface. The source/drain region is arranged on two sides of the gate structure, is partially embedded in the substrate, and has a tip located in the substrate. A material of the source/drain region includes silicon germanium. The epitaxial layer is arranged between the gate structure and the source/drain region. The spacer wall is arranged on the epitaxial layer on the two sides of the gate structure. A manufacturing method of a semiconductor device is also provided.

Abstract: A method and a device for prefixing substrates, whereby at least one substrate surface of the substrates is amorphized in at least one surface area, characterized in that the substrates are aligned and then make contact and are prefixed on the amorphized surface areas.

Abstract: A heterojunction semiconductor device comprises a substrate; a second barrier layer is disposed on the second channel layer and a second channel is formed; a trench gate structure is disposed in the second barrier layer; the trench gate structure is embedded into the second barrier layer and is composed of a gate medium and a gate metal located in the gate medium; an isolation layer is disposed in the second channel layer and separates the second channel layer into an upper layer and a lower layer; a first barrier layer is disposed between the lower layer of the second channel layer and the first channel layer and a first channel is formed; a bottom of the metal drain is flush with a bottom of the first barrier layer; and a first metal source is disposed between the second metal source and the first channel layer.

Abstract: An example method includes patterning a working surface of a semiconductor wafer. The example method includes performing a first deposition of a dielectric material in high aspect ratio trenches. The example method further includes performing a high pressure, high temperature vapor etch to recess the dielectric material in the trenches and performing a second deposition of the dielectric material to continue filling the trenches.

Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.

Abstract: A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.

Abstract: Described herein is a technique capable of suppressing deposits. According to one aspect of the technique, there is provided a method including: (a) supplying a source gas into a process chamber through a source gas nozzle while heating the process chamber; and (b) supplying a reactive gas into the process chamber, wherein (a) and (b) are alternately performed one by one to form a film on the plurality of the substrates while satisfying conditions including: (i) a supply time of the source gas in (a) in each cycle is 20 seconds or less; (ii) a pressure of the source gas in the source gas nozzle in (a) is 50 Pa or less; (iii) an inner temperature of the process chamber in (a) is 500° C. or less; and (iv) number of cycles performed continuously to form the film on the plurality of the substrates is 100 cycles or less.

Abstract: A Semiconductor device includes a substrate and a thermal conductive film. The substrate has a top surface and a back surface which oppose with each other. A first opening is formed on the back surface of substrate. The thermal conductive film includes a first thermal conductive portion formed in the first opening. The first thermal conductive portion is embedded in the first opening such that a void is formed in the first opening.

Abstract: A method of making a semiconductor device includes depositing an amorphous layer on a substrate, masking a portion of the amorphous layer, removing a portion of the amorphous layer to form a first channel into the amorphous layer, depositing a semiconductor layer onto the substrate layer, and removing at least a portion of a defect region of the semiconductor layer to form a second channel.

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include a base and a fin extending away from the base and including a quantum well layer. The device may further include a first gate disposed on a first side of the fin and a second gate disposed on a second side of the fin, different from the first side. Providing gates on different sides of a fin advantageously allows increasing the number of quantum dots which may be independently formed and manipulated in the fin. The quantum dots formed in such a device may be constrained in the x-direction by the one or more gates, in the y-direction by the fin, and in the z-direction by the quantum well layer, as discussed in detail herein. Methods for fabricating such devices are also disclosed.

Abstract: A die shift correction method for use by a maskless exposure machine is applied to a die bonded to a substrate. The substrate has plural contact holes. The die has plural contact points each intended to be subjected to a light exposure in order to form a conductive contact portion connected to the corresponding contact hole. The correction method includes: obtaining the state information of the die by a first pre-scanning means, wherein the state information includes shape and location information; comparing the state information of the die against a reference state, and calculating compensation values with which to correct the reference state and thereby bring the reference state into conformity to the state information of the die; and calculating a compensation section for the light exposure according to the compensation values in order for each conductive contact portion to have an exposure pattern formed at the corresponding contact hole.

Abstract: A method of manufacturing a semiconductor device includes placing a substrate in a housing, supplying first gas containing molybdenum to the housing to form a film that contains molybdenum, on the substrate, removing the substrate with the formed film from the hosing, and then supplying second gas containing chlorine to the housing to remove molybdenum deposited on a surface of the housing.

Abstract: A light emitting element includes a structure in which an anode 51, an organic layer 70 containing an organic material and including a light emitting layer, and a cathode 52 are stacked. The light emitting layer includes, from a side of the anode to a side of the cathode, two or more light emitting regions configured to emit different colors of light. Each light emitting region contains a host material and a dopant material. An absolute value of an ionization potential of the host material contained in a light emitting region near to the cathode is larger than an absolute value of an ionization potential of the host material contained in a light emitting region near to the anode.

Abstract: Provided is a method of manufacturing a magnetic tunnel junction that simultaneously realizes removal of oxides on side walls of a magnetic layer and formation of a protective film and prevents deterioration of magnetic characteristics. The method includes: a first step 802 of etching a stacked film including a first magnetic layer, a MgO barrier layer, and a second magnetic layer stacked in order by plasma etching using an oxidizing gas to form the magnetic tunnel junction; and a second step 803 of simultaneously introducing an organic acid gas which is an n-valent acid and a precursor gas having a corresponding metal element valence of m, to form a first protective film on side walls of the magnetic tunnel junction. In the second step, the precursor gas is introduced at a molar ratio of n/m or more with respect to 1 mole of the organic acid gas introduced.

Abstract: Disclosed herein are optical elements and methods for making the same. Such optical elements may comprise a first layer disposed on a substrate, a second layer disposed on the first layer, a terminal layer disposed on the second layer, and a cap layer disposed on the terminal layer. The cap layer may comprise boron, boron nitride, or boron carbide. Such optical elements may be made using a method comprising depositing a first layer using vapor deposition such that the first layer is disposed on a substrate, depositing a second layer using vapor deposition such that the second layer is disposed on the first layer, depositing a terminal layer using vapor deposition such that the terminal layer is disposed on the second layer, and depositing a cap layer comprising boron, boron nitride, or boron carbide using vapor deposition such that the cap layer is disposed on the terminal layer.

Abstract: There is provided an organic light emitting diode display device. The organic light emitting diode display device includes a substrate divided into an emission area and a non-emission area, an overcoating layer disposed on the substrate and including a plurality of micro lenses, a plurality of first electrode patterns disposed on the overcoating layer and spaced away from each other in the emission area, an organic emission layer disposed on the plurality of first electrodes, and a second electrode disposed on the organic emission layer.