Abstract: A method (140) for tuning millimeter-wave FET amplifiers (20) during manufacture, through the application (144) of a gate bias voltage (52) so as to tune the FET (22) of the amplifier (20) to match an input circuit (24), and through the application (146) of a drain bias voltage (74) so as to tune the FET (22) of the amplifier (20) to match an output circuit (26), then measuring (150) the frequency response of the amplifier (20). This tuning method (140) is repeated (152) until a predetermined frequency response has been achieved. Once achieved, the predetermined frequency response is realized (154) by permanently fixing the gate bias voltage (52) and the drain bias voltage (74) at the determined values. This iterative method (140) of tuning amplifiers (20) is then repeated for all amplifiers (20) to be tuned.

Abstract: A high-frequency power amplifier circuit offers the advantages of high input impedance, high power efficiency and accurate bias current control in a compact and economical circuit configuration. The amplifier includes a single-ended output stage driven by a symmetrical push-pull emitter follower stage with both active pull-down and active pull-up capability. The emitter follower stage is driven by an active phase-splitter stage, with bias current for the phase-splitter stage and subsequent stages being provided by a bias-current control stage which is isolated at high frequencies from the high-frequency input signal to the amplifier.

Abstract: The present invention provides a BTL amplifier device with low power consumption and high efficiency which comprises two units of amplifier, a transistor, and a load resistor, and is driven as claimed in output from an operational amplifier as well as from an inverting amplifier. Signals at both edges of the load resistor are supplied to a differential NFB circuit and a fed-back output is inputted to one of the operational amplifiers, while an output signal from the operational amplifier is converted by an absolute value circuit, and then a DC voltage is superimposed on the absolute value signal in a voltage shifting circuit.

Abstract: An amplifier circuit having four variable impedance nodes is provided. The amplifier has split transconductance current paths. Each half of the amplifier has two such current paths and each current path has a node which may be either a high impedance or low impedance node. Connected between the two nodes is a transistor which is utilized in driving the nodes to their either high or low impedance state. The invention is particularly useful in a folded cascode amplifier used for driving loud speakers. However, the circuitry may also be used in other amplifiers or other applications. Further, the linearity of the amplifier's transfer curve may be improved to provide improved performance for high resistive loads. Thus, a class A-B amplifier is provided which can drive a wide range of resistive loads with varying linearity requirements. Moreover, the amplifier can be programmed to provide a high linearity region depending on the desired application.

Abstract: An improved power amplifier having complimentary power transistors connected in push-pull arrangement, and having a bias voltage source coupled to the transistors for generating a transverse idling current flowing through the complimentary pair of transistors. A regulating, feedback control circuit has a set point input and inputs connected to precision resistors connected to detect the current through the power transistors and the output current. Analog arithmetic computing circuits continuously compute the instantaneous difference between the detected transverse idling current through the power transistors and the set point input for the idling current. The output of the controller circuit is connected to the bias voltage sources to vary the bias voltage in proportion to the instantaneous difference between the detected transverse idling current and the set value of idling current to maintain a constant, transverse idling current.

Abstract: The amplifier (200) includes an input stage (220) coupled to two output transistors (281, 282) having a common terminal at the output terminal (206) of the amplifier. Class AB operation of the output transistors (281, 282) is possible at a comparatively low supply voltage. In order to obtain such operation, measurement transistors (271, 272) are coupled to the same control input (283, 284) as the output transistors (281, 282). These measurement transistors (271, 272) are serially coupled to a current mirror (260). The quiescent current of the output transistors (281, 282) is measured and used to produce a feedback signal which is superimposed to the control signals.

Abstract: A bidirectional amplifier has first and second two-terminal ports each capable of acting as either an input or an output for said amplifier. A field effect type transistor is connected in common gate mode with the common (or grounded) terminal of each of said ports being at least AC connected with the gate of said transistor, and the source and drain of said transistor being respectively connected to a corresponding one of the other terminals of said ports via an impedance matching device.

Abstract: A bypass device in a low noise amplifier unit for amplifying communication signals in the microwave frequency range. The device includes a printed circuit board with transmission lines (1, 2), an amplifier (A), a transmission line bypass segment (3) extending in parallel to the amplifier, and switching means for activating said bypass segment in case the amplifier becomes inoperable. The amplifier is connected between two transmission line stub segments (4, 5).

Abstract: A negative feedback preamplifier having variable conversion gain control and variable open loop gain control capabilities which can work correctly regardless of semiconductor process variations. The negative feedback preamplifier used to convert an input signal current to a signal in the form of voltage includes: a resistor which determines the current-voltage conversion gain when a small signal current is input to the negative feedback preamplifier; a diode which switches the current-voltage conversion gain when a large signal current is input to the negative feedback preamplifier; a resistor which determines the current-voltage conversion gain when the large signal current is input; a grounded source amplifier including a main FET which is biased such that its transconductance decreases when the large signal current is input; and a bias setting portion (diode) which determines the bias condition associated with the main FET.

Abstract: An improved method and apparatus are provided for dc offset trim adjustment of a variable gain amplifier. The VGA has predetermined overall gain endpoints. A minimum gain and a maximum gain are identified for the VGA in a preferred operational range. The identified minimum gain and the identified maximum gain for the VGA in the preferred operational range are spaced apart inwardly from the VGA predetermined overall gain endpoints. The minimum gain for the VGA in operation is set, then trim adjustment of the VGA is provided to minimize an output of the VGA. Then the maximum gain for the VGA in operation is set, then dc offset trim adjustment of the VGA is provided to minimize an output of the VGA.

Abstract: A power amplifier arrangement for amplifying audio signals to be applied to a number of speakers has a plurality of power amplifiers. A level detector detects a level of a peak value of outputs from the power amplifiers, and produces a control signal when the positive peak value exceeds a predetermined positive level. Two power sources are provided for providing a high voltage power and low voltage power to the speakers. A power transistor turns on in response to the presence of the control signal to provide the high voltage power to the speaker, but turns off in response to the absence of the control signal to provide the low voltage power to the speaker. A temperature detector detects a temperature of the power transistor and produces a disabling signal when the detected temperature is greater than a predetermined temperature to disable the power transistor by switching transistor.

Abstract: An amplifying apparatus for linearly amplifying a desired signal using a pair of coupled non-linear amplifiers is disclosed. The amplifying apparatus comprises a limiter for separating amplitude variations from the desired signal and producing a constant amplitude signal bearing the phase of the desired signal and an amplitude related signal. In addition, a drive signal generater produces two drive signals each dependent on the constant amplitude signal and the amplitude related signal such that each drive signal depends on the phase of the desired signal and such that the sum of the squares of the amplitudes of the drive signals is constant. Finally, a coupler couples the two drive signals to produce two constant amplitude signals for driving the pair of non-linear power amplifiers and for coupling the outputs of the power amplifiers to produce two amplified output signals, one of which is the linearly amplified desired signal and the other of which is a waste energy signal.

Abstract: An apparatus is described for providing power management of a computer. The apparatus includes circuitry configured to assert a power down signal when a low power mode is to be entered and to de-assert the power down signal when the low power mode is to be exited. An audio amplifier has a power input and a mute input, and a switch is connected to the power input and configured to selectively supply power to the power input. A power down circuit is provided responsive to the power down signal and connected to the mute input and the switch such that when the power down signal is asserted, the power down circuit activates the mute input and subsequently closes the switch, and when the power down signal is de-asserted, the power down circuit open the switch and subsequently deactivates the mute input.

Abstract: In a bipolar OTA (operational transconductance amplifier) including a plurality of triple-tail cells, each of the plurality of triple-tail cells comprises a transistor pair of first and second transistors (Q1 and Q2) forming a differential input/output pair and a third transistor (Q3) applied with a control voltage (V.sub.C). The transistor pair and the third transistor are driven by a common tail current. The OTA has transistors (Q7 and Q8) for applying a dc offset voltage to an input signal of the differential input/output pair. The plurality of triple-tail cells have outputs connected in parallel.

Abstract: A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output node connected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage.

Abstract: A high-pass filter includes at least one circuit unit constituted by a first branch and a second branch both connected to an input of the filter on one side and, on the other side, to an adder the output of which is the output of the filter. The first branch includes means for transferring an input signal substantially without modifying its frequency content, and the second branch comprises a low-pass filter. The circuit elements are chosen such that the components of the input signal with frequencies below the cut-off frequency of the low-pass filter are substantially cancelled out at the output of the adder. The filter is suitable for being produced within a particularly small area in an integrated circuit.

Abstract: An amplifier section is supplied with an electric signal outputted from a light-sensitive detector. The amplifier section comprises an amplifying circuit for amplifying the electric signal into an amplified signal having an amplified level. A producing section produces a control signal on the basis of the amplified signal and a reference voltage. A resistor section is connected to the amplifying circuit in parallel. The resistor section has a variable resistance which is varied in accordance with the control signal. A capacitor section has a capacitor and connects the input of the amplifying circuit and the output of the amplifying circuit through the capacitor in response to the control signal.

Abstract: The intermediate frequency (IF) amplifier (10) of the invention comprises a differential stage (40) having transistors (41, 42) serially coupled to inductive loads (31, 32). There is only one point at common sources (node 45) which is sensitive to spikes. A feedback stage (60) extracts a common mode spike component at spike frequency (f.sub.S) from the output and returns a feedback signal to the sensitive point (node 45). Comparing to traditional differential amplifiers, the common mode rejection at resonance frequencies (f.sub.R) can be 30 times higher. This makes the amplifier (10) spike insensitive and suitable for the integration into mixed analog-digital chips, such as DSP chips, where the analog portions operate in the same frequency range as the digital portions.

Abstract: A voltage offset compensation circuit for a high gain amplifier having a fixed input voltage offset, includes sample and hold circuitry for periodically sampling the offset voltage and gain error voltage of the amplifier, and holding the sampled voltage; storage circuitry, operable between sampling periods, to store the sampled and held voltage; and further circuitry, operable during the sampling periods, to continuously maintain the output of the high gain amplifier at a value that is gain error and voltage offset compensated. The voltage offset compensation circuit may be used in sampled-data circuits, or continuous-time amplifier circuits utilizing either single-ended, or differential, inputs and either single-ended, or differential, outputs.

Abstract: A circuit used with a differential amplifier to eliminate the effect of Early Voltage from voltage gain provided by the differential amplifier. With a differential amplifier utilizing PNP transistors which experience the lowest, and most undesirable Early Voltage, the circuitry includes a pair of transistors 400 and 402, each with a base connected to an input of the differential amplifier corresponding to a similar base connection of a respective one of transistors 100 and 102 of the differential amplifier, an emitter connected to a current source, and a collector connected to the collector of a respective one of NPN current sink transistors 306 and 308 connected at outputs of the differential amplifier. The circuitry for elimination of Early Voltage further includes components to assure the collector voltages of transistors 400 and 402 are equal and the collector voltages of transistors 102 and 400 are equal.