Abstract: A semiconductor device for amplifying audio signals of the present invention comprises a preamplifier chip for amplifying small signals representing audio signals; a power amplifier chip which receives and power-amplifies the amplified audio signals from the preamplifier chip and outputs the same ; and a frame where the preamplifier chip and the power amplifier chip are mounted and which includes a heat sink area connected to a terminal for heat radiation, wherein the heat sink area is located adjacent to an area in the frame where the power amplifier chip is mounted, and the preamplifier chip, the power amplifier chip and the frame are packaged together.

Abstract: An RF power amplifier includes an input-side tertiary harmonic wave control circuit and an output-side tertiary harmonic wave control circuit, respectively connected to a gate and a drain of a signal amplification FET. The RF power amplifier also includes a tertiary harmonic wave feedback circuit connected in parallel with the signal amplification FET. The tertiary harmonic wave feedback circuit includes an input-side tertiary harmonic wave bandpass filter, a tertiary harmonic wave amplification FET, a phase shifter and an output-side tertiary harmonic wave bandpass filter. These circuit elements are connected in series. Due to such a configuration, a voltage waveform and a current waveform each having a nearly rectangular shape can be easily generated at an output terminal (a drain) of the signal amplification FET, not only in the region around the efficiency saturation point whore the FET operates in a non-linear mode, but also in other linear-operation regions.

Abstract: The invention presents a differential circuit capable of compensating for an error in differential output caused by voltage drop due to the emitter series resistance of transistors without being affected by the values of differential input currents and the current ratio of the input currents.

Abstract: An amplifier (40) includes a biasing element (59) which establishes a quiescent current in two transistors (62, 72). An input voltage signal is converted to an input current signal by a voltage to current converting element (65). The input current signal differentially modulates the currents in the two transistors (62, 72). The differentially modulated currents generates differentially modulated voltages across two diodes (76, 78). Two buffers (83, 87) generates a differential output voltage signal at two output terminals (77, 79) of the amplifier (40) by shifting the differentially modulated voltages across the two diodes (76, 78). The output signal of the amplifier (40) has a low DC offset. The gain of the amplifier (40) is adjusted by adjusting the quiescent current in the two transistors (62, 72).

Abstract: A power supply of the high frequency series resonant mode family for supplying power to audio amplifiers includes half and full bridge variations and supplies all of the required rail voltages while maintaining fixed frequency resonant operation throughout all combinations of loading of the amplifier outputs without the need for a large explicit resonant inductance. The elimination of switching loss enables the use of power supply switching devices optimized for low conduction loss, further improving performance under high current conditions. The power supply frequency is fixed by an oscillator of sufficient precision to ensure that the beat frequency that will result from heterodyning of the residual switching frequency noise between two identical but separate power supplies will be in the infrasonic range. Protection circuitry is provided to limit peak switch currents during the start up interval.

Abstract: A rail-to-rail input common mode range differential amplifier operates on rail-to-rail voltages down to approximately one volt by utilizing one p-channel transistor to cover a first portion of the common mode range, and a second p-channel transistor to cover a second portion of the common mode range.

Abstract: An insubstantial amount of noise results at the output of a circuit when an output of a primary amplifier is disconnected from and reconnected to the circuit in which is operating. The primary amplifier is placed temporarily in a muting configuration. A secondary amplifier permanently in a muting configuration is connected in parallel with the primary amplifier. The output of the primary amplifier then is disconnected from a circuit node to which it is attached. The primary amplifier may then be taken out of its muting configuration. After, for example, configuring the primary amplifier as a comparator and calibrating its dc-offset voltage, the primary amplifier is placed back into a muting configuration. The secondary amplifier then is disconnected from the primary amplifier. The primary amplifier may subsequently be taken out of muting configuration to resume its normal function in the circuit.

Abstract: An input signal (102) and a dithering signal (106) are coupled to an input of a n by m transform matrix (98). The input signal (102) and the dithering signal (106) are transformed to produce m transformed signals, which are then amplified using a plurality of amplifiers (64). The amplified signals are then input into an m by n inverse transform matrix (100) that performs an inverse transform to produce a low noise output signal. The low noise output signal may be passed through a band pass filter (74) to remove out-of-band noise derived from the dithering signal and provide a filtered output signal (110). The transform matrix (98) and inverse transform matrix (100) may be implemented with Fourier transform matrices or a Butler transform matrices.

Abstract: A linearization scheme for an RF power amplifier combines an adaptive predistortion modulator with a feedforward error correction loop, which cancels noise imparted by predistortion modulation to the amplified signal, and minimizes distortion in the RF amplifier's output to a level that allows the use of a low cost auxiliary RF error amplifier in the feed-forward loop. The predistortion correction mechanism produces a predistortion signal based upon the input signal and is adaptively adjusted by an error signal extracted from the output of the a main RF power amplifier. The input signal is supplied to a work function generator unit and to a subtraction unit, which is also coupled to receive a fractional portion of the amplifier output signal and outputs the RF error component. The RF error component is coupled to a predistortion function generator, which is driven by the work function generator unit.

Abstract: According to the preferred embodiment, a buffer amplifier is provided that provides improved linearity while providing increased control over the gain without unduly limiting the amplifier frequency response. The amplifier preferably includes a series pair of transistors with their gates connected to the amplifier input and their drains connected to the amplifier output. The amplifier further includes a pair of feedback transistors connected in series with the series pair. The gates of the feedback transistors are connected to the amplifier output through a pair of feedback networks. Each network includes at least one impedance element. The impedance elements are preferably selected to maximize the linearity of the amplifier response. Furthermore, the impedance elements can be selected to modify the gain of the amplifier, increasing the amplifier gain if needed.

Abstract: An amplifier including an amplifying transistor flip-mounted on a coplanar waveguide pattern. Elements of stability and/or matching circuits are provided at least in part under the flip-mounted transistor to facilitate compact design and to improve component performance. A serial resistor-shunt inductor pair is provided with the resistor coupled proximate the transistor input and/or output and preferably configured within the CPW center conductor to provided more consistent component values. Embodiments of the present invention include a two-stage amplifier having a transmission segment formed between the two stages which serves to rotate the output impedance of the first stage toward a low noise match with the second stage and to rotate the input impedance of the second stage toward a high gain match with the first stage. The transmission segment may include a capacitive element for providing series capacitance and DC blocking. Adjustable impedance matching means are also taught.

Abstract: There is provided a semiconductor amplifier including a metal-semiconductor field-effect transistor (MESFET) of a source-ground type, having a threshold voltage of a predetermined value within a range of -0.5V to 0V (more preferably, -0.4V to -0.04V), and driving by a single power supply without applying a bias on a gate of the MESFET. According to the above semiconductor amplifier, very high efficiency can be realized while maintaining a sufficiently high output power.

Abstract: A residue amplifier includes input and output differential amplifiers. The output differential amplifier includes temperature-dependent current sources which compensate for temperature dependent gain variations within the input differential amplifier. Amplifier components are chosen to produce an overall gain equal to a ratio of fixed resistors, at a nominal temperature. The compensating current sources maintain this fixed gain value as the amplifier's operating temperature varies.

Abstract: A resistor network bias circuit (24) and method is suitable for use in monolithic circuits. The method involves selecting resistors set a quiescent current for a two-stage power amplifier. The bias circuit (24) offsets the gate voltage for a first transistor (14) and a second N-channel depletion mode MESFET transistor (22) to maintain substantially constant drain current for the power amplifier over a range of threshold voltages. Selectable metal links (33-83) serially connected to resistors (30-80) provide parallel resistor combinations (36-86) for setting the quiescent currents of transistors (14 and 22).

Abstract: The present invention relates to a feed-forward amplifying device suitable for radio communications systems such as digital automobile telephones.

Abstract: A first current mirror circuit 6 inversion amplifies the output voltage of an operational amplifier 10 with high potential power supply potential V.sub.DD to a voltage with a ground potential as a reference, thus driving a p-MOS transistor Q.sub.P3 of a push-pull output stage 19. A second current mirror circuit 7 inversion amplifies the output voltage of the operational amplifier 10 with the ground potential as a reference to a voltage with high potential power supply voltage V.sub.DD as a reference, thus driving the n-MOS transistor Q.sub.N3 in the push-pull output stage 19. Thus push-pull output stage through current when the input voltage is suddenly switched is eliminated and crossover distortion is reduced.

Abstract: An integrator circuit (10) and a method for generating an output signal that is frequency compensated. The integrated circuit (10) includes an input stage (14) coupled to a transconductance amplifier (11) via a capacitor (13) and a compensation diode (12). The compensation diode (12) provides an impedance that negates an output impedance of the transconductance amplifier (11). The output signal of the integrator circuit (10) is determined by the capacitor (13).

Abstract: A gain-controlled amplifier has a transistor amplifier circuit and a transistor output circuit. The transistor amplifier circuit has an emitter coupled transistor pair for performing signal amplifying and another emitter coupled transistor pair which function as a current sink. The collectors of the transistors of both pairs are coupled to each other. The four transistors of the two pairs have substantially the same collector-emitter voltage vs. collector current characteristic. The output circuit is dc-coupled to the transistor amplifier circuit. An input signal to be amplified is fed to the base of a transistor which is connected to the coupled emitters of the amplifying pair of transistors. A current source is connected to the coupled emitters of the current sink pair transistors. The source current is substantially the same as the current flowing in the coupled emitters of the amplifying pair transistors.

Abstract: A method and amplifier circuit (20) for conditioning a signal. The amplifier circuit (20) includes a field effect transistor (22) having a sub-harmonic termination (21) connected to a drain of the field effect transistor (22). In addition, an output impedance termination (24) is connected to the drain of the field effect transistor (22) and an input impedance termination (23) is connected to the gate of the field effect transistor (22). The sub-harmonic termination (21) reduces a non-linear component of an interference signal.

Abstract: At AGC amplifier circuit having a triple-tail cell including first, second and, third transistors whose emitter or sources are coupled together. The first and second transistors form a differential transistor-pair. The first, second and third transistors are driven by a single tail current. Bases or gates of the first and second transistors form input ends of the triple-tail cell to be applied with an input signal to be amplified. Collectors or drains of the first and second transistors form output ends of the triple-tail cell from which an amplified output signal with a variable gain is derived. A collector or drain of the third transistor form an output end of the triple-tail cell from which a rectified output signal is derived. A base or gate of the third transistor forms an input end of the first triple-tail cell to be applied with a gain control signal.