Patents Examined by James B. Mullins
  • Patent number: 5745009
    Abstract: The invention relates to a semiconductor device including an amplifier, and a mobile telecommunication terminal comprising this semiconductor device. The amplifier has a very high frequency a.c. signal and comprises a last stage but one of depletion-layer MESFET transistors (T3) and a last transistor stage (T4) of the same type, coupled by a d.c. isolation capacitor (C4). This capacitor (C4) forms with the intrinsic diode (.increment.4) of the transistor (T4) of the last stage a series-arranged rectifier circuit. The latter imposes a shift of the mean level of the a.c. signal on the terminals of said isolation capacitor once the amplitude of the positive part of this a.c. signal has exceeded the conduction threshold of the intrinsic diode (.increment.4). This shift of the mean level (-1.5 volts) is used as a negative voltage (-VG) for biasing the coupled gates of all the stages of the amplifier circuit.
    Type: Grant
    Filed: July 22, 1996
    Date of Patent: April 28, 1998
    Assignee: U.S. Philips Corporation
    Inventors: Bruno Leroux, Didier Meignant, Eric Puechberty
  • Patent number: 5745007
    Abstract: An amplifier, particularly a CMOS amplifier has a differential input which is fed to six differential pairs. The outputs of the first and third differential pair are combined and fed to inputs of a summing network, while the outputs of the fourth and fifth are combined and fed to inputs of the summing network. The second and sixth differential pairs are arranged to cancel the tail currents of the fifth and third pairs, respectively, when all of the devices are in their active state. Thus, regardless of the common mode input level with respect to the supply rails the output current is provided by four devices giving a constant g.sub.m and slew rate.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: April 28, 1998
    Assignee: U.S. Philips Corporation
    Inventor: William Redman-White
  • Patent number: 5745010
    Abstract: An operational amplifier including reverse amplifiers interconnected in series in an odd number of stages not less than three, an element for feeding back an output from the reverse amplifier in the last stage to an input of the reverse amplifier in a first stage, and a feedback capacitance element provided across the input and output ends of at least one of the reverse amplifiers. The Miller effect makes the feedback current from the capacitance element appear as if it were increased by a factor of the amplification factor of a concerned inverter. Thus, the capacity of the capacitance element preventing the oscillation of the inverters can be reduced. As a result, the operational amplifier becomes highly responsive, and therefore, becomes operable for a high frequency signal.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: April 28, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masayuki Miyamoto, Kunihiko Iizuka
  • Patent number: 5745006
    Abstract: A method of providing compensation for distortion imparted to an input signal, principally by an amplifier (18), compares a delayed version of the input signal (34) to the amplifier's output signal. The result of the comparison is an error signal that is fed back to minimize distortion. This feedback technique is applied to a transmitter (10) in combination with predistortion that is selected to compensate for at least some of the distortion provided by the transmitter's output amplifier (18). The remainder of the compensation is provided by the error signal which can be generated by a relatively low gain analog feedback loop.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: April 28, 1998
    Assignee: Motorola, Inc.
    Inventors: Brian Joseph Budnik, George Francis Opas
  • Patent number: 5742206
    Abstract: A gain control circuit (200) for controlling gain of a circuit (100) operative on the basis of a positive supply voltage, in accordance with strength of current pulled out by the gain control circuit from a control node (12) of the gain-controlled circuit (100), comprises: a depletion-type transistor (21) having one end (drain) connected to the control node of the gain-controlled circuit, the other end (source) connected to a voltage supply terminal (25) to which an external supply voltage is applied, and a gate terminal connected to a control signal terminal (16) to which an external positive voltage control signal is applied; and a resistance element (22) connected in parallel to both ends of the depletion-type transistor (21), for shifting a threshold voltage of the transistor in a positive direction by applying a shift voltage between both the ends of the transistor so that turn-on resistance of the transistor can be controlled on the basis of the positive voltage control signal.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: April 21, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinji Ishida
  • Patent number: 5742201
    Abstract: Linearity of an RF/microwave power amplifier is enhanced by an amplitude and phase distortion correction mechanism based upon signal envelope feedback, that operates directly on the RF signal passing through the power amplifier. A phase-amplitude controller responds to changes in gain and phase through the RF/microwave power amplifier signal path caused by changes in RF input power, DC power supply voltages, time, temperature and other variables, and controls the operation of a gain and phase adjustment circuit, so as to maintain constant gain and transmission phase through the RF/microwave power amplifier.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: April 21, 1998
    Assignee: Spectrian
    Inventors: John A. Eisenberg, Brian L. Baskin, Charles Stuart Robertson, III, Dieter Werner Statezni, Lance Todd Mucenieks, David Lee Brubaker
  • Patent number: 5742205
    Abstract: An amplifier circuit for a cable access television line amplifier has a circuit input and a circuit output and includes a first cascode amplifier having a first input and a first output, and a second cascode amplifier having a second input and a second output where the second cascode amplifier is coupled in a push-pull arrangement with the first cascode amplifier. The amplifier circuit further includes input circuitry for coupling the circuit input to the first and second inputs and output circuitry for coupling the first and second outputs to the circuit output. The first cascode amplifier includes a first field effect transistor coupled to the first input; the second cascode amplifier includes a second field effect transistor coupled to the second input; the first cascode amplifier further includes a third field effect transistor coupled to the first output; and the second cascode amplifier further includes a fourth field effect transistor coupled to the second output.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: April 21, 1998
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Martin A. Cowen, Scott R. Siclari, Leo J. Thompson, Steven Veneman
  • Patent number: 5739722
    Abstract: The op-amp circuit described herein utilizes current summing to substantially eliminate cross-over distortion. Therefore, the op-amp circuit is characterized by linearity over the operable voltage range of the amplifier. Additionally, the op-amp circuit is capable of rail-to-rail input and output voltage swings. Furthermore, the op-amp circuit is capable of operating with a power supply voltage as low as two volts when fabricated in modern CMOS fabrication processes, without requiring special processing steps. An output circuit within the op-amp circuit is configured with pullup and pulldown devices which combine to provide output voltages throughout the operable range of the op-amp. However, when an output voltage equal to the power supply voltage is desired, the pulldown device substantially stops its pulldown current flow. Therefore, the pullup device charges the output conductor of the op-amp circuit fully to the power supply voltage.
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: April 14, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Kuok Y. Ling
  • Patent number: 5736892
    Abstract: A high gain, low voltage differential amplifier exhibiting extremely low common mode sensitivities includes a load element exhibiting a high differential resistance, but a low common mode resistance. The load element contains a positive differential load resistance and a negative differential load resistance, which offsets the positive differential load resistance. The output common mode level of the differential amplifier is one p-channel source to gate voltage drop below the power supply voltage prohibiting the common mode output voltage from drifting far from an active level. The differential amplifier also has application for use in a differential charge pump circuit. The high differential impedance of the differential amplifier allows the attainment of extremely small leakage, while a low common-mode impedance results in simplified biasing.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: April 7, 1998
    Assignee: Rambus, Inc.
    Inventor: Thomas H. Lee
  • Patent number: 5736900
    Abstract: In accordance with the objectives of the present invention, a variety of apparatus and methods for amplifying an electrical signal are disclosed. According to one embodiment of the present invention, a dual-output stage amplifier includes an amplifier stage having an input and an output, a first output stage having an input and an output, a second output stage having an input and an output and an error stage having an input and an output. The first output stage output is coupled with the output of the amplifier stage and responsive to the amplifier stage. If the first output stage output is coupled to an output load, the first output stage is capable of providing an output current to the output load such that a first output voltage related to an input voltage at the input of the amplifier stage is maintained across the output load. In turn, the second output stage input is coupled with the output of the amplifier stage and in parallel with the first output stage.
    Type: Grant
    Filed: June 19, 1996
    Date of Patent: April 7, 1998
    Assignees: Maxim Integrated Products, Gain Technology Corp.
    Inventor: Douglas L. Smith
  • Patent number: 5734300
    Abstract: A preamplifier overload control circuit which enhances the dynamic range of the preamplifier. Separate paths shunt corresponding DC and AC components of the signal from an electro-optical device away from the preamplifier input. The amount of shunting in both paths are controlled by a common control signal, here the average DC value of the signal, such that substantially all of the DC signal is shunted away from the preamplifier input.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: March 31, 1998
    Assignee: Lucent Technologies, Inc.
    Inventor: James Daniel Yoder
  • Patent number: 5734297
    Abstract: A rail-to-rail input stage with constant g.sub.m and constant common-mode output currents is provided. The common-mode output currents are controlled by the use of current switches. When low and high common-mode input voltages are applied to the input stage, the current switches take part of the tail currents of the input stage transistors, divides it into two equal parts, and directs the two equal current signals to the outputs. When intermediate common-mode input voltages are applied, the current switches regulate the tail currents of the input pairs such that the common-mode output current and g.sub.m remains constant. The current switches are responsive to changes in the common-mode input voltages, and thereby maintain the g.sub.m constant.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: March 31, 1998
    Assignee: Philips Electronics North America Corporation
    Inventors: Johan Hendrik Huijsing, Ronald Hogervorst
  • Patent number: 5731740
    Abstract: In an amplifier module circuit, an input transformer (TI) transforms an input signal (ISU) into a transformed input signal (ISB), which is supplied to a pair of amplifiers (AMPA, AMPB). In addition to windings (W1, W2) for input signal transformation, the core (CO) of the transformer (TI) is provided with an auxiliary winding (W3) for biasing the pair of amplifiers (AMPA, AMPB). A DC bias voltage (VB) is supplied to a tap (XT) on the auxiliary winding (W3) whose ends are DC coupled to the input transistors (QA, QB) of the pair of amplifiers (AMPA, AMPB).
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: March 24, 1998
    Assignee: U.S. Philips Corporation
    Inventor: Marcel H. W. van de Westerlo
  • Patent number: 5729177
    Abstract: An amplifier includes two complementary differential input stages and a first current source that is switched as a function of the input voltage of the amplifier in order to render active one or the other of the input stages by establishing the quiescent current of the input stage. A folded cascode stage has two cascode transistors whose currents are determined by a bias voltage of these transistors and reduced by the currents circulating in the output branches of a first of the differential input stages. Circuitry switched at the same time as the first current source for maintaining a constant current in the cascode transistors when one of the differential stages changes between an active state and an inactive state.
    Type: Grant
    Filed: December 18, 1995
    Date of Patent: March 17, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Frederic Goutti
  • Patent number: 5729175
    Abstract: A method of actuating a plurality of power amplifier devices in an Class D audio switching amplifier (100) using non-overlapping edge drive signals for preventing substantially high current spikes during switching transitions. The method includes actuating and deactuating power amplifier devices within a first complementary power switching device (117) and actuating and deactuating a second complementary power switching device (119) using a plurality of drive signals generated by a non-overlapping driver (107). The method provides that the first complementary power switching device (117) and the second complementary power switching device (119) are switched ON and OFF in a predetermined sequence such that more than one power amplifier device within each complementary power switching pair is prevented from being simultaneously activated. This prevents high current spiking and subsequently high current drain during a switching transition for conserving battery life when used with portable equipment.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: March 17, 1998
    Assignee: Motorola Inc.
    Inventor: Enrique Ferrer
  • Patent number: 5729176
    Abstract: A linear differential gain stage (31) has a first input (32), a second input (33), a first output (34), and a second output (35). A differential input voltage is coupled to an input differential transistor pair (39,40). Voltage compensation circuits (53,54) cancel non-linearities due to the input differential transistor pair (39,40). Parasitic capacitance of the input differential transistor pair (39,40) couple current to the first and second inputs (32,33) due to voltage transitions at the first and second outputs (34,35). The current to the first and second inputs (32,33) is canceled by impedance compensation circuits (55,56) that provide an equal magnitude but opposite sign current. The result is an almost infinite input impedance to the linear differential gain stage (31).
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: March 17, 1998
    Assignee: Motorola, Inc.
    Inventors: William Eric Main, Jeffrey C. Durec
  • Patent number: 5729178
    Abstract: An adaptive biasing circuit is combined to a fully differential cascode operational amplifier ("OP AMP") to eliminate the effect of a slew rate, thereby increasing the operation speed of the OP AMP while maintaining a high DC voltage gain. A common mode feedback circuit with a large input common mode voltage range is also connected to the OP AMP, thereby maximizing a linear output voltage swing range. The common mode feedback circuit comprises a nMOS input stage differential amplifier and a pMOS input stage differential amplifier which are connected in parallel, and a push-pull CMOS amplifier for converting current outputs from the nMOS and the pMOS input stage differential amplifiers to an output voltage signal. The adaptive bias circuit comprises an operational transconductance amplifier, two current subtractor circuits and four output transistors.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: March 17, 1998
    Assignee: Postech Foundation
    Inventors: Hong-June Park, Jae-Yoon Sim
  • Patent number: 5726605
    Abstract: An RF power amplifier module utilizing a plurality of silicon carbide transistor power amplifier circuits, each including a transistor assembly having multiple cells, respectively providing power amplification of an input signal. In a preferred embodiment of the invention, four mutually staggered silicon carbide transistor assemblies, each containing multiple transistor cells, are operated in parallel while being arranged in close proximity on a common substrate. Each silicon carbide amplifier circuit assembly is commonly driven by a fifth silicon carbide amplifier circuit. The outputs of the parallely driven silicon carbide transistor power amplifier circuits are combined so as to provide a single composite RF output signal which may be in the order of 1000 watts or more when operated at a frequency of, for example, 600 MHz.
    Type: Grant
    Filed: April 14, 1996
    Date of Patent: March 10, 1998
    Assignee: Northrop Grumman Corporation
    Inventors: Alfred W. Morse, Paul M. Esker, Robin E. Hamilton
  • Patent number: 5726602
    Abstract: A rail-to-rail driver amplifier circuit that utilizes complementary output transistors to fully utilize the available power supply voltage. The circuit includes an input pre-amplifying circuit for receiving the audio signal and for receiving electrical energy from a power supply having a first rail at a positive potential and a second rail at a negative potential to produce a pre-amplified output signal. The circuit further includes a first output driver circuit having a voltage gain limited current amplifier coupled to the first rail and to a first output terminal of the input pre-amplifying circuit and a second output driver circuit having a voltage gain limited current amplifier coupled to the second rail and to a second output terminal of the input pre-amplifying circuit.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: March 10, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: David A. Brown
  • Patent number: 5724006
    Abstract: A circuit arrangement which has a controllable transmission characteristic between a signal input (2) and a signal output (5) for a signal within a given transmission frequency band, the circuit arrangement having a bass control stage (1) to which the signal from the signal input (2) can be applied for adjustably boosting the amplitude-frequency response of the signal at low frequencies of the transmission frequency band. A higher flexibility and an improved transmission characteristic of such a circuit arrangement are obtained with a simplified construction by a notch filter stage (3), to which the signal processed in the bass control stage (1) can be applied for attenuating the amplitude-frequency response of the signal at mid-frequencies of the transmission frequency band independently of the bass control stage (1) and by which the signal thus processed can be applied to the signal output.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: March 3, 1998
    Assignee: U.S. Philips Corporation
    Inventors: Ernst-August Kilian, Christoph Moller