Abstract: A method, apparatus, system, and signal-bearing medium that, in an embodiment, receive a constraint command that specifies a parent table, a primary key in the parent table, a child table, and a foreign key in the child table, and enforce that all values for the primary key in the parent table are present in the foreign key in the child table. In an embodiment, the enforcing may include receiving an insert command, wherein the insert command specifies a target key, a target value for the target key, and a target table; determining whether the target table matches the parent table and whether, within a transaction that includes the insert command, the child table includes at least one row with a foreign key value that equals the target value of the primary key; inserting the target value in the target table if the determining is true; and returning an error otherwise.

Abstract: The present invention relates to improvements in the generation of an authoring file, readable by an authoring program of a DVD-Video or other interaction video media, that defines the playback structure of the content residing in a given disc's “authored content zone” and also defines the location of the assets that make up the disc's “presentation data.” The improvements allow generation of an authoring file that references assets that are within the authored content zone of the medium. This allows the authoring “project” from which the final DVD-Video disc image was created to be reopened in a compatible authoring program—and to be modified by such a program—without reference to any of the original source materials.

Abstract: A memory module includes a memory hub that monitors utilization of the memory module and directs devices of the memory module to a reduced power state when the module is not being used at a desired level. System utilization of the memory module is monitored by tracking system usage, manifested by read and write commands issued to the memory module, or by measuring temperature changes indicating a level of device activity beyond normal refresh activity. Alternatively, measured activity levels can be transmitted over a system bus to a centralized power management controller which, responsive to the activity level packets transmitted by remote memory modules, direct devices of those remote memory modules to a reduced power state. The centralized power management controller could be disposed on a master memory module or in a memory or system controller.

Abstract: A method and system for supporting an XQuery trigger in XML-DBMS based on relational DBMS is provided. In an Ubiquitous environment where XML data are incessantly generated by an enormous number of objects, so as to overcome inconvenience and its resultant reduction of performance in which a user should query after checking a change of XML-DBMS one by one, in XML-DBMS based on relational DBMS, the present invention supports an XQuery trigger technique based on SQL trigger automatically executing insert, update and delete statements, and a storage or external procedure related with the change of data when a change of data is generated at a specific table in a conventional relational DBMS.

Abstract: An apparatus and method is disclosed for providing capacity on demand using control to alter latency and/or bandwidth on a signaling bus in a computer system. If additional capacity is required, authorization is requested for additional capacity. If authorized, bandwidth of the signaling bus is increased to provide additional capacity in the computing system. Alternatively, upon authorization, latency of data transmissions over the signaling bus is reduced. In another alternative, upon authorization, memory timings are adjusted to speed up memory fetches and stores.

Abstract: When a search index is generated, it includes entries tagged with the readability of documents referenced by the search index. A determination of the readability is made if a document is not yet associated with a preexisting entry in the search index and is being added, by analyzing the document to produce a readability indicator. For example, the readability indicator can correspond to a grade level identifier, thereby enabling search index to be searchable by grade level, age, or age range. A grade level-based search request received from a user can be submitted to search this search index for documents limited to a specific grade or age readability. The search results that are returned are thus filtered in regard to the readability indicator associated with the documents in the search index.

Abstract: Systems and methods of reducing bus turnaround time in a multiprocessor architecture are disclosed. An exemplary method may include mastering the system bus within one idle bus clock cycle of a bus handoff. The method may also include bypassing data from recovery latches and instead receiving data from pipeline latches into core logic, the received data mirroring data driven onto the system bus.

Abstract: A boot method an apparatus arc described which reduce the likelihood of a security breach in a mobile device, preferably in a situation where a reset has been initiated. A predetermined security value, or password, is stored, for example in BootROM. A value of a security location within FLASH memory is read and the two values are compared. Polling of the serial port is selectively performed, depending on the result of such comparison. In a presently preferred embodiment, if the value in the security location matches the predetermined security value, then polling of the serial port is not performed. This reduces potential security breaches caused in conventional arrangements where code may be downloaded from the serial port and executed, which allows anyone to access and upload programs and data in the FLASH memory, including confidential and proprietary information.

Abstract: In some embodiments, the invention involves reducing platform power consumption. In an embodiment, the platform may handle a predetermined set of events by the platform firmware when the platform is in sleep, or low power, mode, thereby eliminating the need to wake the processor and utilize the operating system. Other embodiments are described and claimed.

Abstract: A multi-device system having a daisy chain system bus structure and related method of operation are disclosed. A reference signal having a defined oscillation period is communicated around the daisy chain bus structure. Total signal transmission time around the daisy chain bus structure as well as signal transmission time to each one of a plurality of client devices connected to a host device by the daisy chain bus structure may be readily determined.

Abstract: Improved approaches for enabling user accounts to be portable across different multi-user computer systems are disclosed. A user account created at a multi-user computer can be stored to an external, portable data store, thereby rendering the user account portable. The multi-user computer system, e.g., through its operating system, locates user accounts on not only in local storage of the multi-user computer system, but also in any removable data storage attached to the multi-user computer system. Hence, by coupling the external, portable data store to another multi-user computer, a user is able to login to any supporting multi-user computer and be presented with their user configuration and user directory. Since the data store that stores the user account is not only external but also portable, a user can simply tote the data store to the location of different multi-user computers.

Abstract: An improved technique and associated apparatus for timing calibration of a logic device is provided. A calibration test pattern is transferred to a logic device first at a data rate slower than normal operating speed to ensure correct capture of the pattern at the device to be calibrated. Once the pattern is correctly captured and stored, the test pattern is transmitted to the logic device at the normal operating data rate to perform timing calibration. The improved technique and apparatus permits the use of any pattern of bits as a calibration test pattern, programmable by the user or using easily-interchangeable hardware.

Abstract: Broadly speaking, an apparatus and associated method of operation is provided for controlling alignment signal transmission in an electronic communication process. More specifically, a programmable control is provided for controlling transmission of alignment signals in either a Serial Attached SCSI (SAS) or Serial ATA (SATA) communication process. The programmable control includes a counter operated to sequentially modify a count value. When the count value is equal to a programmed alignment trigger value, the programmable control is configured to generate and transmit an alignment signal through the initiator transceiver to the target transceiver. Thus, the apparatus and associated method of operation controls a rate at which alignment signals are transmitted in a SAS/SATA communication process.

Abstract: Transitioning to a suspend to RAM sleeping state while also protecting against power losses while sleeping is provided. System state context data is saved to non-volatile storage and components in the computer system prepare to transition to a suspend to disc sleeping. A transition to the suspend to RAM sleeping state is then effected. Alternatively, after the system context is saved and the components are prepared to transition, the system may wake to a working state. The components may be directed to prepare for transitioning to a suspend to RAM sleeping state, and then the BIOS may be directed to execute the transition. In either embodiment, if power to the system is lost while the system is in the suspend to RAM system state, then the system may resume to a working state by reading the context file stored to non-volatile storage.

Abstract: A method and apparatus that allows for controlling operating time of a portable computer system and a peripheral device. A portable computing system that includes a rechargeable power supply and that includes a connection mechanism for coupling to a peripheral device is used to control operating time of the portable computer system and the peripheral device. In one embodiment, a user can choose between maximizing the operating time of the portable computer, maximizing the operating time of the peripheral device, or maximizing the life of the entire system (maximizing the operating time of the portable computer system and the peripheral device). When operating time of the portable computer system is to be maximized, power is sent from the peripheral device to the portable computer system to extend the operating time of the portable computer system.

Abstract: A memory module includes a memory hub that monitors utilization of the memory module and directs devices of the memory module to a reduced power state when the module is not being used at a desired level. System utilization of the memory module is monitored by tracking system usage, manifested by read and write commands issued to the memory module, or by measuring temperature changes indicating a level of device activity beyond normal refresh activity. Alternatively, measured activity levels can be transmitted over a system bus to a centralized power management controller which, responsive to the activity level packets transmitted by remote memory modules, direct devices of those remote memory modules to a reduced power state. The centralized power management controller could be disposed on a master memory module or in a memory or system controller.

Abstract: A coprocessor executing one among a set of candidate kernel loops within an application operates at the minimal clock frequency satisfying schedule constraints imposed by the compiler and data bandwidth constraints. The optimal clock frequency is statically determined by the compiler and enforced at runtime by software-controlled clock circuitry. Power dissipation savings and optimal resource usage are therefore achieved by the adaptation at runtime of the coprocessor clock rate for each of the various kernel loop implementations.

Abstract: A signal sampler and method for high-speed input sampling of a signal are disclosed. A first sampler samples a data signal at a rising edge of a clock signal and generates a first sampled signal. A second sampler samples the data signal at a falling edge of an inverted clock signal and generates a second sampled signal. The first and second sampled signals may be combined to determine the next signal sampler output. An evaluation may include asserting the output signal if the first and second sampled signals are asserted, negating the output signal if the first and second sampled signal are negated, and toggling the output signal if the first and second sampled signals are in opposite logic states. The signal sampler and method of signal sampling may be incorporated in a semiconductor device, which may be fabricated on a semiconductor wafer and included in an electronic system.

Abstract: The invention provides for the arrangement and management of timing of various domains on a large integrated circuit which introduces a phase offset between clock domains of neighboring cells to create a wavefront clock which propagates through the circuit at the same speed data propagates though the circuit. The cells of the integrated circuit are wavefront clock synchronized in that the phase offset introduced in a particular cell's clock is such that the arrival of a skewed clock and propagation delayed data from that cell's neighbor is synchronized with that particular cell's own clock. Wavefront clock synchronization mitigates at least some of the problems of clock skew and the associated effects of slowing data propagation and reduction of clock frequencies associated with large surface integrated circuits utilizing synchronized clock domains.

Abstract: A portable computer system with a battery and a processor, a memory, a display and storage device; all powered by the battery which includes a power management circuit configured to control the operation of the processor and memory in order to vary an amount of power consumed. The power management circuit is configured to accept a requested operating time and is configured to signal the power management circuit to modify the operation of the processor, memory, storage device and display so that the portable computer system can operate from the battery for said requested operating time.