Abstract: A port controller device includes a pull-up resistor, a switching circuit, an enabling circuitry, and a protection circuitry. The pull-up resistor is configured to be coupled to a port, in which the port is configured to be coupled to a channel configuration pin of an electronic device. The switching circuit is configured to selectively transmit a supply voltage to the port via the pull-up resistor according to a first control signal, and turn off a signal path between the pull-up resistor and the port according to a second control signal. The enabling circuitry is configured to generate the first control signal according to an enable signal and the supply voltage. The protection circuitry is configured to generate the second control signal in response to a voltage from the port when the supply voltage is not powered, in order to limit a current from the port.

Abstract: Examples of the present disclosure are related to systems and methods for lighting fixtures. More particularly, embodiments disclose directly embedded a smart module with a lighting fixture utilizing metal core PCB (MCPCB).

Abstract: Various embodiments provide for data sampling with loop-unrolled decision feedback equalization. In particular, some embodiments provide for an unrolled first-tap Decision Feedback Equalizer (DFE) loop that comprises parallel data samplers that each include a tri-state output.

Abstract: A driving device is provided. The driving device includes a signal processing circuit and a driving circuit. The signal processing circuit is configured to generate a current input signal according to a target current signal. The driving circuit is configured to receive the current input signal and generate a current output signal according to the current input signal to drive a light emitting element. In a first time interval, the current input signal gradually rises from a first current value to a target current value in a continuous or segmented manner according to a rising slope. Further, a control method of the driving device and a lighting system including the driving device are also provided.

Abstract: An SFQ circuit system includes at least one SFQ block having a plurality of SFQ logic gates. Characteristically, at least a portion of the SFQ logic gates are arranged in series. The SFQ circuit system includes a timing system configured to provide a first set of inputs and collect a first set of outputs of the at least one SFQ block at a rate defined by a slow clock frequency while the SFQ logic gates are clocked at a fast clock frequency. Advantageously, the rate is sufficiently slow to allow the first set of inputs to propagate through all levels of the SFQ logic gates to produce the first set of outputs of the at least one SFQ block without colliding with a second set of inputs to the at least one SFQ block.

Abstract: If there is an interruption of power to an electrical load while the electrical load is operating at low end, the electrical load may not turn back on when power is restored. This undesired operation may be avoided by detecting the application of power to the electrical load, and automatically increasing the magnitude of a control signal being applied to the electrical load by a sufficient amount for a short period of time after power has been applied. This way, the electrical load may be turned back on to low end, instead of erroneously operating in an electronic off condition.

Abstract: An active termination circuit comprising an input node connected to a transmission line, a first transistor, and a second transistor. The transmission line supplies a signal to the input node. The first transistor is diode connected between a high voltage supply and the input node. The first transistor terminates the signal when the signal is at a low logic level. The second transistor is diode connected between the input node and a low voltage supply. The second transistor terminates the signal when the signal is at a high logic level.

Abstract: A signal transmission circuit of a semiconductor device includes a first emphasis circuit and a second emphasis circuit. The first emphasis circuit feeds a signal of an output node back to an input node. The first emphasis circuit may perform a first emphasis operation on a signal of the input node and the signal of the output node by adjusting a feedback time of the first emphasis circuit. The second emphasis circuit may be connected in parallel with the first emphasis circuit to perform a feedback of the signal of the output node to the input node. The second emphasis circuit may perform a second emphasis operation on the signal of the input node and the signal of the output node by adjusting a feedback time of the second emphasis circuit.

Abstract: An impedance calibration circuit is provided. The impedance calibration circuit includes a first calibration circuit, a second calibration circuit and a control circuit. The first calibration circuit is adapted to be coupled to an external resistor through a calibration pad, and generate a first voltage according to a first control signal and a resistance value of the external resistor. The second calibration circuit generates a second voltage according to the first control signal and a second control signal. The control circuit is configured to compare the first voltage and a reference voltage to obtain a first comparison result, and compare the first voltage and the second voltage to obtain a second comparison result, and generate the first control signal according to the first comparison result, and generate the second control signal according to the second comparison result.

Abstract: An integrated circuit can include a data processing engine (DPE) array having a plurality of tiles. The plurality of tiles can include a plurality of DPE tiles, wherein each DPE tile includes a stream switch, a core configured to perform operations, and a memory module. The plurality of tiles can include a plurality of memory tiles, wherein each memory tile includes a stream switch, a direct memory access (DMA) engine, and a random-access memory. The DMA engine of each memory tile may be configured to access the random-access memory within the same memory tile and the random-access memory of at least one other memory tile. Selected ones of the plurality of DPE tiles may be configured to access selected ones of the plurality of memory tiles via the stream switches.

Abstract: Systems and devices are provided to perform low-power digital filtering of sensor or other data based on bitwise operations. A reference sinusoid is encoded via a plurality of pulse trains, such that each pulse train includes a number of pulses n representing a value of the reference sinusoid out of a maximum possible pulses corresponding to an encoding quantization level. A circular register stores a representation of the encoded sinusoid. A set of multiple logical gate blocks are configured to multiply, via one or more bitwise operations, each of multiple bits of a received input signal with a pulse train corresponding to a value of the encoded sinusoid. A logic circuit coupled to the circular register and the set of multiple logical gate blocks is configured to generate, based on the encoded sinusoid and on the input signal, an output signal indicating an approximate value of the received input signal multiplied by the encoded sinusoid.

Abstract: A coupling compensation module is provided, for compensating a channel voltage of a channel outputted by a constant current circuit of a light emitting diode (LED) driver. The coupling compensation module includes a detecting circuit, for detecting a voltage variation of the channel voltage, to generate a detection result; and a compensation circuit, for compensating the voltage variation of the channel voltage according to the detection result.

Abstract: A temperature sensor includes a NAND gate and a plurality of delay units. The NAND gate includes a first and a second input terminals, and an output terminal. The first input terminal is configured to receive an external starting control signal. The plurality of delay units are connected in series. An input end of the first delay unit is connected to the output terminal of the NAND gate. An output end of the last delay unit is connected to the second input terminal of the NAND gate, thereby forming a ring oscillator structure. The temperature sensor can realize conversion of temperature-leakage-frequency based on the ring oscillator structure in a temperature range of ?40˜125° C., thereby simplifying design complexity and achieves high accuracy.

Abstract: Various implementations described herein are related to a device with a frontside power network and a backside power network. The frontside power network may include frontside supply rails coupled to logic circuitry, and also, the backside power network may include buried supply rails. Also, at least one buried supply rail of the buried supply rails may be used as a backside signal path for providing at least one critical signal net to the logic circuitry.

Abstract: The present disclosure describes systems, apparatuses, and methods for implementing a logic gate circuit structure for operating one or more Boolean functions. Instead of stacking transistors in series to accommodate an increased number of inputs, a parallel configuration is presented that significantly reduces the cascaded number of transistors and the total number of transistors for the same functionality.

Abstract: A code shift calculation circuit is provided. A first operation circuit of the code shift calculation circuit generates a first output value according to a temperature difference and a first change rate of a driving strength code to temperature. The temperature difference is a difference between a previous temperature when getting a previous ZQ command and a current temperature when getting a current ZQ command. A second operation circuit generates a second output value according to a voltage difference and a second change rate of the driving strength code to voltage. The voltage difference is a difference between a previous working voltage when getting the previous ZQ command and a current working voltage when getting the current ZQ command. A third operation circuit sums up the first output value and the second output value to generate a shift value, thereby adjusting the driving strength code calibrated by ZQ calibration.

Abstract: A resistance of configurable termination circuitry located at an interface between a memory component and a processing device is adjusted. The configurable termination circuitry includes a plurality of transistors, a plurality of switches coupled to the plurality of transistors, and a plurality of resistors coupled to the plurality of switches. The resistance of the configurable termination circuitry is adjusted based on a mode of the configurable termination circuitry.

Abstract: A control circuit and method for a bleeder, a chip, and a driver system. The bleeder control circuit is connected to a dimmer detector used for detecting the presence or absence of a dimmer and a type of the dimmer. The control circuit of the bleeder is used to receive a detection signal outputted by the dimmer detector, and generate a control signal for the bleeder according to the detection signal, the control signal is used to control an operating state of the bleeder. The application correspondingly generates a control signal for a bleeder according to a detection signal indicating the presence or absence of a dimmer and the type of the dimmer so as to control the bleeder to operate only at a given phase interval, and may thereby reduce the power consumption of the bleeder when ensuring the stable operation of a dimmer.

Abstract: A mobile device that is configured for wireless communication may be configured to operate as a remote control device in a lighting control system, controlling one or more lighting control devices of the lighting control system. The remote control device may control the light intensity in a space, for instance at a location of the remote control device, in response to an ambient light intensity measured at the remote control device. The remote control device may define a user interface for receiving an input that indicates a desired light intensity at the location. The remote control device may measure the ambient light intensity at the location via a light detector, compare the measured ambient light intensity to the desired light intensity, and cause the one or more lighting control devices to adjust the ambient light intensity at the remote control device until it agrees with the desired light intensity.

Abstract: A level down shifter circuit includes a latch and an assist circuit. The latch is configured to generate a digital shifted signal and a complementary shifted signal by a voltage downshift of a digital input signal and a complementary input signal. The digital input signal and the complementary input signal are in a first voltage domain. The digital shifted signal and the complementary shifted signal are in a second voltage domain. The second voltage domain has a smaller voltage range than the first voltage domain. The assist circuit is configured to alternately pull the digital shifted signal and the complementary shifted signal to an intermediate voltage in response to the digital input signal and the complementary input signal. The intermediate voltage is in the second voltage domain.