Abstract: An organic photoelectronic device includes a first electrode and a second electrode facing each other and a light-absorption layer between the first electrode and the second electrode and including a photoelectric conversion region including a p-type light-absorbing material and an n-type light-absorbing material and a doped region including an exciton quencher and at least one of the p-type light-absorbing material and the n-type light-absorbing material, wherein at least one of the p-type light-absorbing material and the n-type light-absorbing material selectively absorbs a part of visible light, and an image sensor includes the same.

Abstract: An object of the invention is to improve the reliability of a light-emitting device. Another object of the invention is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. A light-emitting device has, over one flexible substrate, a driving circuit portion including a thin film transistor for a driving circuit and a pixel portion including a thin film transistor for a pixel. The thin film transistor for a driving circuit and the thin film transistor for a pixel are inverted staggered thin film transistors including an oxide semiconductor layer which is in contact with a part of an oxide insulating layer.

Abstract: A display apparatus includes: a display substrate; a display on the display substrate, the display comprising a display device; a sealing substrate on the display substrate; a sealing member bonding the display substrate and the sealing substrate, the sealing member surrounding the display; a first metal line below the sealing member and surrounding the display; a second metal line on the display substrate and spaced apart from the first metal line; and one or more connectors connecting the first metal line and the second metal line with each other.

Abstract: A sputtering target including an oxide that includes an indium element (In), a tin element (Sn), a zinc element (Zn) and an aluminum element (Al), and including a homologous structure compound represented by InAlO3(ZnO)m (m is 0.1 to 10), wherein the atomic ratio of the indium element, the tin element, the zinc element and the aluminum element satisfies specific requirements.

Abstract: Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device.

Abstract: Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device.

Abstract: A method of growing semiconductor layers may include: growing a first semiconductor layer on a surface of a substrate at which a crystal layer is exposed, wherein the first semiconductor layer is different from the crystal layer in at least one of a material and a crystal structure; cutting the first semiconductor layer such that a cut surface of the first semiconductor layer extends from a front surface of the first semiconductor layer to a rear surface of the first semiconductor layer; and growing a second semiconductor layer on the cut surface of the first semiconductor layer, wherein the second semiconductor layer has a material and a crystal structure that are same as those of the first semiconductor layer.

Abstract: Examples of a method for producing a semiconductor device includes: forming a barrier layer having a composition of InAlN or InAlGaN over a channel layer; forming a transition layer having a composition of InGaN on the barrier layer while raising a growth temperature; and forming a cap layer of GaN on the transition layer.

Abstract: A RAMO4 substrate that does not easily crack during or after the formation of group III nitride crystal includes a single crystal represented by general formula RAMO4 (wherein R represents one or more trivalent elements selected from the group consisting of Sc, In, Y, and lanthanoid elements, A represents one or more trivalent elements selected from the group consisting of Fe(III), Ga, and Al, and M represents one or more divalent elements selected from the group consisting of Mg, Mn, Fe(II), Co, Cu, Zn, and Cd). The RAMO4 substrate has a crystal plane with a curvature radius r of 52 m or more, and a square value of correlation coefficient ? of 0.81 or more. The curvature radius r is calculated as an absolute value from X-ray peak position ?i and measurement position Xi after the measurements of X-ray peak positions ?i at a plurality of positions Xi lying on a straight line passing through the center of the RAMO4 substrate.

Abstract: A semiconductor device includes a substrate, a first III-V compound layer, a gate electrode, drain trenches, and at least one drain electrode. The drain trenches are disposed and arranged with high integrity. The substrate has a first side and a second side opposite to the first side. The first III-V compound layer is disposed at the first side of the substrate. The gate electrode is disposed on the first III-V compound layer. Each of the drain trenches extends from the second side of the substrate toward the first side of the substrate and penetrates the substrate. The drain trenches are arranged regularly. The drain electrode is disposed in at least one of the drain trenches.

Abstract: An element substrate serving as a substrate for an electro-optical device includes a base material, a TFT disposed on the base material, the TFT including a semiconductor layer, and a first insulating film including a silicon oxide film disposed between the base material and the semiconductor layer, wherein a content of hydrogen in the silicon oxide film is 1.0×1019 atoms/cm3 or more but less than 1.0×1020 atoms/cm3.

Abstract: Solar cells, absorber structures, back contact structures, and methods of making the same are described. The solar cells and absorber structures include a pseudomorphically strained electron reflector layer.

Abstract: Novel and useful quantum structures that provide various control functions. Particles are brought into close proximity to interact with one another and exchange information. After entanglement, the particles are moved away from each other but they still carry the information contained initially. Measurement and detection are performed on the particles from the entangled ensemble to determine whether the particle is present or not in a given qdot. A quantum interaction gate is a circuit or structure operating on a relatively small number of qubits. Quantum interaction gates implement several quantum functions including a controlled NOT gate, quantum annealing gate, controlled SWAP gate, a controlled Pauli rotation gate, and ancillary gate. These quantum interaction gates can have numerous shapes including double V shape, H shape, X shape, L shape, I shape, etc.

Abstract: A display device includes a first electrode disposed on a substrate; a pixel defining layer including first through third exposure areas, each exposing at least part of the first electrode; first through third organic light emitting layers disposed in the first through third exposure areas, respectively; a second electrode disposed on the first through third organic light emitting layers; a first capping layer disposed on the second electrode and overlapping upper surfaces of the first through third organic light emitting layers; a second capping member disposed on the first capping layer, does not overlap the upper surface of the first organic light emitting layer, and overlaps only a portion of each of the upper surfaces of the second and third organic light emitting layers; and an encapsulation layer covering the second capping member.

Abstract: Provided is a display device. The display device includes a light emitting element layer including a plurality of light emitting elements, and a light control layer on the light emitting element layer and overlapping the light emitting element layer on a plane. At least one of the light emitting elements and the light control layer includes an amorphous carbon light emitter.

Abstract: A group III nitride enhancement-mode HEMT based on a composite barrier layer structure and a manufacturing method thereof are provided. The HEMT includes first and second semiconductors respectively serving as a channel layer and a barrier layer, a third semiconductor serving as a p-type layer, a source, a drain and a gate, wherein a recessed structure is formed in the region of the barrier layer corresponding to the gate, which is matched with the third semiconductor and the gate to form a p-type gate, and the second semiconductor includes first and second structure layers successively arranged on the first semiconductor; relative to the selected etching reagent, the first structure layer has higher etching resistance than the second structure layer.

Abstract: Novel and useful electronic and magnetic control of several quantum structures that provide various control functions. An electric field provides control and is created by a voltage applied to a control terminal. Alternatively, an inductor or resonator provides control. An electric field functions as the main control and an auxiliary magnetic field provides additional control on the control gate. The magnetic field is used to control different aspects of the quantum structure. The magnetic field impacts the spin of the electron by tending to align to the magnetic field. The Bloch sphere is a geometrical representation of the state of a two-level quantum system and defined by a vector in x, y, z spherical coordinates.

Abstract: Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device.

Abstract: Transistors are fabricated by forming a nitride-based semiconductor barrier layer on a nitride-based semiconductor channel layer and forming a protective layer on a gate region of the nitride-based semiconductor barrier layer. Patterned ohmic contact metal regions are formed on the barrier layer and annealed to provide first and second ohmic contacts. The annealing is carried out with the protective layer on the gate region. A gate contact is also formed on the gate region of the barrier layer. Transistors having protective layer in the gate region are also provided as are transistors having a barrier layer with a sheet resistance substantially the same as an as-grown sheet resistance of the barrier layer.

Abstract: A high electron mobility transistor (HEMT) device comprising a substrate, a plurality of semiconductor layers provided on the substrate, and a source terminal, a drain terminal and at least one gate terminal provided on the plurality of semiconductor layers. The HEMT also includes a metal ring formed on the plurality of semiconductor layers around the source terminal, the drain terminal and the at least one gate terminal, where the metal ring operates to shift the pinch-off voltage of the device. In one embodiment, the metal ring includes an ohmic portion and an electrode portion, where both the ohmic portion and the electrode portion include a lower titanium layer, a middle platinum layer and an upper gold layer.