Abstract: The disclosure provides a charging device, which includes an input terminal configured to receive an input voltage; an output terminal configured to connect a target load so as to charge the target load; a control terminal, configured to receive a control voltage; a junction field-effect transistor and a control circuit. The junction field-effect transistor includes at least: a drain, electrically connected to the input terminal so as to receive the input voltage; a source, electrically connected to the output terminal so as to output an output voltage and an output current; and a gate, electrically connected to the control terminal. The control circuit is electrically connected to the control terminal, and configured to change the control voltage based on a change in a load voltage so as to change a pinch-off voltage of the JFET by controlling a bias voltage on the gate, thereby controlling the output current.

Abstract: According to one embodiment, a semiconductor device includes a first terminal, a second terminal, and a first circuit. The first circuit includes a first switch element having a first end coupled to a first node to which a first voltage is supplied, a second end coupled to the first terminal, and a gate coupled between the first node and the second terminal, and a second switch element coupled between the first node and the first terminal. The first circuit is configured to switch the first switch element from OFF state to ON state when supply of the first voltage is interrupted, and switch the second switch element from OFF state to ON state while maintaining the first switch element in ON state when a voltage of the first terminal changes to a second voltage.

Abstract: A gate-driving circuit includes a unidirectional module and two driving modules, and has a low-potential terminal, an output terminal, and two input terminals via which two driving signals are received. Each of the driving modules includes a capacitor and a resistor that are connected in parallel and between the output terminal and the respective one of input terminals, a power source that is connected between the output terminal and the low-potential terminal, and a diode that is connected between the output terminal and the power source. The unidirectional module is connected between the output terminal and one of the driving modules, and allows an electrical signal to pass only from the one of the driving modules to the output terminal.

Abstract: An active gate driver suitable for activating an electronic switch of an electric motor. The active gate driver includes a pull up branch, a pull down branch and a current and voltage feedback from an output of the active gate driver to at least one input of the active gate driver, wherein the current and voltage feedback is common to both the pull up branch and the pull down branch.

Abstract: A semiconductor integrated circuit of embodiments includes a first MOS transistor configured to control conduction and non-conduction between a reference voltage point and a node, a second MOS transistor connected to the first MOS transistor via the node and configured to apply a voltage equal to or lower than a withstand voltage of the first MOS transistor to the node, a third MOS transistor configured to receive supply of a second voltage higher than the first voltage, and output an output signal of a signal level corresponding to a voltage range of the second voltage, and a switch circuit configured to make a voltage of the node a fixed voltage when the first MOS transistor is in an OFF state.

Abstract: A USB interface detection module includes a detection unit and an adapting device. The adapting device is electrically connected between a first electronic device and a second electronic device. According to the interface specification of the first electronic device, the voltage value of a configuration channel pin is changeable through the use of the GND_DRAIN pin and the switching action of a field-effect transistor switch. Consequently, the interface specification of the first electronic device is acquired by the second electronic device.

Abstract: A method for driving an output node includes driving a control node of an output device coupled to the output node according to an input signal and using a fixed regulated voltage and a variable regulated voltage. The method includes generating the fixed regulated voltage based on a first power supply voltage, a second power supply voltage, and a first reference voltage. The method includes generating the variable regulated voltage based on the first power supply voltage, the second power supply voltage, and a second reference voltage. The method includes generating the second reference voltage based on the first power supply voltage, the second power supply voltage, a reference current, and a predetermined target voltage level of the control node of the output device. In an embodiment of the method, generating the second reference voltage includes periodically calibrating the second reference voltage.

Abstract: A header for an implantable medical device includes at least an antenna and a receptacle for receiving a signal transmission line. Either one or a combination of the antenna and the receptacle are encased in a dielectric material. The dielectric material can be one of or include one of a polymer, a ceramic material, polyoxymethylene, polysulfone, polybutylene terephthalate. A medical device and a method for assembling a medical device are also provided.

Abstract: A switch driving device includes a gate driver, a bootstrap circuit, a current limiting portion, and a current control portion. The gate driver drives an N-type semiconductor switch element. The bootstrap circuit includes a boot capacitor and a boot diode and applies a voltage to the gate driver. The current limiting portion limits a current to be supplied to the boot capacitor. The current control portion controls operations of the current limiting portion. The current limiting portion is provided on a path that electrically connects the boot capacitor and the boot diode to each other.

Abstract: A switching element drive device that reduces a switching loss while suppressing noise with an inexpensive configuration, is provided. The switching element drive device includes a current sensor configured to measure a load current flowing through a load, a voltage sensor configured to measure an input voltage inputted from a power supply, and a control part configured to output a command value of a gate drive voltage to a gate drive voltage supply part, the gate drive voltage supply part being configured to supply the gate drive voltage for driving a switching element disposed between the power supply and the load, wherein the control part is further configured to determine the command value of the gate drive voltage based on the load current and the input voltage.

Abstract: An acoustic wave device includes a piezoelectric substrate, functional elements, an outer peripheral support layer, a cover portion, and a protective layer covering the cover portion. A hollow space is defined by the piezoelectric substrate, the outer peripheral support layer, and the cover portion, and the functional elements are disposed in the hollow space. The acoustic wave device further includes an under bump metal layer, a wiring pattern, and a through-electrode that connects these elements. In the protective layer, a through-hole to be filled with a conductor to electrically connect a solder ball and the under bump metal layer is provided. The outer peripheral support layer includes a protruding portion protruding to the hollow space. When the acoustic wave device is seen in plan view, at least a portion of the through-hole overlaps the hollow space, and an end portion of the protruding portion overlaps an inner region of the through-hole.

Abstract: A power transistor module includes a power transistor device and a control circuit. The control circuit is electrically connected to the power transistor device for providing at least one gate voltage to drive the power transistor device, and adjusting the at least one gate voltage in response to an output power of the power transistor module. When the output power is greater than a predetermined power load, the at least one gate voltage has a first swing amplitude; and when the output power is less than or equal to the predetermined power load the at least one gate voltage has a second swing amplitude less than the first swing amplitude.

Abstract: An interface circuit includes a first switch element connected to a first power supply node, supplying a first power supply voltage, and an output node, transmitting an output signal, and controlled by a first input signal, a second switch element connected to a second power supply node, supplying a second power supply voltage, lower than the first power supply voltage, and the output node and controlled by a second input signal, different from the first input signal, a first resistor connected between the first power supply node and the first switch element, a second resistor connected between the second power supply node and the second switch element, a first capacitor connected between the first resistor and the first switch element and charged and discharged by a first control signal, a second capacitor connected between the second resistor and the second switch element and charged and discharged by a second control signal, and a buffer circuit configured to output the first control signal and the second

Abstract: A radio frequency (RF) switching circuit is provided. The RF switching circuit includes a low-figure-of-merit (FOM) switching path that requires a longer duration to be switched on and off and a high-FOM switching path having a higher FOM than the low-FOM switching path but that can be switched on and off faster than the low-FOM switching path. In one aspect, the RF switching circuit passes an RF signal via the high-FOM switching path while toggling the low-FOM switching path to help reduce overall switching time of the RF switching circuit. In another aspect, the RF switching circuit passes the RF signal via the low-FOM switching path whenever the low-FOM switching path is switched on to help improve overall FOM of the RF switching circuit. As a result, the RF switching circuit may achieve a good overall response time and a reasonable overall FOM.

Abstract: According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

Abstract: A circuit device includes an output terminal, an output transistor, and a gate voltage control circuit. The output transistor is provided between a first power supply node and the output terminal. The gate voltage control circuit changes a gate voltage of the output transistor at a first temporal voltage change rate after an input signal changes from a first logic level to a second logic level, changes the gate voltage at a second temporal voltage change rate smaller than the first temporal voltage change rate after the gate voltage reaches a first determination voltage, and changes the gate voltage at a third temporal voltage change rate greater than the second temporal voltage change rate after the gate voltage reaches a second determination voltage.

Abstract: An amplifying apparatus includes a zero point generating circuit, a level shift circuit, a transistor, and an amplifying circuit. A first terminal of the zero point generating circuit is coupled to an output terminal of the amplifying apparatus. A first terminal of the level shift circuit is coupled to the output terminal of the amplifying apparatus. A first terminal of the transistor is coupled to a supply voltage. A second terminal of the transistor is coupled to the output terminal of the amplifying apparatus. A control terminal of the transistor is coupled to a second terminal of the level shift circuit. An input terminal of the amplifying circuit is coupled to an input terminal of the amplifying apparatus. An output terminal of the amplifying circuit is coupled to the output terminal of the amplifying apparatus.

Abstract: An object of the present disclosure is to provide a semiconductor device drive circuit stably preventing an erroneous operation in accordance with an application of dV/dt. A semiconductor device drive circuit includes: pulse transmission circuits outputting an on-pulse transmission signal and an off-pulse transmission signal based on a level shift on-pulse signal and a level shift off-pulse signal; a dV/dt detection circuit detecting a dV/dt period based on the level shift on-pulse signal and the level shift off-pulse signal; a logic filter circuit which does not change outputs when both the on-pulse transmission signal and the off-pulse transmission signal are input; and a latch circuit outputting a signal synchronized with an output of the logic filter circuit. The pulse transmission circuit includes impedance adjusting parts reducing a signal level of the on-pulse transmission signal and the off-pulse transmission signal during the dV/dt period.

Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

Abstract: A level shifter includes a pre-level shifter and a selector. The selector is coupled to the pre-level shifter. The pre-level shifter shifts an input digital voltage to a first digital voltage and a second digital voltage. The levels of the first digital voltage and the second digital voltage transition sequentially in time when the level of the input digital voltage transitions from one logic to the other. The selector selects and outputs the first digital voltage whose level transitions earlier in time compared to the transition of the level of the second digital voltage.