Patents Examined by Kenneth B. Wells
  • Control circuit, voltage source circuit, driving device, and driving method
    Patent number: 11606019
    Abstract: A control circuit includes a detection module configured to detect an operating condition of a semiconductor switching device; a determining module configured to determine a gate allowable voltage of the semiconductor switching device based on the operating condition; and an output module configured to output a control signal to a driving power supply circuit of the semiconductor switching device based on the gate allowable voltage, to control the driving power supply circuit to provide a gate on voltage that is not higher than the gate allowable voltage and that is positively correlated with the gate allowable voltage for the semiconductor switching device. When the operating condition of the semiconductor switching device becomes better, the gate allowable voltage of the semiconductor switching device is increased.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: March 14, 2023
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Dong Chen, Lei Shi, Zhaohui Wang
  • Circuit for switching power supply and switching power supply device
    Patent number: 11601122
    Abstract: The present disclosure provides a power integrated circuit (IC) for a switching power supply device that generates an output voltage based on an input voltage. The circuit includes: a high-side transistor, disposed between an input terminal applied with the input voltage and a switch terminal; and a low-side transistor, disposed between the switch terminal and a ground terminal. A feedback control for turning on or off the transistor is performed based on a feedback voltage corresponding to the output voltage. A protection circuit is capable of performing a protection operation for turning on the high-side transistor or the low-side transistor regardless of the feedback control based on a switch voltage at the switch terminal and the input voltage, based on a backflow current from the ground terminal to the switch terminal, or based on the input voltage and a predetermined determination voltage.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: March 7, 2023
    Assignee: Rohm Co., Ltd.
    Inventor: Shidong Guan
  • Input/output (I/O) circuit with dynamic full-gate boosting of pull-up and pull-down transistors
    Patent number: 11595042
    Abstract: An aspect of the disclosure relates to an apparatus including an output driver, including: a first p-channel metal oxide semiconductor field effect transistor (PMOS FET); a second PMOS FET coupled in series with the first PMOS FET between an upper voltage rail and an output; a first n-channel metal oxide semiconductor field effect transistor (NMOS FET); and a second NMOS FET coupled in series with the first NMOS FET between the output and a lower voltage rail; a first predriver coupled to gates of the first and second PMOS FETs and first and second NMOS FETs; and a second predriver coupled to the gates of the first and second PMOS FETs and first and second NMOS FETs.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 28, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Wilson Jianbo Chen, Chiew-Guan (Kelvin) Tan
  • Communication apparatus and method thereof
    Patent number: 11588518
    Abstract: An apparatus includes a rectifier having a first input coupled to a first terminal of a receiver coil and a second input coupled to a second terminal of the receiver coil, wherein the rectifier is configured to convert an alternating current voltage into a direct current voltage, a first communication network connected to the first input of the rectifier, and a second communication network connected to the second input of the rectifier, wherein the first communication network and the second communication network are controlled independently to adjust a gain of a wireless power transfer system.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 21, 2023
    Assignee: NuVolta Technologies (Hefei) Co., Ltd.
    Inventor: Zhijun Luo
  • Systems and methods for detecting local oscillator leakage and image tone in I/Q mixer based transceivers
    Patent number: 11581852
    Abstract: According to one embodiment, a transceiver includes: a radio transmitter including a power amplifier; a detector circuit including: a squaring circuit configured to receive an output of the power amplifier of the radio transmitter and configured to produce an output current; and a DC current absorber electrically connected to an output terminal of the squaring circuit.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: February 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hariharan Nagarajan, Ashutosh Verma, Chung Lau, Tienyu Chang
  • Switching apparatus and switching method
    Patent number: 11581890
    Abstract: Provided is a switching apparatus, including: a first semiconductor switching device of IGBT, and a second semiconductor switching device of a different type from IGBT, which are electrically connected in parallel; and a control unit configured to turn on the second semiconductor switching device before the first semiconductor switching device, wherein a maximum rated current of the second semiconductor switching device is greater than a maximum rated current of the first semiconductor switching device.
    Type: Grant
    Filed: November 25, 2021
    Date of Patent: February 14, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Harunobu Ikeda
  • Level shifter
    Patent number: 11581878
    Abstract: A level shifter includes a control circuit and a bias circuit. The control circuit receives a bias voltage, a first signal associated with a first voltage domain, and supply voltages associated with a second voltage domain, and outputs a second signal that is associated with the second voltage domain. The bias circuit generates the bias voltage that is indicative of the duty cycle of the second signal, and provides the bias voltage to the control circuit to control the duty cycle of the second signal. The duty cycle of the second signal is controlled such that a difference between a duty cycle of the first signal and an inverse of the duty cycle of the second signal is less than a tolerance limit.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: February 14, 2023
    Assignee: NXP B.V.
    Inventors: Sanjay Kumar Wadhwa, Saurabh Goyal, Divya Tripathi
  • Management of multiple switching-synchronized measurements using combined prioritized measurement and round-robin sequence measurement
    Patent number: 11575369
    Abstract: A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: February 7, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: James Edward Heckroth, Ion Constantin Tesu
  • Skew detection system and method to remove unwanted noise due to skewed signals
    Patent number: 11573268
    Abstract: Various embodiments relate to a skew detector circuit, including: a logic circuit having two inputs configured to generate a logic 1 output when the two inputs have a logic 0 value and generator a logic 0 output when the two input have a logic 1 value; a first level shifter configured to increase the output of the logic circuit to a higher voltage; a second level shifter configured to increase the output of the first level shifter to a higher voltage; and a voltage regulator configured to produce a first voltage for the logic circuit, a second voltage for the first level shifter, and a third voltage for the second level shift.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 7, 2023
    Assignee: NXP USA, Inc.
    Inventors: Siamak Delshadpour, Xu Zhang, Xiaoqun Liu, Kenneth Jaramillo
  • Electronic device performing power gating operation
    Patent number: 11575375
    Abstract: An electronic device includes a driving control signal generation circuit configured to generate first and second driving control signals and a driving switching control signal. The electronic device also includes a switching control signal driving circuit configured to drive a switching control signal to a first voltage on the basis of the first driving control signal and the driving switching control signal or drive the switching control signal to a second voltage on the basis of the second driving control signal, depending on whether a power-down mode is performed.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: February 7, 2023
    Assignee: SK hynix Inc.
    Inventor: Yun Seok Hong
  • Semiconductor structure and operation circuit
    Patent number: 11574997
    Abstract: A semiconductor structure including a substrate, a first well, a second well, a first doped region, a second doped region, a gate electrode, an insulating layer, a field plate, and a tunable circuit is provided. The first and second wells are formed on the substrate. The first doped region is formed in the first well. The second doped region is formed in the second well. The gate electrode is disposed over the substrate. The gate electrode, the first doped region, and the second doped region constitute a transistor. The insulating layer is disposed on the substrate and overlaps the gate electrode. The field plate overlaps the insulating layer and the gate electrode. The tunable circuit provides either a first short-circuit path between the field plate and the gate electrode, or a second short-circuit path between the field plate and the first doped region.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 7, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shao-Chang Huang, Li-Fan Chen, Ching-Ho Li, Gong-Kai Lin, Chieh-Yao Chuang
  • Variable capacitance circuit for phase locked loops
    Patent number: 11569814
    Abstract: A variable capacitance circuit may operate a Metal Oxide Semiconductor (MOS) transistor or other semiconductor device to switch a capacitor in and out. Several circuits may be combined in a parallel network having offset bias voltages, such that the combined network may produce a variable capacitance over a large voltage range. The variable capacitance circuit may be incorporated into a phase locked loop (PLL) circuit where similar devices may be configured to produce a voltage reference as part of the PLL circuitry. Such a circuit may be immune to temperature, process, or voltage variances, since the current pulse magnitude times the low pass filter resistance times the sensitivity of a controlled voltage oscillator can be held constant.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: January 31, 2023
    Assignee: Analog Bits, Inc.
    Inventors: Alan C. Rogers, Raghunand Bhagwan Iyengar
  • Laser radar device
    Patent number: 11561293
    Abstract: A light receiving unit receives a pulsed optical signal arriving from a search region. A branching unit generates, from a received light signal, a plurality of branch signals having signal intensities proportional to a signal intensity of the received light signal and different from one another. A conversion unit converts, from analog to digital, a signal fed via the individual path selected by a selection unit, and in accordance with a result of the conversion, a processing unit generates information regarding an object reflecting the optical signal. A control unit causes the selection unit to select one of the individual paths for which a determination unit determines that a magnitude of the fed signal is within an input range of the conversion unit and which provides the highest gain.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: January 24, 2023
    Assignee: DENSO CORPORATION
    Inventor: Shunsuke Kimura
  • Current mode logic driver and transmission driver including the same
    Patent number: 11552656
    Abstract: A transmission driver includes a pulse generator and a current mode logic driver. The pulse generator is configured to generate and output a first pulse signal by synchronizing at a falling edge time point of a first input signal, and generate and output a second pulse signal by synchronizing at a falling edge time point of a second input signal. The current mode logic driver is configured to output a pre-emphasis signal to which pre-emphasis technique has been applied by changing a first load resistance value and a second load resistance value based on the first pulse signal and the second pulse signal, respectively.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: January 10, 2023
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Gil Sung Roh, Sang Kyung Kim
  • Voltage comparator
    Patent number: 11552631
    Abstract: A circuit arrangement is disclosed for controlling the switching of a field effect transistor (FET). A current controlled amplifier may be configured to amplify a current in a current sense device to generate an amplified current, wherein the current in the current sense device indicates a current through the FET. A comparator may be coupled to the current sense amplifier to compare a voltage corresponding to the amplified current with a voltage reference and to generate a comparator output based on the comparison, wherein the comparator output controls whether the FET is on or off.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: January 10, 2023
    Assignee: FLEXTRONICS AP, LLC
    Inventor: Antony E. Brinlee
  • Gate-to-source monitoring of power switches during runtime
    Patent number: 11545969
    Abstract: A driver circuit may be configured to control a power switch. The driver circuit may comprise an output pin configured to deliver signals to a gate of the power switch to control an ON/OFF state of the power switch, and a comparator configured to compare a gate-to-source voltage of the power switch to a first threshold when the power switch is ON and to compare the gate-to-source voltage of the power switch to a second threshold when the power switch is OFF.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 3, 2023
    Assignee: Infineon Technologies AG
    Inventors: Cristian Murtaza, Markus Zannoth, Peter Stemplinger
  • Validation of current levels delivered by a gate driver
    Patent number: 11539350
    Abstract: A method for validating operation of a driver integrated circuit includes providing a signal using an output node. The signal is provided using multiple set points in response to a change in state of an input signal. Each set point corresponds to a different phase of a multi-phase transition of the signal. The method includes providing a timer value at an end of a phase of the multi-phase transition and determining whether the signal is in a target signal range of the phase based on the timer value at the end of the phase, a predetermined value defining the target signal range of the phase, and a predetermined time limit for the phase. A current through the output node may be provided using the multiple set points, and a voltage on the output node may have the multi-phase transition.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: December 27, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: James E. Heckroth, Ion C. Tesu
  • High voltage multi-signaling output driver apparatus
    Patent number: 11533044
    Abstract: An apparatus for generating multi-signaling output voltage may include at least one output buffer, wherein the at least one the output buffer may include a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a Zener diode along with a switchable current source. The apparatus may further include first logic circuitry, second logic circuitry, first voltage down level shifter circuitry, second voltage down level shifter circuitry, and a first voltage up level shifter circuitry. Outputs of the first voltage down level shifter circuitry, the second voltage down level shifter circuitry, and the first voltage up level shifter circuitry are combined using the output buffer to generate the desired output. The second NMOS transistor acts as isolation transistor for reducing and/or preventing diode current between a first supply voltage and the third supply voltage.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: December 20, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Zaira Zahir, Saurabh Saxena, Ankush Chowdhury
  • Level adjusting circuit and gate driving device including the same
    Patent number: 11528024
    Abstract: A level adjusting circuit includes a parallel resistor-capacitor (RC) sub-circuit, a first diode and an adjustable voltage supply. The RC sub-circuit includes an input capacitor and an input resistor, and includes an input node electrically connected to a driving signal source for receiving a driving signal therefrom, and an output node that outputs an adjusted driving signal. The first diode and the adjustable voltage supply are electrically connected, and are further electrically connected to the output node and a reference voltage node, respectively.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: December 13, 2022
    Assignee: Device Dynamics Lab Co., Ltd.
    Inventor: Ming-Cheng Lin
  • Coiled electronic component, coil component, manufacturing method of coil component, inductance element, T-type filter, oscillation circuit, and manufacturing method of inductance
    Patent number: 11527341
    Abstract: A coiled electronic component includes: an electronic component body which includes a coil portion having a spiral structure and formed of an electrically conductive material, and electrically conductive connection portions arranged on both ends of the coil portion; and a pair of electrodes for respectively connecting the electrically conductive connection portions to assembly portions arranged on an assembly object. The electrode includes a pair of pinching pieces for pinching the electrically conductive connection portion, and the pair of pinching pieces is opened in a manner that the electrically conductive connection portion is received and fitted therebetween.
    Type: Grant
    Filed: February 16, 2018
    Date of Patent: December 13, 2022
    Assignee: Nidec-Read Corporation
    Inventor: Tatsufumi Kusuda