Abstract: A method may include, in a chassis configured to provide a common hardware infrastructure to one or more modular information handling systems inserted into the chassis: determining if a save operation is occurring at a time when one or more power supply units are capable of delivering power to the chassis; and delaying power sequencing of the one or more power supply units until the save operation has completed.

Abstract: Apparatuses and methods are provided for reducing power consumption in a pattern-recognition processor. A power control circuit may be coupled to a block of programmed state machines to enable selective activation and deactivation of the block during a pattern search. The block may be deactivated if the pattern search is no longer active in that block and activated when needed by the pattern search. Additionally, the block may be deactivated based on an identifier of the data stream being searched. Excess blocks not used for any programmed state machines may be disabled such that they are not refreshed during a memory cycle.

Abstract: The power consumption of an analog arithmetic circuit is reduced. The analog arithmetic circuit includes a plurality of first circuits. An output terminal of the k-th (k is a natural number) first circuit is connected to an input terminal of the k+1-th first circuit. Each of the first circuits includes a memory circuit which holds an analog signal, a second circuit which performs arithmetic processing using the analog signal, a switch which controls power supply to the second circuit, and a controller. The conduction state of the switch included in the k-th first circuit is controlled by the controller included in the k+1-th first circuit. The arithmetic processing performed by the second circuit included in the k+1-th first circuit is started by the controller included in the k+1-th first circuit.

Abstract: A false-touch-wakeup prevention apparatus touch sensing, proximity sensing, NAND logic, AND logic and application processing devices. First, second input ends and output end of the AND logic are coupled to the touch sensing device, an output end of the NAND logic device, and the application processing device, respectively; first and second input ends of the NAND logic are coupled to the proximity sensing device, and the application processing device, respectively; when an initial state of the application processing is standby, the second input end of the NAND logic device inputs a first input value; when the initial state of the application processing is wakeup, the second input end of the NAND logic device inputs a second input value different from the first input value.

Abstract: Techniques for power source management in an information handling system (IHS) include detecting connection of multiple power sources to the IHS through respective DC adapters, obtaining data indicating the capabilities of each power source, obtaining data indicating a system load for the IHS, and generating, based on the obtained data, a load management plan specifying a target combined input power amount for power supplied by the multiple power sources and respective amounts of electrical power to be supplied by a single selected power source or by multiple selected power sources. The techniques also include combining the power supplied by each of the selected power sources into a combined input power and supplying the combined input power to the IHS. Prior to the combining, the voltage of the power supplied by a power source may be stepped up or down to a common voltage, or a power source may be de-rated.

Abstract: Medical device data manager configuration methods and systems including a medical device, a smart mobile device including a camera, a processor, a memory communicatively coupled to the processor, and machine readable instructions stored in the memory that may cause a system to perform at least the following when executed by the processor: use the camera of the smart mobile device to capture an image of the medical device; apply an identification algorithm to the image of the medical device; identify the medical device as an identified medical device based on the image of the medical device and the identification algorithm; and automatically configure a software application tool on the smart mobile device to retrieve data associated with one or more requirements of the identified medical device.

Abstract: Described is an apparatus which comprises: a controllable power gate coupled to an ungated power supply node and a gated power supply node; and a charge-pump circuit operable to be turned on and off according to a logic, wherein the charge pump circuit is coupled in parallel to the controllable power gate and also coupled to the ungated power supply node and the gated power supply node.

Abstract: A method is provided in one example embodiment and includes storing secure boot variables in a baseboard management controller; and sending the secure boot variables to a basic input/output system (BIOS) during a power on self-test, where the BIOS utilizes the secure boot variables during runtime to authenticate drivers and an operating system loader execution. In particular embodiments, the secure boot variables may be included in a white list, a black list, or a key list and, further, stored in erasable programmable read only memory.

Abstract: A power management algorithm framework proposes: 1) a Quality-of-Service (QoS) metric for throughput-based workloads; 2) heuristics to differentiate between throughput and latency sensitive workloads; and 3) an algorithm that combines the heuristic and QoS metric to determine target frequency for minimizing idle time and improving power efficiency without any performance degradation. A management algorithm framework enables optimizing power efficiency in server-class throughput-based workloads while still providing desired performance for latency sensitive workloads. The power savings are achieved by identifying workloads in which one or more cores can be run at a lower frequency (and consequently lower power) without a significant negative performance impact.

Abstract: The present application provides a power-down detection circuit and a control method. A low-voltage side power supply is connected to provide an output voltage of the low-voltage side power supply to a power-down detection sub-circuit and provide a standard supply voltage to the power-down detection sub-circuit, a controller and a memory via a voltage conversion circuit. The power-down detection sub-circuit is configured to obtain the output voltage of the low-voltage side power supply, and determine, according to the output voltage of the low-voltage side power supply, whether a power-down event occurs in the low-voltage side power supply. If it is determined that a power-down event occurs, a power-down signal is sent to the controller. The controller receives the power-down signal, and controls the memory to record current information of a high voltage bus sensed by a high-voltage side current sensor.

Abstract: A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in another architectural mode of the plurality of architectural modes, wherein the another architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the another architectural mode in place of the one architectural mode restricting use of the one architectural mode.

Abstract: Provided is an information processing device that includes an acquisition unit configured to acquire sensing data and a mode changing unit configured to change a mode on a basis of the sensing data. The acquisition unit changes sensing data to be acquired on a basis of the change of the mode.

Abstract: A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in other architectural mode of the plurality of architectural modes, wherein the other architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the other architectural mode in place of the one architectural mode restricting use of the one architectural mode.

Abstract: Methods, systems, and computer-readable storage media for receiving a configuration descriptor from configuration descriptor repository, the configuration descriptor declaring a configuration task, and providing an order of invoking two or more application programming interfaces (APIs) to respective components of the enterprise-side landscape to execute the configuration task, processing the configuration descriptor by a configuration executor of an integration services platform to automatically execute at least a portion of the configuration task by invoking the two or more APIs in the order, a response of a first API being provided as a request to a second API, and selectively indicating one of success and failure of the configuration task based on at least one response of the two or more APIs.

Abstract: An image processing apparatus, including a power source, an image engine, an interface to communicate with an external device and deliver power from the power source to the external device, and a controller, is provided. The controller is configured to detect connection of the external device to the interface; receive power information, including a value of regular operable power and a value of minimum operable power, from the external device; receive a job execution command; in response to receiving the job execution command, determine whether a first power value including the value of the regular operable power exceeds a value of power available for the external device during a predetermined operation by the image engine; and in response to a determination that the first power value exceeds the value of power available for the external device, control the power source to deliver the minimum operable power to the external device.

Abstract: An Ethernet power sourcing equipment (PSE), and a method and an apparatus for power over Ethernet (PoE), where the Ethernet PSE includes a PSE chip, a master control processor, a power supplying port, and a preprocessor. The preprocessor is configured to determine whether the master control processor starts upon power-on, control the PSE chip to detect whether the power supplying port is connected to a valid powered device (PD) when the master control processor starts upon power-on, and control, according to a preset rule, the PSE chip to power on the valid PD when the power supplying port is connected to the valid PD. Hence, the Ethernet PSE has abundant management functions and can quickly power on a PD.

Abstract: The present disclosure discloses a memory device including a control system for thermal throttling. The control system acquires the temperature of a non-volatile memory element from a temperature detector at a first frequency. Upon determining that the temperature of the non-volatile memory element is above a pre-determined threshold, the control system acquires the temperature of the non-volatile memory element from the temperature detector at a second frequency that is higher than the first frequency and activates the thermal throttling for the non-volatile memory element.

Abstract: An electronic device includes a processor, a volatile memory, and a non-volatile memory. The non-volatile memory stores a first operating system, and the electronic device works in a first working mode and a second working mode. When the electronic device is in the first working mode, a second operating system is run in the volatile memory. When the processor detects that the electronic device reaches a preset condition for entering the second working mode, the non-volatile memory is enabled, and non-system data in the volatile memory is moved to the non-volatile memory. The non-system data does not include the second operating system. After the movement of the non-system data is completed, the volatile memory is disabled, and the first operating system is run in the non-volatile memory, so that the electronic device enters the second working mode.

Abstract: A launch device for launching an electronic apparatus comprises a storage unit, a main storage and a processor. The storage unit is configured to store a mini-launch code for executing a detection of an output value of a sensor, and store system driving codes which comprises a standard launch code for launching electronic apparatus. The main storage loads the mini-launch code and the system driving codes. The processor loads and executes the mini-launch code or the standard launch code.

Abstract: A digital integrated circuit comprising may include a digital sensor circuit that converts binary bit patterns of wires in a sub-circuit over a given time into a single integer value that represents the total activity of a sub-circuit, and a digital data processing circuit that receives multiple activity integer values from multiple digital sensors in multiple sub-circuits and logically combines the values or uses a lookup table to output a single integer value that represents the total activity of a larger sub-circuit.