Abstract: A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Abstract: Systems and methods as described herein may take a variety of forms. In an example, a circuit includes a first voltage stepdown module and a second voltage stepdown module. The first voltage stepdown module has a supply voltage and a first reference voltage as inputs, and an intermediate stepped down voltage as an output, the intermediate stepped down voltage being electrically coupled to a feedback input of the first voltage stepdown module. The second voltage stepdown module includes a low-dropout voltage regulator having the intermediate stepped down voltage and a second reference voltage as inputs and a target voltage as an output.

Abstract: A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit.

Abstract: There is provided a switching valve for a voltage source converter.

Abstract: In an embodiment, a linear voltage regulator includes: an output transistor having a first current path terminal configured to be coupled to a load, and a second current path terminal coupled to a first supply terminal, where the output transistor is configured to provide, at the first current path terminal, a regulated output voltage; a voltage source circuit configured to provide, in an open loop manner, a first voltage to a control terminal of the output transistor; and a feedback loop coupled between the first current path terminal of the output transistor and the control terminal of the output transistor, the feedback loop including a sense transistor having a first current path terminal coupled to the first current path terminal of the output transistor.

Abstract: A power supply circuit in an embodiment includes a series circuit of a first resistor and a second transistor, the series circuit being connected in parallel to a first transistor between an input terminal and an output terminal, a third transistor configured to output an electric current corresponding to an electric current flowing to the first resistor, a third resistor configured to generate a voltage corresponding to the electric current, and a second operational amplifier configured to output a signal corresponding to a voltage difference between the voltage and a reference voltage to a gate of the first transistor and a gate of the second transistor.

Abstract: A controller of a switching converter includes an error amplifying circuit, a first comparison circuit, a valley detection circuit, a valley selection circuit and a frequency control circuit. The error amplifying circuit generates a compensation signal based on the difference between a reference signal and a feedback signal. The first comparison circuit compares the compensation signal with a modulation signal and generates a pulse frequency modulation signal. The valley detection circuit detects valleys of a resonant voltage of the switching converter and generates a valley pulse signal. The valley selection circuit generates a valley enable signal corresponding to a target valley number based on the pulse frequency modulation signal and the valley pulse signal. The frequency control circuit generates a frequency control signal to control the switching frequency of the first switch based on the valley enable signal and the valley pulse signal.

Abstract: The present disclosure relates to a low-dropout regulator that limits a quiescent current. It mainly includes an error amplifier, an output switching transistor, a feedback switching transistor, a current duplicating circuit, and a clamping current source. The clamping current source is added between an input voltage and the feedback switching transistor, so that a feedback current outputted by the feedback switching transistor is clamped, and the highest value is only proportional to a current value of the clamping current source. In this way, the quiescent current outputted by the low-dropout regulator is no longer increasing indefinitely in proportional to a load current, which can effectively solve the technical problems of poor stability and decreased efficiency caused by the infinite increase of the quiescent current.

Abstract: A voltage regulator is provided. The voltage regulator includes a main error amplifier, a first buffer, a second buffer, and multiple main zero compensation loops. The main error amplifier generates a first voltage signal according to a reference voltage signal and a feedback voltage signal. The first buffer provides a second voltage signal according to the first voltage signal. The second buffer provides an output voltage signal according to the second voltage signal. The main zero compensation loops are respectively coupled between an output terminal of the main error amplifier and an output terminal of the first buffer. The main zero compensation loops provide different zero compensations.

Abstract: A voltage regulator that includes a first amplifier, a second amplifier, a summer, and a transistor is presented. The first amplifier has a first gain and a first frequency bandwidth, and is configured to generate a first voltage output. The second amplifier has a second gain that is lower than the first gain and a second frequency bandwidth that is higher than the first frequency bandwidth, and is configured to generate a second voltage output. The summer is configured to generate a summed voltage output. The transistor is connected to the summer and configured to generate a regulated voltage based on the summed voltage output of the summer.

Abstract: A variable duty cycle switching signal at a switching frequency is applied to a switching current regulation circuit arrangement energizing a current storage circuit assembly. Switching of the variable duty cycle switching signal is controlled by an upper and a lower threshold current level. The upper and lower threshold current levels vary with time following an average current value time variation. Additionally, frequency jitter is introduced in the variable duty cycle switching signal by: defining at least a frequency modulation window around a limit frequency identifying a limit value for an acceptable EMI; and applying an amplitude modulation of the upper and/or lower threshold current levels varying with time, wherein the amplitude modulation is applied in a time interval between times when the switching frequency enters and exit the frequency window.

Abstract: An electrical supply device is connected on a network side to an electrical supply network and includes a frequency converter having a network-side power converter and an intermediate circuit, and a network filter, which is connected upstream of the network-side power converter. In a method for operating the electrical supply device, during a pulse-blocking operating state of the frequency converter, a check is carried out for the presence of a dangerous state of the network filter, and only in the presence of the dangerous state, only the network-side power converter is actuated such that a network perturbation causing the dangerous state of the network filter is at least damped to protect the network filter from the dangerous state.

Abstract: A reference voltage circuit (1) includes a PTAT voltage generation circuit (20) that generates a voltage with a positive temperature coefficient, a CTAT voltage generation circuit (10) that generates a voltage with a negative temperature coefficient, and a temperature characteristic adjustment circuit (30) that generates a voltage for adjusting temperature characteristics. The reference voltage circuit outputs a reference voltage (VOUT) formed by calculation based on the output of the PTAT voltage generation circuit, output of the CTAT voltage generation circuit, and output of the temperature characteristic adjustment circuit.

Abstract: Some embodiments provide a multi-phase DC/DC switching converter in which each of the phases are controlled using a common comparator for comparing an output voltage of the switching converter and a reference voltage, with in some embodiments each of the phases including a bypass switch for coupling ends of an output inductor of the switching converter. Some embodiments provide a multi-phase DC/DC switching converter in which some of the phases are operated with clock signals having frequencies different than clock signals used for operating others of the phases. Some embodiments provide a multi-phase DC/DC switching converter in which some of the phases include inductors having inductances different than inductances for inductors of others of the phases.

Abstract: An embodiment DC to DC conversion circuit comprises a DC to DC converter and a regulation circuit. The regulation circuit comprises a comparator configured to detect, during a discharge phase of the DC to DC converter, an overshoot period during which an output voltage of the DC to DC converter exceeds a target voltage, and a timer configured to measure a duration of the overshoot period.

Abstract: Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.

Abstract: Disclosed is a voltage regulator, which makes a low dropout regulator stop working by controlling a sampling circuit of the low dropout regulator to break in a sleep mode, and makes an output voltage of the low dropout regulator follow an output voltage of a first bias voltage generating circuit by using a first MOS transistor connected between an voltage input end and an voltage output end of the low dropout regulator in a source follower structure, and is capable of controlling an output voltage of the whole voltage regulator by a generated bias voltage applied to the first bias voltage generating circuit by a first bias current source.

Abstract: A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Abstract: A power supply includes an inverter configured to direct current (DC) power into alternating current (AC) power, an impedance matching circuit configured to supply the AC power to a load; and a controller configured to adjust disposition of a powering period, in which the AC power is output, and a freewheeling period, in which the AC power is not output, to adjust a power amount of the power supplied to the load through the impedance matching circuit by the inverter.

Abstract: According to an aspect a low noise electronic voltage regulator comprises a regulating transistor operative to regulate an input DC voltage to provide a regulated DC output voltage, an error amplifier configured to generate an error signal based on a reference voltage and a feedback voltage, wherein the error amplifier receiving the feedback voltage through a feedback loop formed between the regulated DC output voltage and the feedback voltage, and a first amplifier in the feedback loop providing a gain of greater than unity from the regulated DC output voltage and the feedback voltage.