Abstract: A method is disclosed which makes use of an intelligent transfer algorithm for a UPS when the UPS is required to switch from a high efficiency mode of operation (VFD or VI) to an independent mode of operation (VFI), as a result of an under voltage condition occurring on the bypass line of the UPS. The method involves performing successive voltage measurements at a plurality of points during a first half cycle of an AC mains (Vout) signal to integrate the Vout signal until a zero crossing of the Vout signal is detected. Successive voltage measurements are used to detect the disruption of the Vout signal and a percentage of missing voltage area from the Vout signal during the disruption. The UPS then supplies a compensation voltage (Vcomp) which is added to the Vout signal to restore the Vout signal to a level at least approximately equal to a nominal AC mains voltage output signal (Voutnominal).

Abstract: An apparatus for driving a load using a low supply voltage includes a voltage-mode driver and a current source arrangement. The voltage-mode driver provides a desired termination impedance and a first portion of a desired output current to the load. The current source arrangement provides a second portion of the desired output current. The desired output current generates a predetermined voltage swing across the load, while the voltage-mode driver and the current source arrangement are powered by the low supply voltage.

Abstract: Wireless power transfer systems including wireless transmitter and receivers, which are insensitive to misalignment, are provided. A wireless power transfer system can include a first conductive loop that has cylindrical, conical, or spherical symmetry. The wireless power transfer system can further include a second conductive loop that is formed around the first conductive loop, and can also share the same type of symmetry as the first conductive loop. The wireless transfer system can be a wearable device or an implantable device.

Abstract: An illustrative device includes a first silicon-controlled rectifier (SCR) and a second silicon-controlled rectifier (SCR) connected in anti-parallel and a first commutation module, which includes a first voltage source, a first diode, and a first self-commutating semiconductor switch. The device also includes a second commutation module including a second voltage source, a second diode, and a second self-commutating semiconductor switch. The first voltage source, the first diode, and the first self-commutating semiconductor switch of the first commutation module are connected in series. The second voltage source, the second diode, and the second self-commutating semiconductor switch of the second commutation module are connected in series. The first SCR, the second SCR, the first commutation module, and the second commutation module are connected in parallel. The commutation modules are configured to apply reverse bias voltages to the first and second SCRs to turn off the SCRs.

Abstract: A semiconductor chip allows for a selected amount of on-die decoupling capacitance to be connected to a very-large-scale integrated circuit (VLSI) system after the circuit design is complete. The semiconductor chip comprises an integrated circuit disposed on a packaging substrate, and a power distribution network that is electrically connectable to the integrated circuit via a programmable connectivity array via the packaging substrate.

Abstract: A phase and frequency control circuit may be provided. The phase and frequency control circuit may include a division circuit configured to generate a plurality of divided signals by dividing an input signal. The phase and frequency control circuit may include a timing control circuit configured to generate a plurality of timing control signals by sampling the plurality of divided signals according to a phase control code and a sampling reference signal.

Abstract: A home appliance includes a driver to drive a load, a power supply to convert AC power supplied from an outside of the home appliance, and to receive DC power during interruption of electric power, and a controller (1) to perform a control operation to supply first electric power based on the supplied AC power to the load in accordance with a normal operation mode when no interruption of electric power occurs, (2) to perform a control operation to supply second electric power based on the supplied DC power to the load in accordance with the normal operation mode when no interruption of electric power occurs, and (3) to perform a control operation to supply third electric power based on the supplied DC power to the load in accordance with a power saving mode upon the interruption of electric power.

Abstract: The disclosure provides a detector that includes a pre-charge circuit. The pre-charge circuit receives a supply voltage. A pre-charged comparator is coupled to the pre-charge circuit and receives the supply voltage. The pre-charged comparator generates a transition signal at a transition node. A slope of the transition signal is greater than a slope of the supply voltage. A first diode connected transistor receives the supply voltage. A first capacitor is coupled to the first diode connected transistor. An inverter is coupled to the first diode connected transistor and generates an enable signal when the supply voltage is below a threshold voltage.

Abstract: A switching circuit includes a wiring into which a parallel circuit of a first IGBT and a second IGBT is inserted, and a gate control circuit. The gate control circuit has a first switching element configured to control a gate potential of the first IGBT according to a potential of a second principal electrode, and a second switching element configured to control a gate potential of the second IGBT according to a potential of a fourth principal electrode. An output terminal of the control device is connected to the first switching element through a first switch and is connected to the second switching element through a second switch. The control device applies a control signal to the output terminal in a state where the first switch and the second switch are turned on when switching both of the first IGBT and the second IGBT.

Abstract: Contactless power transfer from a transmitter to a receiver is managed. A magnetic field is generated by the transmitter from a command at a control frequency for a switching resonant circuit. The receiver communicates information to the transmitter through modulation of the magnetic field. The modulation is detected by the transmitter so as to extract the information. An adjustment of the control frequency is then made according to the received information. The modulation detection involves detecting variations in the control frequency.

Abstract: An on-chip true noise generator including an embedded noise source with a low-voltage, high-noise zener diode(s), and an in-situ close-loop zener diode power control circuit. The present invention proposes the use of heavily doped polysilicon and silicon p-n diode(s) structures to minimize the breakdown voltage, increasing noise level and improving reliability. The present invention also proposes an in-situ close-loop zener diode control circuit to safe-guard the zener diode from catastrophic burn-out.

Abstract: A coil for wireless power transmission in which a plurality of magnetic connection members are disposed in a manner which magnetically connects coils among a plurality of coils, which are adjacent with one or more coils therebetween, and does not magnetically connect coils among the plurality of coils, which are next to each other, and in adjacent coils among the plurality of coils, which are magnetically connected, directions of magnetic fields that are generated when a current flows through the coils are mutually inverse directions.

Abstract: A digitally controlled oscillator (DCO) modulation apparatus and method provides a wideband phase-modulated signal output. An exemplary modulator circuit uses an oscillator in a phase-locked loop. The circuit receives a wrapped-phase input signal, unwraps the wrapped-phase input signal to generate an unwrapped-phase signal, and differentiates the unwrapped-phase signal. The wrapped-phase input signal and the differentiated unwrapped-phase signal are both injected into a feedback loop of the modulator circuit. The feedback loop may include a multi-modulus frequency divider with a frequency divisor that is temporarily incremented or decremented to cancel out abrupt phase jumps associated with the wrapped-phase to unwrapped-phase conversion.

Abstract: A switching converter includes a first electronic switch and a second electronic switch and respective drive circuits for switching on and switching off alternatively the first and second electronic switches. The drive circuits have a supply line for supplying to them a supply voltage. At least one of the drive circuits has, coupled to it, a capacitor for storing the supply voltage. An electronic-switching circuit is provided for selectively disconnecting the drive circuit from the supply line when the electronic switch driven thereby is switched off. In this mode, the drive circuit is supplied by the voltage stored on the capacitor.

Abstract: Apparatus and methods for phase synchronization of phase-locked loops (PLLs) are provided. In certain configurations, an RF communication system includes a PLL that generates one or more output clock signals and a phase synchronization circuit that synchronizes a phase of the PLL. The phase synchronization circuit includes a sampling circuit that generates samples by sampling the one or more output clock signals based on timing of a reference clock signal. Additionally, the phase synchronization circuit includes a phase difference calculation circuit that generates a phase difference signal based on the samples and a tracking digital phase signal representing the phase of the PLL. The phase synchronization circuit further includes a phase adjustment control circuit that provides a phase adjustment to the PLL based on the phase difference signal so as to synchronize the PLL.

Abstract: A solar power generation system includes a storage battery, a solar power generation device that is provided on the side of the storage battery and outputs solar generated power, and a power control device. The power control device includes a variation component extraction unit that extracts a shade variation component from a generated power signal measured by the solar power generation device, and a smoothing unit that smoothens the shade variation component obtained by the variation component extraction unit. The power control device obtains a charge/discharge target value of the storage battery on the basis of an output signal from the smoothing unit.

Abstract: A self-oscillating DC-DC converter structure is proposed in which an oscillator is completely internalized within the switched-capacitor network. This eliminates power overhead of clock generation and level shifting and enables higher efficiency at lower power levels. Voltage doublers are cascaded to form a complete energy harvester with a wide load range from 5 nW to 5 ?W and self-starting operation down to 140 mV. Because each doubler is self-oscillating, the frequency of each stage can be independently modulated, thereby optimizing the overall conversion efficiency.

Abstract: A control apparatus using variations in conduction angle as control command, wherein a conduction angle modulation module of a traditional leading edge cutoff dimmer is arranged in parallel with a resistance module, so as to enlarge the minimum conduction angle of the leading edge dimmer. The modulation range of the conduction angle of the conduction angle modulation module may be set to a smaller range, so that the modulation range of the resistance module will not be uncertain due to different setting values of the variable resistance, whereby the circuit at load end can be identified readily and function mode switching facilitated to achieve the effect of multiplexing control.

Abstract: Radio-frequency (RF) devices are disclosed having transistor gate voltage compensation to provide improved switching performance. RF devices, such as switches, include a plurality of field-effect transistors (FETs) connected in series between first and second nodes, each FET having a gate. A compensation network including a coupling circuit couples the gates of each pair of neighboring FETs.

Abstract: In a clock frequency doubler, an input clock feeds into a digital programmable delay circuit, and an inverted input clock feeds into another digital programmable delay. The outputs of these digital programmable delay circuits are combined with the input clock and inverse clock through AND gates in order to generate clock pulses at both the rising and falling edge of the clock. These signals are combined using an OR gate to provide an output clock signal with a frequency that is double the frequency of the input clock signal. The values of the control bits for the digital programmable delay circuit are determined in a time-to-digital conversion (TDC) circuit that includes a Successive Approximation Register (SAR). For every cycle of the clock, the SAR circuit successively sets the programmable delay control bits and compares the delay circuit output with the input clock to determine the value of the control bits.