Patents Examined by Mark A Giardino, Jr.
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Patent number: 11625192Abstract: Example storage systems, storage devices, and methods provide sharing of data function processing using a memory buffer to coordinate between peer storage devices. A peer storage device acts as master to determine a plurality of compute tasks associated with a host function, determine peer storage devices and assign them compute tasks, and store the task compute configuration for each compute task in the buffer memory for access by the peer storage devices. Results of the peer compute tasks may be returned to the host.Type: GrantFiled: June 22, 2020Date of Patent: April 11, 2023Assignee: Western Digital Technologies, Inc.Inventor: Ramanathan Muthiah
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Patent number: 11614887Abstract: A method of optimising a service rate of a buffer in a computer system having memory stores of first and second type is described. The method selectively services the buffer by routing data to each of the memory store of the first type and the second type based on read/write capacity of the memory store of the first type.Type: GrantFiled: April 26, 2022Date of Patent: March 28, 2023Assignee: CORVIL LIMITEDInventors: Guofeng Li, Ken Jinks, Ian Dowse, Alex Caldas Peixoto, Franciszek Korta
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Patent number: 11614883Abstract: A distributed data storage system using erasure coding (EC) provides advantages of EC data storage while retaining high resiliency for EC data storage architectures having fewer data storage nodes than the number of EC data-plus-parity fragments. An illustrative embodiment is a three-node data storage system with EC 4+2. Incoming data is temporarily replicated to ameliorate the effects of certain storage node outages or fatal disk failures, so that read and write operations can continue from/to the storage system. The system is equipped to automatically heal failed EC write attempts in a manner transparent to users and/or applications: when all storage nodes are operational, the distributed data storage system automatically converts the temporarily replicated data to EC storage and reclaims storage space previously used by the temporarily replicated data. Individual hardware failures are healed through migration techniques that reconstruct and re-fragment data blocks according to the governing EC scheme.Type: GrantFiled: June 1, 2021Date of Patent: March 28, 2023Assignee: Commvault Systems, Inc.Inventors: Anand Vishwanath Vastrad, Avinash Lakshman, Suhani Gupta, Srinivas Lakshman
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Patent number: 11604608Abstract: Disclosed are computer-implemented methods, non-transitory computer-readable media, and systems for processing blockchain transactions. One computer-implemented method includes receiving M blockchain transactions and executing N blockchain transactions out of the M blockchain transactions in parallel using K threads of a first thread pool. A second thread pool is dedicated for accessing blockchain data stored in a storage system. For blockchain transactions distributed to each one of the K threads, one or more coroutines are used for each blockchain transaction so that the blockchain transactions are executed asynchronously using the coroutines. A blockchain block is generated to include the M blockchain transactions and added to a blockchain stored in the storage system.Type: GrantFiled: June 25, 2021Date of Patent: March 14, 2023Assignee: Alipay (Hangzhou) Information Technology Co., Ltd.Inventor: Shikun Tian
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Patent number: 11604707Abstract: A method for execution by a dispersed storage network (DSN). The method begins by obtaining a data object for synchronized storage within a plurality of storage vaults, identifying a plurality of storage vaults, encoding the data object for each storage vault, initiating storage of data slices for each storage vault and interpreting received data slice information from at least some of the storage vaults to determine a number of storage vaults that have successfully stored the corresponding plurality of sets of encoded data slices and when the vault threshold number of storage vaults have not successfully stored the corresponding plurality of sets of encoded data slices within a synchronization timeframe, initiating a rollback process to abandon storage of the data object in the plurality of storage vaults and a store data response to indicate unsuccessful synchronized storage of the data object in the plurality of storage vaults.Type: GrantFiled: December 4, 2017Date of Patent: March 14, 2023Assignee: PURE STORAGE, INC.Inventors: Adam M. Gray, Greg R. Dhuse, Andrew D. Baptist, Ravi V. Khadiwala, Wesley B. Leggette, Scott M. Horan, Franco V. Borich, Bart R. Cilfone, Daniel J. Scholl
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Patent number: 11599471Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing a prefetch processing to prepare an ambient computing device to operate in a low-power state without waking a memory device. One of the methods includes performing, by an ambient computing device, a prefetch process that populates a cache with prefetched instructions and data required for the ambient computing device to process inputs to the system while in the low-power state, and entering the low-power state, and processing, by the ambient computing device in the low-power state, inputs to the system using the prefetched instructions and data stored in the cache.Type: GrantFiled: May 20, 2021Date of Patent: March 7, 2023Assignee: Google LLCInventors: Vinod Chamarty, Lawrence J. Madar, III
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Patent number: 11599273Abstract: An example method for managing a memory device includes a non-volatile memory. The example method further includes providing a first time-stamp to the memory device, wherein the first time-stamp is a power-down time-stamp of the memory device, storing the first time-stamp, associating the first time-stamp with at least one region of the non-volatile memory, providing a second time-stamp to the memory device, wherein the second time-stamp is a subsequent power-up time-stamp of the memory device, associating the second time-stamp with the at least one region of the non-volatile memory, determining a difference time between the first time-stamp and the second time-stamp, and, based on the difference time, performing a refresh operation of the at least one region of the non-volatile memory. Further, a related memory device is disclosed, as well as a method for measuring the off-time of a memory device.Type: GrantFiled: January 29, 2019Date of Patent: March 7, 2023Assignee: Micron Technology, Inc.Inventors: Vincenzo Reina, Alberto Troia
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Patent number: 11599275Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a SPO detector configured to output a detection signal when a SPO is detected, a memory buffer configured to store host data, and a power loss controller configured to, based on the detection signal, receive dump data corresponding to the host data, store the dump data and a dump age corresponding to the dump data, and output the dump data and the dump age to a memory device, wherein the dump age indicates a number of times that different items of host data have been dumped from the memory buffer to the power loss controller, and the power loss controller is configured to control a recovery operation corresponding to the SPO based on the dump age being received from the memory device.Type: GrantFiled: June 2, 2021Date of Patent: March 7, 2023Assignee: SK hynix Inc.Inventors: Jin Pyo Kim, Sang Min Kim, Woo Young Yang, Jun Six Jeong, Seung Hun Ji
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Patent number: 11593020Abstract: Techniques are provided for consistent entity tags with multiple protocol data access. In an example, a file storage system is configured to process data according to file storage protocol(s) and object storage protocol(s). An object storage protocol can utilize entity tags that indicate whether an object (represented with a file in the file storage system) has changed. Where a file storage protocol is utilized to modify a file, an indication may be stored that indicates that the file lacks a valid entity tag. If an object storage operation is made to retrieve an object, and if the object corresponds to a valid entity tag, then that entity tag can be returned as part of the response. If the object does not correspond to a valid entity tag, then the file storage system can generate a new entity tag and return the newly generated entity tag as part of the response.Type: GrantFiled: September 2, 2020Date of Patent: February 28, 2023Assignee: EMC IP HOLDING COMPANY LLCInventor: Takafumi Yonekura
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Patent number: 11593026Abstract: A method includes: receiving, by a computing device, data for storage in a dispersed storage network; writing, by the computing device, the data to a first location; generating, by the computing device, a first pointer to the first location; receiving, by the computing device, updated data that is an updated version of the data; writing, by the computing device, the updated data to a second location; generating, by the computing device, a second pointer to the second location; and deleting, by the computing device, the first pointer at a time after writing the updated data and generating the second pointer.Type: GrantFiled: March 6, 2020Date of Patent: February 28, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jordan Harrison Williams, Benjamin Lee Martin, Ilya Volvovski, Praveen Viraraghavan, Khushbu Patel
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Patent number: 11586356Abstract: A processing device controls delivery of input-output (IO) operations from a host device to a storage system over selected paths through a network, and maintains counts of IO operations for each of a plurality of initiator-target pairs, the initiators being implemented on the host device and the targets being implemented on the storage system, each initiator-target pair being associated with a corresponding subset of the paths. Responsive to detection of at least a threshold number of errors relating to the IO operations for a given one of the initiator-target pairs, the processing device determines whether or not the detected errors satisfy one or more specified conditions based at least in part on the maintained count for that initiator-target pair, and responsive to the detected errors for the given initiator-target pair satisfying the one or more specified conditions, the processing device updates link performance issue information for the given initiator-target pair.Type: GrantFiled: September 27, 2021Date of Patent: February 21, 2023Assignee: Dell Products L.P.Inventors: Vinay G. Rao, Madhu Tarikere
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Patent number: 11588892Abstract: A method for execution by a computing device of a storage network begins by obtaining scoring information for a rebuilding encoded data slices for one or more storage units of a set of storage units of the storage network, where the scoring information includes two or more of a plurality of rebuilding rates, a plurality of input/output rates, a plurality of scores, and a plurality of selection rates. The method continues with determining a rebuilding rate of the plurality of rebuilding rates to utilize for the rebuilding based on the scoring information. The method continues by implementing the rebuilding of the encoded data slices in accordance with the rebuilding rate.Type: GrantFiled: April 29, 2020Date of Patent: February 21, 2023Assignee: PURE STORAGE, INC.Inventors: Ravi V. Khadiwala, Asimuddin Kazi
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Patent number: 11573711Abstract: A method for encrypting data in one or more data blocks is provided. The method receives a first data block to be written to a physical storage that includes one or more physical disks. The method applies a first random tweak to data indicative of the first data block to generate a first encrypted data block, and writes the first encrypted data block and the first random tweak to a first physical block of the physical storage. The method receives a second data block to be written to the physical storage. The method then applies a second random tweak, different than the first random tweak, to data indicative of the second data block to generate a second encrypted data block, and writes the second encrypted data block and the second random tweak to a second physical block of the physical storage.Type: GrantFiled: March 23, 2020Date of Patent: February 7, 2023Assignee: VMware, Inc.Inventors: Wenguang Wang, Eric Knauft, Vamsi Gunturu, Pascal Renauld
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Patent number: 11543969Abstract: According to one embodiment, there is provided a nonvolatile memory including a memory cell array, as input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell array includes a plurality of pages. Each of the one or more intermediate buffers is electrically connected between the memory cell array and the input/output buffer. The control circuit is configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers.Type: GrantFiled: May 27, 2021Date of Patent: January 3, 2023Assignee: Kioxia CorporationInventors: Yoshihisa Kojima, Masanobu Shirakawa, Kiyotaka Iwasaki
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Patent number: 11537316Abstract: Provided herein may be a data storage device and a method of operating the same. The data storage device may include a memory device including a plurality of first data areas and a temporary data area, a buffer memory configured to temporarily store the data received from a host, and a memory controller configured to receive a first write request for writing the data and consecutive logical addresses from the host and write, upon occurrence of a trigger event that requires the data to be written to the memory device, the data to either the temporary data area or a first data area selected based on first data area information included in the first write request, depending on whether a size of the data is less than a preset reference size.Type: GrantFiled: January 22, 2021Date of Patent: December 27, 2022Assignee: SK hynix Inc.Inventor: Chan Ho Ha
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Patent number: 11531600Abstract: A memory image can be captured by generating metadata indicative of a state of volatile memory and/or byte-addressable PMEM at a particular time during execution of a process by an application. This memory image can be persisted without copying the in-memory data into a separate persistent storage by storing the metadata and safekeeping the in-memory data in the volatile memory and/or PMEM. Metadata associated with multiple time-evolved memory images captured can be stored and managed using a linked index scheme. A linked index scheme can be configured in various ways including a full index and a difference-only index. The memory images can be used for various purposes including suspending and later resuming execution of the application process, restoring a failed application to a previous point in time, cloning an application, and recovering an application process to a most recent state in an application log.Type: GrantFiled: October 9, 2020Date of Patent: December 20, 2022Assignee: MEMVERGE, INC.Inventors: Ronald S. Niles, Yue Li, Jun Gan, Chenggong Fan, Robert W. Beauchamp
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Patent number: 11513737Abstract: Data overflows can be prevented in edge computing systems. For example, an edge computing system (ECS) can include a memory buffer for storing incoming data from client devices. The ECS can also include a local storage device. The ECS can determine that an amount of available storage space in the local storage device is less than a predefined threshold amount. Based on determining that the amount of available storage space is less than the predefined threshold amount, the ECS can prevent the incoming data from being retrieved from the memory buffer. And based on determining that the amount of available storage space is greater than or equal to the predefined threshold amount, the ECS can retrieve the incoming data from the memory buffer and store the incoming data in the local storage device. This may prevent data overflows associated with the local storage device.Type: GrantFiled: April 16, 2021Date of Patent: November 29, 2022Assignee: RED HAT, INC.Inventors: Yehuda Sadeh-Weinraub, Huamin Chen, Ricardo Noriega De Soto
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Patent number: 11507510Abstract: In accordance with various aspects of the invention, a recall transaction is issued if a tag filter entry needs to be freed up for an incoming transaction. Directory entries chosen for a recall transaction are pushed into a fully associative structure called victim buffer. If this structure gets full, then an entry is selected from entries inside the victim buffer for the recall.Type: GrantFiled: December 28, 2018Date of Patent: November 22, 2022Assignee: Arteris, Inc.Inventors: Craig Stephen Forrest, David A. Kruckemyer
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Patent number: 11500561Abstract: Methods, systems, and devices for masked training and analysis with a memory array are described. A memory device may operate in a first mode in which a maximum transition avoidance (MTA) decoder for a memory array of the memory device is disabled. During the first mode, the memory device may couple an input node of the MTA decoder with a first output node of a first decoder, such as a first pulse amplitude modulation (PAM) decoder. The memory device may operate in a second mode in which the MTA decoder for the memory array is enabled. During the second mode, the memory device may couple the input node of the MTA decoder with a second output node of a second decoder, such as a second PAM decoder.Type: GrantFiled: May 3, 2021Date of Patent: November 15, 2022Assignee: Micron Technology, Inc.Inventors: Wolfgang Anton Spirkl, Phillip A. Rasmussen, Thomas Hein
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Patent number: 11500591Abstract: Methods and systems for a networked storage system are provided. One method includes transmitting, by a first node, an invalidation request to a second node to invalidate an entry of a storage location cache of the second node, the entry indicating a storage location to write data in response to a write request received by the first node; updating, by the first node, a memory structure at the first node for sending a heartbeat message to disable use of the storage location cache by the second node; and responding, by the first node, to the write request, after a response to disable the use of the storage location cache is received from the second node or a certain duration, T1, has elapsed since the heartbeat message was sent to the second node and no response was received from the second node.Type: GrantFiled: July 28, 2021Date of Patent: November 15, 2022Assignee: NETAPP, INC.Inventors: Sumith Makam, Rahul Thapliyal, Kartik R, Roopesh Chuggani, Abhisar Lnu, Maria Josephine Priyanka S