Abstract: The present disclosure relates to compounds of Formula (I)-(V) as compounds capable of emitting delayed fluorescence and uses of these compounds in organic light-emitting diodes.

Abstract: An imaging apparatus performs a global electronic shutter operation. During an exposure period for acquiring one frame, the imaging apparatus transfers electric charges accumulated in a first period from a photoelectric conversion portion to a holding portion. When a second period has elapsed since an end time of the first period, the holding portion holds both electric charges generated in the first period and electric charges generated in the second period. A plurality of pixels included in the imaging apparatus includes a first pixel and a second pixel each having a different saturation charge quantity of the photoelectric conversion portion included in each pixel.

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

Abstract: An image sensor includes a semiconductor substrate having a plurality of pixel regions arranged in a first direction and a second direction that are parallel to an upper surface of the semiconductor substrate. The first direction is perpendicular to the second direction. A grid structure extends in the first direction and the second direction on the semiconductor substrate to define openings corresponding to a plurality of sub-pixel regions of the plurality of the pixel regions, respectively. Color filters are disposed in the openings of the grid structure, respectively. A protective layer covers sidewalls of the grid structure and bottom surfaces of the color filters. The protective layer includes silicon oxide including carbon (C) or nitrogen (N).

Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.

Abstract: Provided is a back illuminated photoelectric conversion device including a semiconductor substrate that has a first area that is not light-shielded by a light shielding layer, a second area that is light-shielded by the light shielding layer and in which a second pixel is arranged, and a third area that is arranged between the first area and the second area in a plan view. An attenuating member that attenuates a guided light entering the first area and propagating to the second area with the semiconductor substrate as a waveguide is arranged in the third area.

Abstract: An optoelectronic device includes an optical integrated circuit having a first surface and a second surface opposite the first surface. The optical integrated circuit has an optical zone of the first surface of the optical integrated circuit. The device includes an electrically insulating material disposed over the optical integrated circuit, where the electrically insulating material partially covers the first surface so as to expose the optical zone.

Abstract: An image sensor is provided. The image sensor includes a substrate including a first side on which light is incident and a second side opposite the first side; a first separation pattern extending from the second side, the first separation pattern being interposed between unit pixels in the substrate of a light-receiving region and a light-shielding region provided around the light-receiving region; a second separation pattern extending from the first side and overlapping the first separation pattern, the second separation pattern being provided in the substrate of the light-receiving region; and a contact film electrically connected to the first separation pattern, the contact film being provided in the substrate of the light-shielding region. A contact trench which extends from the first side is formed in the light-shielding region of the substrate and exposes the first separation pattern, and the contact film fills at least a part of the contact trench.

Abstract: A back-lit image sensor and a method for manufacturing the back-lit image sensor; the back-lit image sensor comprises a photoreceptor portion and a circuit portion, wherein the photoreceptor portion comprises: a microlens and a light filter incident photons entering the back-lit image sensor first by means of the microlens and then passing through the light filter; a transparent conductive film, which is located below the microlens and the light filter, the incident photons continuing to enter by means of the transparent conductive film; and a first substrate, which is located below the transparent conductive film and which is used for capturing and detecting received photons; a heterojunction is formed between the transparent conductive film and the first substrate.

Abstract: A photosensitive apparatus includes an operating circuit, a first electrode, multiple first photosensitive patterns, a dielectric layer, a second electrode, a spacer layer, a light shielding layer, and at least one micro lens. The first electrode is electrically connected to a first terminal of the operating circuit. The first photosensitive patterns are separated from each other and disposed on the first electrode. Multiple first surfaces of the first photosensitive patterns are electrically connected to the first electrode. The dielectric layer is disposed on the first photosensitive patterns. The second electrode is disposed on the dielectric layer and electrically connected to multiple second surfaces of the first photosensitive patterns through multiple first contact holes of the dielectric layer. The spacer layer is disposed on the second electrode. The light shielding layer is disposed on the spacer layer. The at least one micro lens is disposed above the light shielding layer.

Abstract: Disclosed is a CMOS image sensor with global shutters and a method for fabricating the CMOS image sensor. In one embodiment, a semiconductor device, includes: a light-sensing region; a charge-storage region; a light-shielding structure; and at least one via contact; wherein the charge-storage region is spatially configured adjacent to the light-sensing region in a lateral direction, wherein the light-shielding structure is configured over the charge-storage region in a vertical direction so as to prevent incident light leaking from the light-sensing region to the signal-processing region, wherein the light-shielding structure is configured in an interlayer dielectric (ILD) layer, and wherein the light-shielding structure is simultaneously formed with the at least one via contact.

Abstract: A layout method and a layout system are disclosed. The layout method includes generating a design data comprising an electronic circuit, and generating a design layout by placing a first cell corresponding to the electronic circuit. The first cell includes a first source/drain region, a second source/drain region and a gate electrode, wherein the gate electrode define an odd-numbered track and an even-numbered track. The first cell also includes a first power rail, a first conductive via within the odd-numbered track, a second power rail and a second conductive via within the even-numbered track. The first source/drain region is electrically connected to the first power rail through the first conducive via, and the second source/drain region is electrically connected to the second power rail through the second conducive via.

Abstract: Provided are a solid-state imaging device, a method for manufacturing a solid-state imaging device and an electronic apparatus that produce little crosstalk between adjacent sub-pixels, can reduce the influence of the luminance shading, and can even prevent degradation in the sensitivity at the optical center. A multi-pixel includes a back-side separating part separating a plurality of adjacent sub-pixels from each other, and a lens part including a single microlens allowing light to enter photoelectric converting regions of sub-pixels. Here, the optical center of the microlens is positioned on the location where the back side separating part is formed, and the back side separating part is formed such that at least the optical center region thereof exhibits lower reflection than the other region of the back side separating part.

Abstract: A semiconductor device capable of performing product-sum operation is provided. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. The semiconductor device retains first analog data and reference analog data in the first memory cell and the second memory cell, respectively. A potential corresponding to second analog data is applied to each of them as a selection signal, whereby current depending on the sum of products of the first analog data and the second analog data is obtained. The offset circuit includes a constant current circuit comprising a transistor and a capacitor. A first terminal of the transistor is electrically connected to a first gate of the transistor and a first terminal of the capacitor. A second gate of the transistor is electrically connected to a second terminal of the capacitor.

Abstract: A plurality of photovoltaic junctions for a subpixel may be formed in a semiconductor substrate. After thinning the backside of the semiconductor substrate, at least one transparent refraction structure may be formed on the backside surface of the thinned semiconductor substrate. Each transparent refraction structure has a variable thickness that decreases with a lateral distance from a vertical axis passing through a geometrical center of the second-conductivity-type pillar structures for the subpixel. A subpixel optics assembly including an optical lens may be formed over the at least one transparent refraction structure. Each transparent refraction structure may reduce the tilt angle of light that propagate downward into the photodetectors, and increases total internal reflection of light and increase the efficiency of the photodetectors.

Abstract: The present disclosure relates to a semiconductor device and a fabricating method thereof, the semiconductor device includes a substrate, a plurality of gate structures, a plurality of isolation fins, and at least one bit line. The gate structures are disposed in the substrate, with each of the gate structures being parallel with each other and extending along a first direction. The isolation fins are disposed on the substrate, with each of the isolation fins being parallel with each other and extending along the first direction, over each of the gate structures respectively. The at least one bit line is disposed on the substrate to extend along a second direction being perpendicular to the first direction. The at least one bit line comprises a plurality of pins extending toward the substrate, and each of the pins is alternately arranged with each of the isolation fins along the second direction.

Abstract: A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening.

Abstract: A fin including a bottom portion, a first sacrificial layer disposed over the bottom portion, a first semiconductor layer disposed over the first sacrificial layer, a second sacrificial layer disposed over the first semiconductor layer and a second semiconductor layer disposed over the second sacrificial layer, is formed. The second semiconductor layer protrudes from a first insulating layer. A dummy gate is formed over the second semiconductor layer. A sidewall spacer layer is formed on side faces of the dummy gate. A first dielectric layer is formed over the dummy gate and the sidewall spacer layer. The dummy gate is removed, thereby forming a gate space. The first insulating layer is etched in the gate space, thereby exposing the first semiconductor layer and the first and second sacrificial layers. The first and second sacrificial layers are removed. A gate dielectric layer and a gate electrode layer are formed.

Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.

Abstract: Provided is an insulated gate bipolar transistor power device. The IGBT power device includes a gate dielectric layer located above the two p-type body regions and the n-type drift region between the two p-type body regions, an n-type floating gate located above the gate dielectric layer; a gate located above the gate dielectric layer and the n-type floating gate; an insulating dielectric layer between the gate and the n-type floating gate; a first opening located in the gate dielectric layer, where the n-type floating gate is in contact with one of the two p-type body regions through the first opening to form a p-n junction diode; and a second opening located in the gate dielectric layer, where the n-type floating gate is in contact with the other of the two p-type body regions through the second opening to form the p-n junction diode.