Patents Examined by Nghia Doan
  • Patent number: 9870440
    Abstract: A method for generating a netlist of an FPGA program. The model of the FPGA program is composed of at least two components, each component being assigned a separate partition on the FPGA. An independent build is carried out for each component and an overall classification is generated from the components, wherein the build jobs are automatically started after a trigger event and the trigger event is a saving of a component, the exiting of a component of the design, or a time-controlled, automated initiation of a build.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: January 16, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Heiko Kalte, Dominik Lubeley
  • Patent number: 9866052
    Abstract: Even after the battery reaches the last stage of the end of life, the use can be continued. A charging system includes battery pack and charger. During the charge of lithium-ion secondary battery, charge control unit calculates the full charge capacity maintaining rate, sets a first charge current value on the basis of the full charge capacity maintaining rate, and charges the battery. When lithium-ion secondary battery reaches the last stage of the end of life, charge control unit sets a second charge current value lower than the first charge current value set based on the full charge capacity maintaining rate, and charges the battery.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: January 9, 2018
    Assignee: SANYO ELECTRIC CO., LTD.
    Inventors: Kenichi Honoki, Masato Fujikawa, Shin-Ichi Yuasa
  • Patent number: 9859746
    Abstract: Methods and apparatus for wireless charging are provided. Transmission power transmitted from a wireless power transmitter is received at a power receiver of a wireless power receiver. A battery of the wireless power receiver is charged with the received transmission power. It is determined whether the battery is fully charged. A packet from a communication unit of the wireless power receiver is transmitted to the wireless power transmitter when the battery is fully charged. An auxiliary charge of the battery is performed by receiving strength-reduced transmission power from the wireless power transmitter.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: January 2, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Bum Park, Se-Ho Park, Young-Min Lee
  • Patent number: 9858381
    Abstract: A method for manufacturing a serial link including a channel and a receiver, the link including linear time-invariant elements, the receiver including a continuous-time linear equalizer (CTLE) including a nonlinear block, and a slicer having an input. The method includes: for each of a plurality of candidate CTLE configurations: calculating a first probability density function (PDF), corresponding to a first signal value, at the input of the nonlinear block, calculating a first PDF, corresponding to the first signal value, at the output of the nonlinear block; calculating a second PDF, corresponding to a second signal value, at the input of the nonlinear block, calculating a second PDF, corresponding to the second signal value, at the output of the nonlinear block; and calculating a bit error rate.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: January 2, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventor: Gaurav Malhotra
  • Patent number: 9853007
    Abstract: A processor-implemented method and integrated circuit package are provided. According to an implementation, a method of producing a chip package includes de-populating solder balls at selected locations in a fine pitch package, and providing test pads at the de-populated solder ball locations. In an example implementation, the method comprises receiving and modifying a package design. In an implementation, a row of test pads in an integrated circuit package is provided in a plurality of concentric annular rows, the row of test pads being adjacent an outer row of via-connected solder balls and adjacent an inner row of via-connected solder balls. In an implementation, test pads are located on a PCB-facing surface of the package at a subset of locations opposing at least one via position on a package-facing surface of the PCB. The test pads maintain a large number of signal pins and do not interfere with the via.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: December 26, 2017
    Assignee: MICROSEMI SOLUTIONS (U.S.), INC.
    Inventor: John Plasterer
  • Patent number: 9847657
    Abstract: This battery system includes: a plurality of batteries; a first monitoring unit that receives as input the output of the batteries, compares the output with a prescribed threshold value, and supplies a signal indicating the result; and a second monitoring unit that detects the voltage value of the batteries and supplies a signal indicating the detected voltage value. The battery system is provided with: a first operation mode during which the first monitoring unit and the second monitoring unit are halted; a second operation mode during which the first monitoring unit operates and the second monitoring unit is halted; and a third operation mode during which the first monitoring unit and the second monitoring unit operate.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: December 19, 2017
    Assignee: NEC ENERGY DEVICES, LTD.
    Inventor: Yasushi Hashimoto
  • Patent number: 9846759
    Abstract: A method of global connection routing includes determining a global connection tolerance of a cell for use in a circuit layout, wherein the cell comprises a plurality of pins, and a plurality of routing tracks are defined with respect to the cell. The method further includes determining a number of blocked tracks within the cell. The method further includes comparing the global connection tolerance with the number of blocked tracks. The method further includes adjusting a location of the cell within the circuit layout if the global connection tolerance and the number of blocked tracks fail to satisfy a predetermined condition.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: December 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sheng-Hsiung Chen, Jyun-Hao Chang, Ting-Wei Chiang, Fong-Yuan Chang, I-Lun Tseng, Po-Hsiang Huang
  • Patent number: 9847663
    Abstract: A charging system includes battery pack and charger. During the charge of secondary battery, charge control unit controls charger so that the charger performs constant-current charge at a first charge current, and, when at least one of the following conditions is satisfied, switches the first charge current to a second charge current lower than the first charge current and continues the constant-current charge. The conditions include the condition that the SOC of secondary battery arrives at a threshold SOC value and the condition that the inter-terminal voltage of secondary battery arrives at a threshold inter-terminal voltage. In response to the degree of degradation of secondary battery, the charge control unit drops at least one of the threshold SOC value and the threshold inter-terminal voltage.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: December 19, 2017
    Assignee: SANYO ELECTRIC CO., LTD.
    Inventors: Yukio Nishikawa, Tatsuya Ishibashi
  • Patent number: 9843206
    Abstract: A transformer less battery charger system. In one embodiment, the battery charger system includes input terminals for receiving an AC voltage, output terminals for receiving terminals of a rechargeable battery pack, and a non-isolated DC-DC converter coupled between the input terminals and the output terminals. A device is also coupled somewhere between the input terminals and the output terminals. The device is configured to selectively and indirectly couple the input terminals to the output terminals. More particularly, the device indirectly couples the input terminals to the output terminals when the rechargeable battery pack terminals are received by the output terminals, and the device indirectly decouples the input terminals from the output terminals when the rechargeable battery pack terminals are separated from the output terminals.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: December 12, 2017
    Assignee: Renesas Electronics America Inc.
    Inventors: Tetsuo Sato, Shigeru Maeta, Toshio Kimura, Atsushi Mitamura, Akira Negishi, Gary S. Jacobson
  • Patent number: 9837595
    Abstract: The invention provides a portable electronic system. The portable electronic system includes a semiconductor package. The semiconductor package includes a substrate. A semiconductor die is coupled to the substrate. A thermoelectric device chip is disposed close to the semiconductor die, coupled to the substrate. The thermoelectric device chip is configured to detect a heat energy generated from the semiconductor die and to convert the heat energy into a recycled electrical energy. A power system is coupled to the semiconductor package, configured to store the recycled electrical energy.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: December 5, 2017
    Assignee: MEDIATEK INC.
    Inventors: Long-Kun Yu, Chin-Chiang Chang, Chia-Wei Chi, Chia-Feng Yeh, Tai-Yu Chen
  • Patent number: 9836562
    Abstract: A method for modeling electrostatic discharges. The method may include obtaining a circuit netlist for an integrated circuit. The circuit netlist may describe connection information for various electronic components within the integrated circuit. The method may further include obtaining, by removing a portion of the electronic components from the circuit netlist, a reduced netlist. The method may further include determining, using the reduced netlist, various circuit parameters regarding an electrostatic discharge event for the integrated circuit. The method may further include simulating, using the circuit parameters, a discharge path within the integrated circuit for the electrostatic discharge event.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: December 5, 2017
    Assignee: Oracle International Corporation
    Inventors: Qing He, Wai Chung William Au, Alexander Korobkov
  • Patent number: 9830421
    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. One method includes selecting one or more alignment targets from a design for a specimen. At least a portion of the one or more alignment targets include built in targets included in the design for a purpose other than alignment of inspection results to design data space. At least the portion of the one or more alignment targets does not include one or more individual device features. One or more images for the alignment target(s) and output generated by the inspection subsystem at the position(s) of the alignment target(s) may then be used to determine design data space positions of other output generated by the inspection subsystem in a variety of ways described herein.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: November 28, 2017
    Assignee: KLA-Tencor Corp.
    Inventors: Santosh Bhattacharyya, Bjorn Braeuer, Lisheng Gao
  • Patent number: 9823560
    Abstract: Systems and methods may provide for projection of a plurality of structured light patterns. In one example, the method may include generating a low-resolution pattern image utilizing a returned image, wherein the low-resolution pattern image is an approximation of an image that would have been generated utilizing a low-resolution pattern and generating a high-resolution pattern image utilizing a preprocessed returned image and a preprocessed low-resolution pattern image, wherein high-resolution pattern image is an approximation of an image that would have been generated utilizing a high-resolution pattern.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: November 21, 2017
    Assignee: Intel Corporation
    Inventors: Arie Bernstein, Ziv Aviv
  • Patent number: 9817928
    Abstract: Roughly described, an integrated circuit device has a conductor extending entirely through the substrate, connected on one end to the substrate topside surface and on the other end to the substrate backside surface. In various embodiments the conductor is insulated from all RDL conductors on the backside of the substrate, and/or is insulated from all conductors and device features on any below-adjacent chip in a 3D integrated circuit structure. Methods of fabrication are also described.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: November 14, 2017
    Assignee: SYNOPSYS, INC.
    Inventors: Jamil Kawa, Victor Moroz
  • Patent number: 9819216
    Abstract: Techniques are disclosed for aiding in charging an electronic device using a charging case. The charging case includes a conductive contact and may connect to a conductive contact of the electronic device while still allowing user access to the main connector port of the electronic device. The charging case includes a power module that may receive power from an external power source. The power module may include an inductive coupling coil, photovoltaic cells, or a power cable port. Circuitry within the charging case may control and transmit power from the power module to the electronic device through the conductive contacts. The charging case may include a battery. The charging case may also include a data module for receiving data from an external data source, and the case circuitry may process and transmit data from the data module to the electronic device through the conductive contacts.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: November 14, 2017
    Assignee: Nook Digital, LLC
    Inventors: David Christopher Klawon, William Alan Saperstein, Jason Cinge Wong
  • Patent number: 9793744
    Abstract: A wireless charging system for power tools and other devices includes a charging module, docking frame, and tool holder. When a device is placed on a charging surface of the charging module, the charging module is configured to wirelessly charge the device. The charging module can be mounted within the docking frame or the tool holder via a mounting interface, and the tool holder can be affixed to a rigid surface. The docking frame can also be attached to a rigid surface, or can be mounted within the tool holder as an intermediate piece. The tool holder is configured to support the charging module such that the charging surface is at an angle. This configuration optimally locates the device relative to the charging module and allows the charging surface to act as a resting surface for the device between operations.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 17, 2017
    Assignees: Robert Bosch Tool Corporation, Robert Bosch GmbH
    Inventors: Yizhuo Zhang, Marco Laubach, Steve Cole
  • Patent number: 9792399
    Abstract: An integrated circuit hierarchical design tool apparatus comprises a processor arranged to support a block coupling reconfiguration unit. The block coupling reconfiguration unit is capable of receiving block layout data comprising block placement, terminal location data and intra-block connectivity data. The block coupling reconfiguration unit is arranged to identify from the block layout data a block placement level block having a terminal respectively coupled to a plurality of other block placement level blocks by a plurality of nets, and to provide the block with an additional terminal capable of providing the same function as the terminal. The block coupling reconfiguration unit is also arranged to replace a net of the plurality of nets that is coupled to the terminal with a replacement net coupled to the additional terminal.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: October 17, 2017
    Assignee: NXP USA, Inc.
    Inventors: Asher Berkovitz, Inbar Ben-Porat, Yossy Neeman
  • Patent number: 9768630
    Abstract: A battery charging circuit includes a power management IC, a controller, and a feedback circuit. The power management IC is configured to manage the power charging to a battery. The controller is configured to provide a preset value of current and a preset value of voltage. The feedback circuit is coupled to the power management IC and the controller and the battery. The feedback circuit compares the preset value of current with a charging current to the battery, and compares the preset value of voltage with a charging voltage to the battery to obtain results of comparison, and provides a feedback signal to the power management IC according to the comparisons. The power management IC decreases or increases power output upon the comparisons.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: September 19, 2017
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Yu-Hu Yan
  • Patent number: 9753895
    Abstract: A method and a corresponding system for process variation analysis of an integrated circuit are provided. A netlist is generated describing electronic devices of an integrated circuit in terms of device parameters and process parameters. The process parameters include local process parameters individual to the electronic devices and global process parameters common to the electronic devices. Critical electronic devices are identified having device parameters with greatest contributions to a performance parameter of a design specification of the integrated circuit. Sensitivity values are determined for the global process parameters and local process parameters of the critical electronic devices. The sensitivity values represent how sensitive the one or more performance parameters are to variations in the global and local process parameters of the critical electronic devices. Monte Carlo (MC) samples are sorted based on the sensitivity values.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: September 5, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Cheng Kuo, Kmin Hsu, Wei-Yi Hu, Wei Min Chan, Jui-Feng Kuan
  • Patent number: 9727685
    Abstract: At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received. The design comprises a functional cell. A first substitute functional cell for a first value of shift of a set of routing tracks respective to the boundary of the functional cell is provided. The first substitute functional cell comprises at least one pin moved by an amount of the first value. A determination is made as to whether an amount of shift of the set of routing tracks corresponds to the first value. The functional cell is replaced with the first substitute functional cell in response to a determination that the amount of shift of the set of routing tracks corresponds to the first value.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: August 8, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Lei Yuan, Yan Wang, Chenchen Wang, Jongwook Kye