Patents Examined by Ratisha Mehta
  • Patent number: 11696511
    Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (FL) interfaces with a first metal oxide (Mox) layer and second metal oxide (tunnel barrier) to produce perpendicular magnetic anisotropy (PMA) in the FL. In some embodiments, conductive metal channels made of a noble metal are formed in the Mox that is MgO to reduce parasitic resistance. In a second embodiment, a discontinuous MgO layer with a plurality of islands is formed as the Mox layer and a non-magnetic hard mask layer is deposited to fill spaces between adjacent islands and form shorting pathways through the Mox. In another embodiment, end portions between the sides of a center Mox portion and the MTJ sidewall are reduced to form shorting pathways by depositing a reducing metal layer on Mox sidewalls, or performing a reduction process with forming gas, H2, or a reducing species.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: July 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sahil Patel, Guenole Jan, Ru-Ying Tong, Vignesh Sundar, Dongna Shen, Yu-Jen Wang, Po-Kang Wang, Huanlong Liu
  • Patent number: 11676867
    Abstract: Methods of manufacturing a semiconductor structure are provided. One of the methods includes the following operations. A substrate is received, and the substrate includes a first conductive region and a second conductive region. A first laser anneal is performed on the first conductive region to repair lattice damage. An amorphization is performed on the first conductive region and the second conductive region to enhance silicide formation to a desired phase transformation in the subsequent operations. A pre-silicide layer is formed on the substrate. A thermal anneal is performed to the substrate to form a silicide layer from the pre-silicide layer. A second laser anneal is performed on the first conductive region and the second conductive region.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Cheng-Yi Peng, Ching-Hua Lee, Clement Hsingjen Wann, Yu-Ming Lin
  • Patent number: 11677061
    Abstract: A semiconductor device includes a substrate including a first region and a second region that are arranged in a first direction that is parallel to an upper surface of the substrate; a separation layer provided on the first region of the substrate; a high electron mobility transistor (HEMT) device overlapping the separation layer in a second direction that is perpendicular to the upper surface of the substrate; a light-emitting device provided on the second region of the substrate; and a first insulating pattern covering a side surface of the HEMT device, wherein the first insulating pattern overlaps the separation layer in the second direction.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kiho Kong, Junhee Choi, Jinjoo Park, Joohun Han
  • Patent number: 11670571
    Abstract: Semiconductor chip package device and semiconductor chip package method are provided. The semiconductor chip package device includes: a lead frame, chips, an encapsulating layer, and an electroplating layer. The lead frame includes a first surface, a second surface, first grooves, second grooves, and third grooves. The first grooves are connected to the second grooves to form through holes and the third grooves disposed at ends of the lead frame. The chips are electrically connected to the lead frame. The encapsulating layer is formed by using an encapsulating material to encapsulate the chips and at least a portion of the lead frame. The first grooves are filled with the encapsulating material. The electroplating layer is disposed on the second surface of the lead frame, and extends into the third grooves or into the third grooves and the second grooves.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 6, 2023
    Assignee: TONGFU MICROELECTRONICS CO., LTD.
    Inventor: Lei Shi
  • Patent number: 11658262
    Abstract: A method for manufacturing a light emitting device is provided. The method for manufacturing the light emitting device includes: providing a substrate with light emitting units disposed thereon; attaching the light emitting units to a carrier; removing the substrate; and transferring a portion of the light emitting units from the carrier to a driving substrate.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: May 23, 2023
    Assignee: Innolux Corporation
    Inventors: Kai Cheng, Tsau-Hua Hsieh, Jian-Jung Shih, Fang-Ying Lin, Hui-Chieh Wang, Wan-Ling Huang
  • Patent number: 11641008
    Abstract: A light emitting device including a first light emitting cell, a second light emitting cell, and a third light emitting cell each including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, pads electrically connected to the first, second, and third light emitting cells, a first wavelength converter configured to convert a wavelength of light emitted from the first light emitting cell into a first wavelength, and a second wavelength converter configured to convert a wavelength of light emitted from the second light emitting cell into a second wavelength longer than the first wavelength, in which the first light emitting cell has a larger area than the third light emitting cell, and the second light emitting cell has a larger area than the first light emitting cell.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: May 2, 2023
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Chung Hoon Lee, Sung Su Son, Jong Ik Lee, Jae Hee Lim, Motonobu Takeya, Seung Sik Hong
  • Patent number: 11637217
    Abstract: A method of manufacturing a light emitting device is provided. The method includes providing a substrate, disposing a plurality of light emitting elements on the substrate, disposing an insulating layer on the plurality of light emitting elements, patterning the insulating layer to form a partition wall defining a plurality of cavities corresponding to the plurality of light emitting elements, filling a light conversion ink in at least a part of the cavities, and baking the light conversion ink, wherein the partition wall is configured to block the light conversion ink from overflowing in the step of filling the light conversion ink in at least the part of the cavities.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 25, 2023
    Assignee: InnoLux Corporation
    Inventors: Hsiao-Lang Lin, Tsung-Han Tsai
  • Patent number: 11626530
    Abstract: A method of transferring micro-light emitting diodes is provided. The method includes preparing a transfer substrate including a first groove, a second groove, and a third groove; forming a first transfer prevention film on the second groove and forming a second transfer prevention film on the third groove; transferring, into the first groove, a first micro-light emitting diode configured to emit a first color light; removing the first transfer prevention film formed on the second groove; transferring, into the second groove, a second micro-light emitting diode configured to emit a second color light; removing the second transfer prevention film formed on the third groove; and transferring, into the third groove, a third micro-light emitting diode configured to emit a third color light.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: April 11, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seogwoo Hong, Junsik Hwang, Hyunjoon Kim, Joonyong Park, Kyungwook Hwang
  • Patent number: 11621251
    Abstract: A device for collecting and transferring light emitting elements of microscale size includes a non-magnetic plate, a plurality of magnetic probes, and a magnetic plate. The non-magnetic plate defines through holes. Each of the probes is fixed in one through holes. The magnetic plate is on a surface of the non-magnetic plate and closes one opening of each of the through holes. The magnetic plate generates a magnetic field, so that each of the probes magnetically attracts one light emitting element. A method for making the transfer device and a method for transferring light emitting elements using the transfer device are also disclosed.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 4, 2023
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Po-Liang Chen, Yung-Fu Lin, Jung-Hua Lee, Huihsien Tien
  • Patent number: 11616180
    Abstract: A light emitting device includes a base, a first external terminal, a second external terminal, a plurality of wirings respectively electrically connecting the first external terminal and the second external terminal, and a plurality of light emitting elements each electrically connected to a corresponding one of the wirings. The wirings include a first wiring connecting the first external terminal and the second external terminal at a smallest distance, a second wiring longer than the first wiring, and a third wiring longer than the second wiring. The first, second, and third wirings have a substantially equal electric resistance. At least two of the first, second and third wirings are each provided with at least two of the light emitting elements with an average width in an intermediate region between adjacent ones of the light emitting elements being smaller than an average width in a region other than the intermediate region.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: March 28, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Masaaki Katsumata, Koji Taguchi, Toshiaki Moriwaki
  • Patent number: 11616020
    Abstract: A semiconductor device includes a transistor stack. The transistor stack has a plurality of transistors that are stacked over a substrate. Each of the plurality of transistors includes a channel region stacked over the substrate and extending in a direction parallel to the substrate, a gate structure stacked over the substrate and surrounding the channel region of each of the plurality of transistors, and source/drain (S/D) regions stacked over the substrate and further positioned at two ends of the channel region of each of the plurality of transistors. The semiconductor device also includes one or more conductive planes formed over the substrate. The one or more conductive planes are positioned adjacent to the transistor stack, span a height of the transistor stack, and are electrically coupled to the transistor stack.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: March 28, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Lars Liebmann, Jeffrey Smith, Anton J. deVilliers, Kandabara Tapily
  • Patent number: 11616165
    Abstract: The present disclosure provides a method for manufacturing an electronic device. First, a plurality of light-emitting elements is provided on a first substrate. Then, at least one of the plurality of light-emitting elements is transferred from the first substrate to a second substrate by a transferring head. The transferring head includes an electrode and a cantilever supporting the electrode, and the cantilever includes a U-shaped portion.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: March 28, 2023
    Assignee: InnoLux Corporation
    Inventors: Hui-Chieh Wang, Tsau-Hua Hsieh, Fang-Ying Lin
  • Patent number: 11611021
    Abstract: A light emitting device including a first light emitting cell, a second light emitting cell, and a third light emitting cell each including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, pads electrically connected to the first, second, and third light emitting cells, a first wavelength converter configured to convert a wavelength of light emitted from the first light emitting cell into a first wavelength, and a second wavelength converter configured to convert a wavelength of light emitted from the second light emitting cell into a second wavelength longer than the first wavelength, in which the first light emitting cell has a larger area than the third light emitting cell, and the second light emitting cell has a larger area than the first light emitting cell.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: March 21, 2023
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Chung Hoon Lee, Sung Su Son, Jong Ik Lee, Jae Hee Lim, Motonobu Takeya, Seung Sik Hong
  • Patent number: 11610935
    Abstract: Panels of LED arrays and LED lighting systems are described. A panel includes a substrate having a top and a bottom surface. Multiple backplanes are embedded in the substrate, each having a top and a bottom surface. Multiple first electrically conductive structures extend at least from the top surface of each of the backplanes to the top surface of the substrate. Each of multiple LED arrays is electrically coupled to at least some of the first conductive structures. Multiple second conductive structures extend from each of the backplanes to at least the bottom surface of the substrate. At least some of the second electrically conductive structures are coupled to at least some of the first electrically conductive structures via the backplane. A thermal conductive structure is in contact with the bottom surface of each of the backplanes and extends to at least the bottom surface of the substrate.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: March 21, 2023
    Assignee: Lumileds LLC
    Inventors: Tze Yang Hin, Qing Xue
  • Patent number: 11611024
    Abstract: A display device includes a substrate and pixels. The substrate has an intermediate region and a peripheral region. Each of the pixels includes sub-pixels. Each of the sub-pixels includes a pad group and a light emitting diode (LED) element. The pad group has a first pad and a second pad. The LED element is electrically connected to the first pad and the second pad. The pixels include standard pixels disposed in the intermediate region and peripheral pixels disposed in the peripheral region. The first pads and the second pads of the pad groups of the sub-pixels of each of the standard pixels are arranged in a first direction. The peripheral pixels include a first peripheral pixel. The first pads and the second pads of the pad groups of the sub-pixels of the first peripheral pixel are arranged in a second direction, and the first direction crosses over the second direction.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: March 21, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shang-Jie Wu, Yu-Chieh Kuo, He-Yi Cheng, Che-Chia Chang, Yi-Jung Chen, Yi-Fan Chen, Yu-Hsun Chiu, Mei-Yi Li
  • Patent number: 11611027
    Abstract: A semiconductor device includes a substrate including a first region and a second region that are arranged in a first direction that is parallel to an upper surface of the substrate; a separation layer provided on the first region of the substrate; a high electron mobility transistor (HEMT) device overlapping the separation layer in a second direction that is perpendicular to the upper surface of the substrate; a light-emitting device provided on the second region of the substrate; and a first insulating pattern covering a side surface of the HEMT device, wherein the first insulating pattern overlaps the separation layer in the second direction.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: March 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kiho Kong, Junhee Choi, Jinjoo Park, Joohun Han
  • Patent number: 11605755
    Abstract: A display including a base, a plurality of pixels disposed on the base in rows and columns, at least one of the pixels including a first interconnect and a plurality of second interconnects, and a plurality of mounting portions on which a plurality of sub-pixels is to be mounted, in which a first portion of each of the plurality of mounting portions is electrically connected to the first interconnect, a second portion of each of the plurality of mounting portions is electrically connected to one of the second interconnects, and at least one of the plurality of sub-pixels mounted on the plurality of mounting portions is configured to emit light of different wavelength.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 14, 2023
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Motonobu Takeya, Sung Su Son, Seung Sik Hong
  • Patent number: 11605709
    Abstract: In an embodiment, an integrated circuit (IC) device comprises a semiconductor substrate, an isolation region and an active region disposed on the semiconductor substrate, a gate stack disposed over the active region, and a source and a drain disposed in the active region and interposed by the gate stack in a first direction. The active region is at least partially surrounded by the isolation region. A middle portion of the active region laterally extends beyond the gate stack in a second direction that is perpendicular to the first direction.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Hung Kao, Chi-Feng Huang, Fu-Huan Tsai, Victor Chiang Liang
  • Patent number: 11594594
    Abstract: A method for fabricating a semiconductor device includes forming an upper structure in which a bottom electrode, a dielectric layer, a top electrode and a plasma protection layer are sequentially stacked on a lower structure, exposing the upper structure to a plasma treatment, and exposing the plasma-treated upper structure and the lower structure to a hydrogen passivation process.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: February 28, 2023
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Patent number: 11588139
    Abstract: Disclosed herein are light emitting device that emit highly circularly polarized light. These devices may be used to form a dot-matrix display or an electronic information display comprised of a series of photopolymerizable, chiral liquid crystalline layers that can be solvent cast on a substrate. The mixture of chiral materials in each successive layer may be blended in such a way that each layer has the same chiral pitch and may also be blended so that the ordinary and extraordinary refractive indices in each layer match the other layers such that the complete assembly of layers will optically function as a single relatively thick layer of chiral liquid crystal. The chiral nematic material in each layer can spontaneously adopt a helical structure with a helical pitch. Further disclosed are pixel structures that not only emit light with brightness and chromaticity information, but also depth of focus information as well.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: February 21, 2023
    Assignee: RED BANK TECHNOLOGIES, LLC
    Inventors: Gene C. Koch, John N. Magno