Abstract: An apparatus and method for maximizing buffer utilization in an I/O controller using credit management logic contained within the I/O controller. The credit management logic keeps track of the number of memory credits available in the I/O controller and communicates to a chipset connected to the I/O controller the amount of available memory credits. The chipset may then send an amount of data to the I/O controller equivalent to or less than the communicated available amount of memory credits to reduce the occurrence of a “retry” event. The amount of available memory credits is determined by comparing the available memory in each buffer within the I/O controller and designating that the “available” amount of memory for the I/O controller is an amount equivalent to the amount of memory contained in the buffer with the least amount of available memory. This “available” amount of I/O controller memory may then be converted into memory credits and communicated to the chipset.

Abstract: An information processing apparatus includes an acquisition unit configured to acquire, from a plurality of image forming apparatuses, application information indicating a type of each application program installed on the plurality of image forming apparatuses, an application selection receiving unit configured to receive selection of an application program corresponding to the acquired application information, a setting information selection receiving unit configured to receive selection of setting information used in the application program whose selection has been received, an apparatus selection receiving unit configured to receive selection of an image forming apparatus as a destination to which to transmit the setting information from among image forming apparatuses installed with the application program whose selection has been received, and a transmission control unit configured to control processing for transmitting, to the image forming apparatus whose selection has been received, the setting inform

Abstract: In general, in one aspect, the disclosure describes a system including multiple programmable processing units, a dedicated hardware multiplier, and at least one bus connecting the multiple processing units and multiplier.

Abstract: The present invention provides a highly convenient removable device and a startup method. A hub division unit 31 in a single composite device 2 allocates data exchange with the computer 1 side a plurality of devices, thereby easily realizing a plurality of functions. When connected to a USB, a recognition control unit 32 returns a signal representing a CD-ROM in a simulated manner in response to inquiry about the type of the device from the host side. When a device is mounted, a desired processing such as a program execution described in the script is automatically performed without installing a resident program for detecting a device mounting in advance in the computer side.

Abstract: A system for managing a circular buffer memory includes a number of data writers, a number of data readers, a circular buffer memory; and logic configured to form a number of counters, form a number of temporary variables from the counters, and allow the data writers and the data readers to simultaneously access locations in the circular buffer memory determined by the temporary variables.

Abstract: A secure communication channel between first and second radio frequency communication devices is indicated by the synchronized indicators on each of the two devices. The indicator may be a light or speaker. After a secure channel is established, the indicators may be simultaneously operated so that a user may definitively and positively determine that the two devices are securely connected to each other. Any interloper devices would not be indicating on the same pattern and thereby be identified.

Abstract: According to the present invention, is allowed to store, in a hard disk drive, only a driver and an application which are necessary for a peripheral device connected a personal computer, the area in use of the hard disk drive is reduced.

Abstract: In one embodiment, the invention relates to a serial line circuit that comprises a serial information (SI) bus and at most two isolators interposed between a pair of programmable devices. In the TRANSMIT direction, a first programmable device is configured to multiplex serial data received from a plurality of serial UARTs and to route such data to the second programmable device over the SI bus and through a first isolator. In the RECEIVE direction, the second programmable device is configured to sample data from a plurality of serial interconnects and to route the sampled data to the first programmable device. The sampled data is routed over the SI bus and through a second isolator. The data transmission over the SI bus is in accordance with a proprietary serial transmission protocol described below.

Abstract: In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host comprises at least one address space mapped, at least in part, to a plurality of memory locations in a memory system of the host. The DMA controller is configured to perform DMA transfers between the first interface circuit and the address space, and the DMA controller is further configured to perform DMA transfers between a first plurality of the plurality of memory locations and a second plurality of the plurality of memory locations.

Abstract: Systems and methods for designing data structures are provided. In one embodiment, an asynchronous first-in-first-out (FIFO) data structure may include, for example, a FIFO memory having a depth d in which d is an integer and a code generator coupled to the FIFO memory. The code generator may provide, for example, a first code sequence of length 2d. The first code sequence may have a circular property and a Hamming length of one for any two consecutive codes of the first code sequence. The first code sequence may be generated from a second code sequence by removing one or more pairs of mirrored codes of the second code sequence.

Abstract: The present invention provides a communication system comprising a Master unit (1) and at least one Client unit (3), means to automatically establish a wireless bi-directional connection between said Client unit and said Master unit when they are close together; and means to automatically configure a communication interface (5) between said Master unit and said Client unit after connection is established. The invention thus enables systems with different protocols to find and communicate via said configured communication interface (5).

Abstract: A method, apparatus and program storage device for managing dataflow through a processing system is disclosed. A buffer monitor maintains and monitors a buffer full threshold to control the write throughput to a data bus.

Abstract: A 32-word command IOCB format is disclosed. A conventional 8-word format is supported, although in both cases 32-word command IOCBs are used. When the conventional 8-word format is used, the host sets the LE bit=1 and writes a conventional 8-word command IOCB into words 0-7 of the 32-word command IOCB. The firmware performs a DMA operation and reads the LE bit. With the LE bit=1, the firmware knows to read only words 0-7. When the new 32-word format is used, the host sets the LE bit=0 and writes a 32-word IOCB command into the 32-word command IOCB, including command and response buffer pointers, one or more data buffer pointers, and perhaps the command buffer. The firmware performs a DMA operation and reads the LE bit. With the LE bit=0, the firmware knows to read all 32 words of the command IOCB.

Abstract: A data storage system has a chassis and a pair of printed circuit boards disposed in the chassis. Each one of the pair of printed circuit boards has disposed thereon a processor, a translator controlled by the processor, a SAS expander having a bidirectional front end port and multiple bidirectional backend ports, and an expansion port, and a SAS controller coupled between the translator and the expander. The system also has an interposer printed circuit board disposed in the chassis, and multiple multiplexers disposed on the interposer printed circuit board. Each one of the multiplexers has a pair of bidirectional front end ports and a pair of bidirectional back end ports. A first one of the pair of bidirectional front end ports is connected to a corresponding backend port of the SAS expander disposed on a first one of the pair of storage processor printed circuit boards.

Abstract: In one embodiment, a direct memory access (DMA) controller comprises a transmit control circuit, an offload engine, and a receive control circuit. The transmit control circuit is configured to read first DMA data from an address space in a host. Coupled to receive the first DMA data from the transmit control circuit, the offload engine is configured to perform at least a first operation on the first DMA data to produce a result. The offload engine is configured to at least start performing the first operation during a DMA transfer that provides the first DMA data to the offload engine. Coupled to the offload engine to receive the result, the receive control circuit is configured to write the result to the address space in the host according to a DMA descriptor data structure that describes the DMA transfer.

Abstract: A method for establishing a wireless connection between a first wireless device provided in a computer and a second wireless device, wherein group information that identifies the first wireless device is created and set for the first wireless device. The group information is transmitted to the second wireless device and is set for it. The first wireless device creates identification information that identifies the second wireless device with the group information to set it for the second wireless device. The first wireless device uses both of the group information and identification information to specify the second wireless device.

Abstract: A write request is received from a host, to write data from memory to storage. The request indicates whether or not to compress the data. The data is either compressed or not compressed, as indicated by the request, prior to sending the data to the storage. Other embodiments are also disclosed and claimed.

Abstract: A system and method for managing multiple information handling systems using embedded control logic are disclosed. An information handling system includes a first port for receiving first analog video signals and embedded control logic operably coupled to the first port. The embedded control logic selects either the first analog video signals received by the first port or second analog video signals generated by the information handling system. A second port operably coupled to the embedded control logic transmits at least one of the first and second analog video signals to a master controller operably coupled to the information handling system.

Abstract: A memory control apparatus and method for operating a plurality of digital signal processors (DSPs) using a single memory slot and buffer are provided. Exemplary embodiments provide at least one DSP for processing different signals, a flash memory that can record and reproduce a digital signal, a plurality of selection switches located on signal lines between the DSP and the flash memory for switching the signals, a three-state buffer that selectively outputs insert information of the memory to the DSPs according to a control signal, a control unit for providing the control signal for controlling switching of the signals, and a key input unit for determining input/output operation modes. The control unit records and reproduces the data in the flash memory according to the operation mode determined through the key input unit.

Abstract: An approach is provided for configuring telemetry devices over a wireless network is disclosed. A client (e.g., web browser application) communicates with a fleet and asset management system to obtain information about a plurality of objects (vehicle or asset). In response to the user input, the client transmits the user input to the fleet and asset management, wherein the fleet and asset management generates a configuration message based on the user input for transmission over the wireless network to the one telemetry device for configuring an input/output (I/O) port of the telemetry device. The I/O port is coupled to a corresponding one of the objects. The telemetry device sets parameters relating to the I/O port according to the configuration message.