Abstract: First lithography and etching are carried out on a semiconductor structure to provide a first intermediate semiconductor structure having a first set of surface features corresponding to a first portion of desired fin formation mandrels. Second lithography and etching are carried out on the first intermediate structure, using a second mask, to provide a second intermediate semiconductor structure having a second set of surface features corresponding to a second portion of the mandrels. The second set of surface features are unequally spaced from the first set of surface features and/or the features have different pitch. The fin formation mandrels are formed in the second intermediate semiconductor structure using the first and second sets of surface features; spacer material is deposited over the mandrels and is etched back to form a third intermediate semiconductor structure having a fin pattern. Etching is carried out on same to produce the fin pattern.

Abstract: A device for manufacturing a SiC substrate, in which the occurrence of a work-affected layer is reduced, or from which a work-affected layer is removed, comprises: a main container which can accommodate a SiC substrate and which generates, by heating, a vapor pressure of a vapor-phase species including elemental Si and a vapor-phase species including elemental C in an internal space; and a heating furnace for accommodating the main container, generating a vapor pressure of the vapor-phase species including elemental Si in the internal space, and heating so that a temperature gradient is formed; the main container having an etching space formed by causing a portion of the main container disposed on the low-temperature side of the temperature gradient and the SiC substrate to face each other in a state in which the SiC substrate is disposed on the high-temperature side of the temperature gradient.

Abstract: Various embodiments may provide a method of fabricating a meta-lens structure. The method may include forming a first dielectric layer in contact with a silicon wafer. The method may also include forming a second dielectric layer in contact with the first dielectric layer. A refractive index of the second dielectric layer may be different from a refractive index of the first dielectric layer. The method may further include, in patterning the second dielectric layer. The method may additionally include removing at least a portion of the silicon wafer to expose the first dielectric layer.

Abstract: A substrate processing method includes: providing a substrate including a mask; forming a film on the mask; forming a reaction layer on a surface layer of the film; and removing the reaction layer by applying energy to the reaction layer.

Abstract: An etching method for selectively etching a silicon oxide film on a wafer surface that includes the silicon oxide film and a silicon nitride film includes: a surface layer removal process including: etching the silicon oxide film at a first etching rate and removing a surface modification layer covering on the silicon nitride film; and an etching process including: etching the silicon oxide film at a second etching rate. The first etching rate is smaller than the second etching rate.

Abstract: A polishing liquid containing: abrasive grains; a first nitrogen-containing compound; a second nitrogen-containing compound; and water, in which the first nitrogen-containing compound contains at least one selected from the group consisting of (I) a compound having an aromatic ring containing one nitrogen atom in the ring and a hydroxyl group, (II) a compound having an aromatic ring containing one nitrogen atom in the ring and a functional group containing a nitrogen atom, (III) a compound having a 6-membered ring containing two nitrogen atoms in the ring, (IV) a compound having a benzene ring and a ring containing a nitrogen atom in the ring, and (V) a compound having a benzene ring to which two or more functional groups containing a nitrogen atom are bonded, and an HLB value of the second nitrogen-containing compound is 7 or more.

Abstract: The present invention provides a manufacturing method of a semiconductor chip, in which the manufacturing yield is excellent, and a kit. According to the present invention, a manufacturing method of a semiconductor chip includes Process 1 of forming an insulating layer on a base material, Process 2 of forming a patterned resist film on the insulating layer, Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask, Process 4 of removing the patterned resist film, Process 5 of filling the opening portion of the insulating layer with metal, and Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal.

Abstract: The present disclosure provides various embodiments of an improved wet atomic layer etching (ALE) process. More specifically, the present disclosure provides various embodiments of methods that improve a wet ALE process by providing a dynamic ALE cycle timing schedule that balances throughput and etch rate with post-etch surface roughness. As described in more detail below, the methods disclosed herein may adjust the purge timing between ALE cycles and/or between individual surface modification and selective dissolution steps to provide a desired throughput, etch rate and/or post-etch surface roughness in a wet ALE process.

Abstract: A method for fabricating a device having a cavity, includes: obtaining a device wafer including a first substrate and a device structure formed on the first substrate, depositing a first dielectric layer on the device wafer, etching the first dielectric layer to expose at least a part of the device structure and a part of the first substrate, depositing, after the etching, a second dielectric layer on the device wafer and the first dielectric layer, performing a surface treatment on a surface of the second dielectric layer, obtaining a second substrate, and bonding the second substrate with the second dielectric layer on the device wafer, thereby forming the cavity between the second substrate and the device wafer.

Abstract: There is provide a technique that includes: etching a base on a surface of a substrate by performing a cycle a predetermined number of times, the cycle including: (a) forming a layer on a surface of the base by supplying a modifying agent to the base; and (b) causing a reaction between a halogen-containing radical and the base by supplying a halogen-containing gas to the layer such that the layer reacts with the halogen-containing gas to generate the halogen-containing radical.

Abstract: Provided is a plasma processing method capable of improving an etching selectivity of a material to be etched with respect to a mask material and reducing a roughness of a side wall of a mask pattern. The plasma processing method of selectively depositing a deposition film on the mask material with respect to the material to be etched includes controlling an etching parameter so that an incubation time of the mask material is shorter than an incubation time of the material to be etched.

Abstract: A polishing composition used in wafer polishing process for eliminating protrusion around laser mark, thereby achieving a flat polished surface, as well as a wafer polishing method using the polishing composition. A post-polishing composition for elimination of a laser mark remaining after polishing of silicon wafer with a primary polishing composition containing silica particles, water, and a basic compound, the post-polishing composition including silica particles, water, a tetraalkylammonium ion, and a water-soluble polymer, wherein the mass ratio of the tetraalkylammonium ion to SiO2 of the silica particles is 0.200 to 1.000:1; the mass ratio of SiO2 dissolved in the polishing composition to SiO2 of the silica particles is 0.100 to 1.500:1; and the mass ratio of the water-soluble polymer to SiO2 of the silica particles is 0.005 to 0.05:1. The silica particles have an average primary particle diameter of 1 nm to 100 nm.

Abstract: A substrate processing method includes an operation for holding a substrate in a horizontal position, the substrate including an amorphous silicon layer having a surface on which an altered layer derived from dry etching is formed, an operation for irradiating the altered layer with ultraviolet rays to reform the altered layer into a reformed layer, and an operation for supplying a chemical solution to the amorphous silicon layer having the reformed layer on the surface to perform wet etching on the amorphous silicon layer. This improves the efficiency of the wet etching on the amorphous silicon layer.

Abstract: A plasma processing apparatus 1 that performs, on a wafer 16 in which a multilayer film in which an insulating film and a film to be processed containing a metal are alternately laminated is formed on a substrate, plasma etching of the film to be processed, includes: a processing chamber 10 which is disposed inside a vacuum container; a sample stage 14 which is disposed inside the processing chamber and on which the wafer is placed; a detection unit 28 which detects reflected light obtained by the wafer reflecting light emitted to the wafer; a control unit 40 which controls plasma processing on the wafer; and an end point determination unit 30 which determines an etching end point of the film to be processed based on a change in an amplitude of vibration in a wavelength direction of a light spectrum of the reflected light, and the control unit receives determination of the end point made by the end point determination unit and stops the plasma processing on the wafer.

Abstract: Methods are provided for the fabrication of microneedles. Microneedles fabricated according to the herein described methods will generally be constructed of multiple lengths of wire winded together, brazed and further manipulated to include a reversible engagement feature. The subject microneedles may find use in a variety of applications and, among other purposes, the reversible engagement feature of such a microneedle may by employed in implanting an implantable device into a biological tissue. Also provided are methods of inserting an implantable device into a biological tissue having an outer membrane. The subject methods may include ablating a section of the outer membrane and inserting the implantable device through the ablated section of outer membrane, including e.g., where the implantable device is inserted using a microneedle including e.g., those microneedles for which methods of fabrication are provided herein.

Abstract: A polishing composition includes an abrasive; a pH adjuster; a barrier film removal rate enhancer; a low-k removal rate inhibitor; an azole-containing corrosion inhibitor; and a hard mask removal rate enhancer. A method of polishing a substrate includes the steps of: applying the polishing composition described herein to a surface of a substrate, wherein the surface comprises ruthenium or a hard mask material; and bringing a pad into contact with the surface of the substrate and moving the pad in relation to the substrate.

Abstract: A composition suitable for chemical mechanical polishing a substrate can comprise abrasive particles, a multi-valent metal borate, at least one oxidizer and a solvent. The composition can polish a substrate with a high material removal rate and a very smooth surface finish.

Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.

Abstract: A plasma processing apparatus according to an exemplary embodiment includes a processing container, a stage, a dielectric plate, an upper electrode, an introduction part, a driving shaft, and an actuator. The stage is provided in the processing container. The dielectric plate is provided above the stage via a space in the processing container. The upper electrode has flexibility, is provided above the dielectric plate, and provides a gap between the dielectric plate and the upper electrode. The introduction part is an introduction part of radio frequency waves that are VHF waves or UHF waves, is provided at a horizontal end portion of the space. The driving shaft is coupled to the upper electrode on a central axial line of the processing container. The actuator is configured to move the driving shaft in a vertical direction.

Abstract: Process flows and methods are provided for recessing a fill material within openings formed within a patterned substrate. The openings are formed within a multilayer stack comprising a target material layer and one or more additional material layers, which overly and differ from the target material layer. After the openings are formed within the multilayer stack, a grafting material comprising a solubility-shifting agent is selectively deposited within the openings, such that the grafting material adheres to the target material layer without adhering to the additional material layer(s) overlying the target material layer. Next, a fill material is deposited within the openings and the solubility-shifting agent is activated to change the solubility of a portion of the fill material adjacent to and surrounding the grafting material. Then, a wet development process is used to remove the soluble/insoluble portions of fill material to the recess the fill material within the openings.