Patents Examined by Roberts P Culbert
  • Patent number: 11577544
    Abstract: A method for fabricating an external element or a timepiece dial from non-conductive material, by performing or repeating a basic cycle of making a base from a non-conductive, or ceramic, or glass. or sapphire substrate; dry coating the base with a first sacrificial protective metal layer; etching a decoration with an ultrashort pulse laser to a depth at least equal to the local thickness of the first layer; dry coating the decoration and the remaining part of the first layer with a second metal and/or coloured decorative treatment layer; chemically removing each first layer; and before or after chemical removal of each first layer, mechanically levelling on the upper level of the base the compound thus formed.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 14, 2023
    Assignee: Rubattel & Weyermann S.A.
    Inventors: Mehdy Larriere, Benjamin Tixier
  • Patent number: 11566150
    Abstract: A slurry containing abrasive grains and a liquid medium, the abrasive grains including first particles and second particles being in contact with the first particles, the first particles containing ceria, the first particles having a negative zeta potential, the second particles containing a hydroxide of a tetravalent metal element, and the second particles having a positive zeta potential.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: January 31, 2023
    Assignee: SHOWA DENKO MATERIALS CO., LTD.
    Inventor: Tomohiro Iwano
  • Patent number: 11557487
    Abstract: In certain embodiments, a method of processing a semiconductor structure includes forming a patterned layer over a copper layer to be etched. The copper layer is disposed over a substrate. The method includes patterning the copper layer, using the patterned layer as an etch mask, by performing a cyclic etch process to form a recess in the copper layer. The cyclic etch process includes forming, in a first etch step, a passivation layer on an exposed surface of the copper layer by exposing the exposed surface of the copper layer to a chlorine gas. The passivation layer replaces at least a portion of a surface layer of the copper layer. The cyclic etch process includes subsequently etching, in a second etch step, the passivation layer using a first plasma that includes a noble gas. Each cycle of the cyclic etch process extends the recess in the copper layer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: January 17, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Roberto C. Longo Pazos, Peter Lowell George Ventzek, Alok Ranjan
  • Patent number: 11557479
    Abstract: Methods process microelectronic workpieces with inverse extreme ultraviolet (EUV) patterning processes. In part, the inverse patterning techniques are applied to reduce or eliminate defects experienced with conventional EUV patterning processes. The inverse patterning techniques include additional process steps as compared to the conventional EUV patterning processes, such as an overcoat process, an etch back or planarization process, and a pattern removal process. In addition, further example embodiments combine inverse patterning techniques with line smoothing treatments to reduce pattern roughness and achieve a target level of line roughness. By using this additional technique, line pattern roughness can be significantly improved in addition to reducing or eliminating microbridge and/or other defects.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: January 17, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Eric Chih-Fang Liu, Akiteru Ko, Subhadeep Kal, Toshiharu Wada
  • Patent number: 11551938
    Abstract: Tin oxide films are used as spacers and hardmasks in semiconductor device manufacturing. In one method, tin oxide layer (e.g., spacer footing) needs to be selectively etched in a presence of an exposed silicon-containing layer, such as SiOC, SiON, SiONC, amorphous silicon, SiC, or SiN. In order to reduce damage to the silicon-containing layer the process involves passivating the silicon-containing layer towards a tin oxide etch chemistry, etching the tin oxide, and repeating passivation and etch in an alternating fashion. For example, passivation and etch can be each performed between 2-50 times. In one implementation, passivation is performed by treating the substrate with an oxygen-containing reactant, activated in a plasma, and the tin oxide etching is performed by a chlorine-based chemistry, such as using a mixture of Cl2 and BCl3.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: January 10, 2023
    Assignee: Lam Research Corporation
    Inventors: Seongjun Heo, Jengyi Yu, Chen-Wei Liang, Alan J. Jensen, Samantha S. H. Tan
  • Patent number: 11538692
    Abstract: A method for processing a substrate includes performing a cyclic process including a plurality of cycles, where the cyclic process includes: forming, in a plasma processing chamber, a passivation layer over sidewalls of a recess in a carbon-containing layer, by exposing the substrate to a first gas including boron, silicon, or aluminum, the carbon-containing layer being disposed over a substrate, purging the plasma processing chamber with a second gas including a hydrogen-containing gas, an oxygen-containing gas, or molecular nitrogen, and exposing the substrate to a plasma generated from the second gas, where each cycle of the plurality of cycles extends the recess vertically into the carbon-containing layer.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: December 27, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Yunho Kim, Du Zhang, Shihsheng Chang, Mingmei Wang, Andrew Metz
  • Patent number: 11524426
    Abstract: There is provided a new and improved master manufacturing method, master, and optical body enabling more consistent production of optical bodies having a desired haze value, the master manufacturing method including: forming a first micro concave-convex structure, in which an average cycle of concavities and convexities is less than or equal to visible light wavelengths, on a surface of a base material body that includes at least a base material; forming an inorganic resist layer on the first micro concave-convex structure; forming, on the inorganic resist layer, an organic resist layer including an organic resist and filler particles distributed throughout the organic resist; and etching the organic resist layer and the inorganic resist layer to thereby superimpose and form on the surface of the base material a macro concave-convex structure and a second micro concave-convex structure.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: December 13, 2022
    Assignee: DEXERIALS CORPORATION
    Inventors: Shunichi Kajiya, Hideki Terashima, Yuichi Arisaka
  • Patent number: 11505731
    Abstract: A slurry containing abrasive grains and a liquid medium, in which the abrasive grains include first particles and second particles in contact with the first particles, a particle size of the second particles is smaller than a particle size of the first particles, the first particles contain cerium oxide, the second particles contain a cerium compound, and in a case where a content of the abrasive grains is 0.1% by mass, a BET specific surface area of a solid phase obtained when the slurry is subjected to centrifugal separation for 60 minutes at a centrifugal acceleration of 1.1×104 G is 40 m2/g or more.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: November 22, 2022
    Assignee: SHOWA DENKO MATERIALS CO., LTD.
    Inventors: Takaaki Matsumoto, Tomohiro Iwano, Tomoyasu Hasegawa, Tomomi Kukita
  • Patent number: 11499072
    Abstract: A composition suitable for chemical mechanical polishing a substrate can comprise abrasive particles, a multi-valent metal borate, at least one oxidizer and a solvent. The composition can polish a substrate with a high material removal rate and a very smooth surface finish.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: November 15, 2022
    Assignee: SAINT-GOBAIN CERAMICS & PLASTICS, INC.
    Inventors: Lin Fu, Jason A. Sherlock, Long Huy Bui, Douglas E. Ward
  • Patent number: 11495461
    Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 8, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tejinder Singh, Suketu Arun Parikh, Daniel Lee Diehl, Michael Anthony Stolfi, Jothilingam Ramalingam, Yong Cao, Lifan Yan, Chi-I Lang, Hoyung David Hwang
  • Patent number: 11495602
    Abstract: Embodiments of the present disclosure provide a method and a device for determining a fabrication chamber. According to a current radio frequency power time of each of the fabrication chambers corresponding to adjacent process steps and service phases divided based on a service period of the fabrication chambers, a service phase is determined for the current radio frequency power time of each of the fabrication chambers. For target objects processed by the fabrication chambers in the current process step, fabrication chambers for the target objects to enter in a next process step are directly determined according to the service phase of the current radio frequency power time of each of the fabrication chambers.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: November 8, 2022
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Zhenxing Li, Yuming Wang, Fang Wang, San-Chen Chen, Chen-Hua Shen
  • Patent number: 11488834
    Abstract: Disclosed is a method of forming a fine silicon pattern with a high aspect ratio for fabrication of a semiconductor device. The method includes a cleaning process of removing organic residue or reside originating in fumes using a cleaning solution, thereby enabling formation of a desired pattern while preventing the pattern from being lifted. Thus, the present disclosure enables formation of a fine pattern by using a novel cleaning method.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: November 1, 2022
    Assignee: YOUNG CHANG CHEMICAL CO., LTD
    Inventors: Su Jin Lee, Gi Hong Kim, Seung Hun Lee, Seung Hyun Lee
  • Patent number: 11482425
    Abstract: An etching method includes: providing, on a stage, a substrate including an etching film containing a silicon oxide film, and a mask formed on the etching film; setting a temperature of the stage to be 0° C. or less; and generating plasma from a gas containing fluorine, nitrogen, and carbon, and having a ratio of the number of fluorine to the number of nitrogen (F/N) in a range of 0.5 to 10, thereby etching the silicon oxide film through the mask.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: October 25, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Ryutaro Suda, Maju Tomura
  • Patent number: 11482411
    Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Yu Chang, Jei Ming Chen, Tze-Liang Lee
  • Patent number: 11472984
    Abstract: A method of enhancing the removal rate of polysilicon from a substrate includes mixing an acid chemical mechanical polishing slurry containing water, an organic acid and an abrasive with an alkaline solution containing water, an abrasive, a low alkyl amine compound; providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the mixture of the chemical mechanical polishing slurry and the alkaline solution onto the polishing surface at or near the interface between the polishing pad and the substrate, wherein some of the polysilicon is polished away from the substrate.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: October 18, 2022
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Yi Guo
  • Patent number: 11462407
    Abstract: An etching method includes: forming a second film on a workpiece target including a processing target film, a layer including a plurality of convex portions formed on the processing target film, and a first film that covers the plurality of convex portions and the processing target film exposed between the plurality of convex portions; etching the second film in a state where the second film remains on a portion of the first film that covers a side surface of each of the plurality of convex portions; and etching the first film in a state where the second film remains on the portion of the first film that covers the side surface of each of the plurality of convex portions, thereby exposing a top portion of each of the plurality of convex portions and the processing target film between the plurality of convex portions.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 4, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yusuke Yanagisawa, Yusuke Takino
  • Patent number: 11450532
    Abstract: A method for selectively etching a first region of a structure with respect to a second region of the structure is provided. The method comprises at least one cycle. Each cycle comprises selectively depositing an inhibitor layer on the first region of the structure, providing an atomic layer deposition over the structure, wherein the atomic layer deposition selectively deposits a mask on the second region of the structure with respect to the inhibitor layer, and selectively etching the first region of the structure with respect to the mask. The selectively depositing an inhibitor layer on the first region of the structure comprises providing an inhibitor layer gas and forming the inhibitor layer gas into inhibitor layer radicals, wherein the inhibitor layer radicals selectively deposit on the first region of the structure with respect to the second region of the structure.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: September 20, 2022
    Assignee: Lam Research Corporation
    Inventors: Younghee Lee, Daniel Peter, Samantha SiamHwa Tan, Yang Pan
  • Patent number: 11443955
    Abstract: Semiconductor devices and fabrication methods are provided. An exemplary fabrication method includes providing a to-be-etched layer having a plurality of first regions and second regions; forming a first mask layer on the to-be-etched layer; doping portions of the first mask layer outside the second trench regions; forming a second mask layer on the first mask layer; forming a first trench penetrating the first mask layer and the second mask layer over the first regions; forming a mask sidewall spacer on sidewall surfaces of the first trench; removing the second mask layer; and removing the first mask layer in the second trench regions using the mask sidewall spacers and the doped portions of the first mask layer as an etching mask to form seconds trenches over the second trench regions of the plurality of second regions. The sidewall surface of the second trench exposes a corresponding mask sidewall spacer.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: September 13, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Jisong Jin
  • Patent number: 11430664
    Abstract: An etching method includes etching a first silicon-containing film of a substrate by plasma of a first processing gas; and etching a second silicon-containing film of the substrate by plasma of a second processing gas. The etching of the first silicon-containing film and the etching of the second silicon-containing film are repeated a preset number of times.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: August 30, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Wakako Ishida, Masaaki Kikuchi, Wataru Togashi, Yasunori Hatamura
  • Patent number: 11422456
    Abstract: A phase shift mask blank has a transparent substrate and a phase shift film formed on the transparent substrate. The phase shift film has a phase difference of 160 to 200° and a transmittance of 3 to 15% at exposure wavelength of 200 nm or less and includes a lower layer and an upper layer in order from the transparent substrate side. The upper layer contains transition metal, silicon, nitrogen and/or oxygen, or silicon, nitrogen and/or oxygen. The lower layer contains chromium, silicon, nitrogen and/or oxygen, and the content of silicon is 3% or more to less than 15% for the sum of chromium and silicon in the lower layer. The ratio of oxygen content to the total content of chromium and silicon is less than 1.7, and etching selectivity of the upper layer is 10 or more compared to the lower layer in fluorine-based dry etching.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: August 23, 2022
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Takuro Kosaka, Naoki Matsuhashi, Shohei Mimura