Abstract: A semiconductor device is operated by applying a gate voltage with a first value to a gate electrode terminal such that current flows through the IGBT between first and second electrode terminals and current flow through a desaturation channel is substantially blocked. A gate voltage with a second value is applied to the gate electrode terminal the absolute value of which is lower than that of the first value, such that current flows through the IGBT between the first and second electrode terminals and charge carriers flow as a desaturating current through the desaturation channel to the first electrode terminal. A gate voltage with a third value is applied to the gate electrode terminal, the absolute value of which is lower than that of the first and second values, such that current flow through the IGBT between the first and second electrode terminals is substantially blocked.

Abstract: Devices and methods for forming a device are disclosed. The device includes a substrate with a device region having a length and a width direction. An isolation region surrounds the device region of which an isolation edge abuts the device region. A transistor is disposed in the device region. The transistor includes a gate disposed between first and second source/drain (S/D) regions. A silicide block is disposed on the transistor. The silicide block covers at least the isolation edge adjacent to the gate. The silicide block prevents formation of a silicide contact at least at the isolation edge adjacent to the gate.

Abstract: A highly reliable semiconductor device with stable electrical characteristics and a method for manufacturing the semiconductor device are provided. A separation layer is formed between a source electrode and a drain electrode. The separation layer is formed using a material having a high insulating property. The separation layer between the source electrode and the drain electrode can reduce a difference in level of each of the source electrode and the drain electrode, which can improve coverage with a layer formed over the source electrode and the drain electrode. The separation layer between the source electrode and the drain electrode can prevent an unintended electrical short circuit of the source electrode and the drain electrode. The separation layer can be formed by introducing oxygen to a conductive layer.

Abstract: Embodiments of the present disclosure include MEMS devices and methods for forming MEMS devices. An embodiment is a method for forming a microelectromechanical system (MEMS) device, the method including forming a MEMS wafer having a first cavity, the first cavity having a first pressure, and bonding a carrier wafer to a first side of the MEMS wafer, the bonding forming a second cavity, the second cavity having a second pressure, the second pressure being greater than the first pressure. The method further includes bonding a cap wafer to a second side of the MEMS wafer, the second side being opposite the first side, the bonding forming a third cavity, the third cavity having a third pressure, the third pressure being greater than the first pressure and less than the second pressure.

Abstract: Semiconductor device manufacturing methods and methods of forming insulating material layers are disclosed. In one embodiment, a method of forming a composite insulating material layer of a semiconductor device includes providing a workpiece and forming a first sub-layer of the insulating material layer over the workpiece using a first plasma power level. A second sub-layer of the insulating material layer is formed over the first sub-layer of the insulating material layer using a second plasma power level, and the workpiece is annealed.

Abstract: Since the gate electrode (1) and the capacitor electrode (2) are made into a double layer structure, the first layers (1a, 2a) in contact with the substrate (0) are made of ITO, and the second layers (1b, 2b) in contact with the gate insulating layer (3) are made of an metallic oxide layer, it becomes possible to form the gate electrode (1) and the capacitor electrode (2) having high optical transparency and high conductivity. Therefore, it becomes possible to improve the optical transparency of a thin film transistor and to improve the display performance of an image displaying apparatus for which the thin film transistor is used by using the above-described gate electrode (1) and the above-described capacitor electrode (2).

Abstract: The present disclosure provides one embodiment of a method. The method includes applying a first cleaning fluid to a substrate, thereby cleaning the substrate and forming a protection layer on the substrate; and applying a removing process to the substrate, thereby removing the protection layer from the substrate. The first cleaning fluid includes a cleaning chemical, a protection additive and a solvent.

Abstract: A cleaning method includes performing a first cleaning process of supplying a fluorine-based gas from a first nozzle heated to a first temperature and a nitrogen oxide-based gas from a second nozzle heated to a first temperature into a process chamber heated to the first temperature in order to remove on surfaces of members in the process chamber by a thermochemical reaction, changing in internal temperature of the process chamber to a second temperature higher than the first temperature, and performing a second cleaning process of supplying a fluorine-based gas from the first nozzle heated to the second temperature into the process chamber heated to the second temperature in order to remove substances remaining on the surfaces of the members in the process chamber after removing the deposits by the thermochemical reaction and to remove deposits deposited in the first nozzle by the thermochemical reaction.

Abstract: A first conductor layer is provided on a first surface of an insulating plate, and has a first volume. A second conductor layer is provided on a second surface of the insulating plate, and has a second volume. A third conductor layer is provided on a second surface of the insulating plate, and has a second volume. The third conductor layer has a mounting region thicker than the second conductor layer. The sum of the second and third volumes is greater than or equal to 70% and smaller than or equal to 130% of the first volume. A semiconductor chip is provided on the mounting region. A sealing part is formed of an insulator, and seals the semiconductor chip within a case.

Abstract: Methods and structures for forming devices, such as transistors, are discussed. A method embodiment includes forming a gate spacer along a sidewall of a gate stack on a substrate; passivating at least a portion of an exterior surface of the gate spacer; and epitaxially growing a material in the substrate proximate the gate spacer while the at least the portion of the exterior surface of the gate spacer remains passivated. The passivating can include using at least one of a thermal treatment, a plasma treatment, or a thermal treatment.

Abstract: An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon.

Abstract: An LDMOS (Laterally-Diffused Metal Oxide Semiconductor) device has a substrate, which includes a first doped region, a second doped region, and a shallow trench isolation (STI) region disposed in the second doped region. The first doped region and the second doped region are adjacent and have different conductivity types. The device also has a gate structure disposed on the substrate; the gate structure substantially does not overlap the second doped region.

Abstract: Embodiments of the present invention provide methods for forming fin structure with desired materials using a conversion process for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one embodiment, a method of forming a fin structure on a substrate includes performing an directional plasma process on a fin structure formed from a substrate comprising a first type of atoms, the directional plasma process dopes a second type of atoms on sidewalls of the fin structure, performing a surface modification process to form a surface modified layer on the sidewalls of the fin structure reacting with the first type of atoms, replacing the first type of the atoms with the second type of the atoms in the fin structure during the surface modification process, and forming the fin structure including the second type of the atoms on the substrate.

Abstract: A semiconductor layer of a reverse conducting insulated gate bipolar transistor is provided with a drift region of a first conductive type, a body region of a second conductive type that is disposed above the drift region, and a barrier region of the first conductive type that is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer. The barrier region is not contact with a side surface of the insulated trench gate.

Abstract: A light emitting device (10) comprises a body (12) of a semiconductor material having a first face (14) and at least one other face (16). At least one pn-junction (18) in the body is located towards the first face and is configured to be driven via contacts on the body into a light emitting mode. The other face (16) of the body is configured to transmit from the body light emitted by the at least one pn-junction (18) in the near infrared part of the spectrum and having wavelengths longer than 1 ?m.

Abstract: An organic light emitting diode, which is a top emission-type, is configured so that at least the following are laminated on the substrate: a reflective layer including a metal material; an anode conductive layer including a transparent conductive material; an organic EL layer having a light emitting layer which contains an organic light emitting material; and a cathode conductive layer in which a semi-transmissive metal layer and a transparent conductive layer including a transparent conductive material are laminated. On the surface of the semi-transmissive metal layer that is in contact with the transparent conducive layer side, a two-dimensional lattice structure is formed in which a plurality of protrusions are arranged periodically and two-dimensionally.

Abstract: A method of forming a carbon-containing silicon film includes: adsorbing a silicon source on a workpiece by supplying a silicon source gas containing at least one chlorine group into a reaction chamber accommodating the workpiece and activating the supplied silicon source gas to react the activated silicon source gas with the workpiece; and removing chlorine from the adsorbed silicon source containing chlorine by supplying an alkyl metal gas into the reaction chamber and activating the supplied alkyl metal gas to react the activated alkyl metal gas with the adsorbed silicon source. Adsorbing a silicon source and removing chlorine are sequentially repeated plural times.

Abstract: The present disclosure relates to a display panel, a display device and a method for manufacturing the display panel. The display panel comprises an array substrate and a color film substrate, wherein the array substrate is provided with a perforated region, at least a part of which is located between a silver paste conductive layer and an outermost metal lead of the array substrate, and the silver paste conductive layer is arranged on the array substrate, and connects an ITO layer on the color film substrate and a grounded signal region of the array substrate.