Patents Examined by S. Rosasco
  • Patent number: 7351505
    Abstract: In a phase shift mask blank comprising a phase shift multilayer film on a substrate, the phase shift multilayer film consists of at least one layer of light absorption function film and at least one layer of phase shift function film, and the light absorption function film has an extinction coefficient k which increases as the wavelength changes from 157 nm to 260 nm, and has a thickness of up to 15 nm. The phase shift mask blank has minimized wavelength dependency of transmittance and can be processed with a single dry etching gas.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: April 1, 2008
    Assignees: Shin-Etsu Chemical Co., Ltd, Toppan Printing Co., Ltd
    Inventors: Hiroki Yoshikawa, Yukio Inazuki, Satoshi Okazaki, Takashi Haraguchi, Yuichi Fukushima, Yoshihiro Ii, Tadashi Saga
  • Patent number: 7351504
    Abstract: In a quadrangular photomask blank substrate with a length on each side of at least 6 inches, which has a pair of strip-like regions that extend from 2 to 10 mm inside each of a pair of opposing sides along an outer periphery of a substrate top surface, with a 2 mm edge portion excluded at each end, each strip-like region is inclined downward toward the outer periphery of the substrate, and a difference between maximum and minimum values for height from a least squares plane for the strip-like region to the strip-like region is at most 0.5 ?m. The substrate exhibits a good surface flatness at the time of wafer exposure.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: April 1, 2008
    Assignees: Shin-Etsu Chemical Co., Ltd., Kabushiki Kaisha Toshiba, Nikon Corporation
    Inventors: Masayuki Nakatsu, Tsuneo Numanami, Masayuki Mogi, Masamitsu Itoh, Tsuneyuki Hagiwara, Naoto Kondo
  • Patent number: 7351503
    Abstract: A fused silica pellicle for use on photomasks having increased durability and improved transmission uniformity and birefringence properties. The pellicle is to be intimately secured to the patterned surface of a photomask.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: April 1, 2008
    Assignee: Photronics, Inc.
    Inventor: Ben Eynon
  • Patent number: 7348105
    Abstract: A reflective mask and a reflective mask blank that can form a fine mask pattern with high accuracy in shape, achieve a sufficient contrast in a pattern inspection, and enable a pattern transfer with high accuracy. On a substrate (11), a multilayer reflective film (12) for reflecting an exposure light, a buffer layer (13), and an absorber layer for absorbing the exposure light are successively deposited in this order. This absorber layer has a layered structure composed of an uppermost layer (15) and a lower layer (14) other than it. The uppermost layer (15) exhibits a reflectance of 20% or less with respect to a light having an inspection wavelength for use in an inspection of a pattern formed in the absorber layer and further is formed of an inorganic material having a resistance against an etching condition in forming a pattern in the lower layer.
    Type: Grant
    Filed: July 4, 2003
    Date of Patent: March 25, 2008
    Assignee: Hoya Corporation
    Inventors: Shinichi Ishibashi, Yoichi Usui
  • Patent number: 7348106
    Abstract: A method is disclosed for repairing an attenuated phase shift mask. The mask initially has a mask substrate coated with a predetermined shift layer material, a mask pattern layer, and an energy beam resist layer sequentially. After forming a predetermined mask pattern in the mask pattern layer through an energy beam resist layer, the mask is inspected for detecting at least one missing pattern in the mask pattern layer. The predetermined mask pattern is repaired in a predetermined defect area for correcting the missing pattern. After the missing pattern is reformed. The predetermined mask pattern is transferred in the shift layer material.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: March 25, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chun Wang, Ming-Chih Hsieh, Han-Lin Wu
  • Patent number: 7348108
    Abstract: A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: March 25, 2008
    Assignee: Synopsys, Inc.
    Inventors: Michel L. Cote, Christophe Pierrat
  • Patent number: 7344808
    Abstract: A photomask blank substrate is made by polishing a starting substrate to a specific flatness in a principal surface region on a top surface of the substrate so as to form a polished intermediate product, then additionally polishing the intermediate product. Substrates made in this way exhibit a good surface flatness at the time of wafer exposure. When a photomask fabricated from a blank obtained from such a substrate is held on the mask stage of a wafer exposure system with a vacuum chuck, the substrate surface undergoes minimal warping, enabling exposure patterns of small geometry to be written onto wafers to good position and linewidth accuracies.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: March 18, 2008
    Assignees: Shin-Etsu Chemical Co., Ltd., Nikon Corporation
    Inventors: Tsuneo Numanami, Masayuki Nakatsu, Masayuki Mogi, Tsuneyuki Hagiwara, Naoto Kondo
  • Patent number: 7344805
    Abstract: A mask is provided wherein the mask has: a plate-like member having a mask pattern area and at least one pn junction; and a current supplying area which supplies a current to the pn junction, and a Peltier effect is caused by supplying a current to the pn junction, thereby enabling the temperature of the mask pattern area to be controlled. When this mask is used, reliable formation of an ion implanted region is enabled without forming a resist pattern.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: March 18, 2008
    Assignees: Rohm Co., Ltd., Toshiba Corporation
    Inventors: Hiroshi Kumano, Yuichi Mikata
  • Patent number: 7344807
    Abstract: The present invention relates to an exposure mask for structuring a photoresist layer on a substrate wafer, in which an inorganic adhesive is used as an adhesive device for connecting a reticle having a lithographic structure, a frame and a pellicle. For chemical reasons, an adhesive of this type has no tendency or a considerably lower tendency to gassing out than an organic adhesive used in conventional exposure masks, so that the risk of particles which are deposited on the lithographic structure and which can cause projection errors during an exposure process is largely ruled out. The invention relates further to a method of producing such an inorganic adhesive and also a method of producing an exposure mask with the aid of such an inorganic adhesive.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: March 18, 2008
    Assignee: Infineon Technologies AG
    Inventor: Stefan Geyer
  • Patent number: 7344824
    Abstract: The present invention generally relates to optical lithography and more particularly relates to the fabrication of transparent or semitransparent phase shifting masks used in the manufacture of semiconductor devices. In particular, the present invention utilizes a light absorbing film in a conventional aaPSMs to balance the intensity of light through each opening of the photomask. The aaPSM of the present invention is used to make semiconductor devices or integrated circuits.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: March 18, 2008
    Assignee: Photronics, Inc.
    Inventor: Christopher J. Progler
  • Patent number: 7344806
    Abstract: There is disclosed a method of producing a phase shift mask blank wherein the method includes at least a step of forming one or more layers of phase shift films on a substrate by a sputtering method, and in the step, the phase shift films are formed by the sputtering method while simultaneously discharging plural targets having different compositions. Thereby, a phase shift mask blank having a desired composition and quality, in particular, having a phase shift film with few defects can be easily produced.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: March 18, 2008
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Hiroki Yoshikawa, Yukio Inazuki, Noriyasu Fukushima, Hideo Kaneko, Satoshi Okazaki
  • Patent number: 7332250
    Abstract: The photomask of this invention includes, on a transparent substrate, a semi-shielding portion having a transmitting property against exposing light, a transparent portion having a transmitting property against the exposing light and surrounded with the semi-shielding portion, and an auxiliary pattern surrounded with the semi-shielding portion and provided around the transparent portion. The semi-shielding portion and the transparent portion transmit the exposing light in an identical phase with respect to each other. The auxiliary pattern transmits the exposing light in an opposite phase with respect to the semi-shielding portion and the transparent portion and is not transferred through exposure.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: February 19, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Akio Misaka
  • Patent number: 7329475
    Abstract: Provided that a pair of strip-like regions extend from 2 mm to 10 mm inside each of a pair of opposing sides along an outer periphery of a top surface of a substrate on which a mask pattern is to be formed, with a 2 mm edge portion excluded at each end in a lengthwise direction thereof, the height from a least squares plane for the strip-like regions on the substrate top surface to the strip-like regions is measured at intervals of 0.05-0.35 mm in horizontal and vertical directions, and a substrate in which the difference between the maximum and minimum values for the height among all the measurement points is ?o? ?o?? ???? 0.5 ?m is selected.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: February 12, 2008
    Assignees: Shin-Estu Chemical Co., Ltd., Kabushiki Kaisha Toshiba, Nikon Corporation
    Inventors: Masayuki Nakatsu, Tsuneo Numanami, Masayuki Mogi, Masamitsu Itoh, Tsuneyuki Hagiwara, Naoto Kondo
  • Patent number: 7329474
    Abstract: A photomask blank comprising a multilayer film including at least four layers of different compositions, wherein the interface between the layers is moderately graded in composition; a phase shift mask blank comprising a phase shift film of at least two layers including a surface layer of a composition based on a zirconium silicide compound and a substrate adjacent layer of a composition based on a molybdenum silicide compound, and a further layer between one layer and another layer of a different composition, the further layer having a composition moderately graded from that of the one layer to that of the other layer; a phase shift mask blank comprising a phase shift film including a plurality of layers containing a metal and silicon in different compositional ratios which are stacked in such order that a layer having a higher etching rate is on the substrate side and a layer having a lower etching rate is on the surface side.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: February 12, 2008
    Assignee: Shin-Estu Chemical Co., Ltd.
    Inventors: Hiroki Yoshikawa, Yukio Inazuki, Noriyasu Fukushima, Hideo Kaneko, Satoshi Okazaki
  • Patent number: 7326502
    Abstract: Techniques, methods, and structures disclosed in relation to extreme ultraviolet (EUV) lithography in semiconductor processing. In one exemplary implementation, a method may comprise using ion beam deposition to deposit a first multilayer stack of thin films on a substrate to planarize and smooth surface defects on the substrate. The method includes using atomic layer deposition to deposit a second multilayer stack of thin films on the first multilayer stack of thin films. The second multilayer stack of thin films may comprise an extreme ultraviolet reflective multilayer stack. The second multilayer stack of thin films may comprise fewer surface defects than the first multilayer stack of thin films. The method may further comprise processing an extreme ultraviolet mask blank to form an extreme ultraviolet reflective mask.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: February 5, 2008
    Assignee: Intel Corporation
    Inventor: Peter J. Silverman
  • Patent number: 7323277
    Abstract: A photomask is proposed which comprises a transparent substrate and a light shielding film formed on a principal surface of the substrate, with the light shielding film having an aperture pattern thereon. And, a recess is provided at the portion of the transparent substrate which is exposed in the bottom of the aperture pattern. The dimension of the recess is larger than that of the aperture, and a peripheral portion of each of the aperture pattern of the light shielding film is configured as an eaves-like extension in response to the density of a neighboring pattern of the aperture pattern.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: January 29, 2008
    Assignee: Sony Corporation
    Inventor: Masaya Uematsu
  • Patent number: 7323276
    Abstract: A substrate for photomask has a top surface and a back surface, the substrate being square in shape, an end surface formed along the thickness thereof and a chamfered surface formed on a perimeter edge region where the end surface and the top surface meet and another region where the end surface and the back surface meet, a size of the perimeter edge of the substrate is 300 mm or more on a side and the end surface and the chamfered surface each has a roughened surface having a surface roughness (Ra) ranging from 0.03 ?m to 0.3 ?m.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: January 29, 2008
    Assignee: Hoya Corporation
    Inventors: Ryu Ohtaguro, Koichi Hashiguchi
  • Patent number: 7316872
    Abstract: A patterning device for implementing a pattern on a substrate includes a main pattern feature and a sacrificial pattern feature. Both the main pattern feature and the sacrificial pattern feature are transferable to an overlying layer on the substrate. The sacrificial pattern feature is positioned a distance from the main pattern feature and is configured to have a dimension less than an etching bias of an etching process. The etching process is capable of transferring the main pattern feature to an underlying layer, such that the sacrificial pattern feature adjusts an etching behavior of the main pattern feature and is eliminated from the underlying layer.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: January 8, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ming Chang, Chih-Cheng Chin, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin
  • Patent number: 7316871
    Abstract: A crystallization method using a mask includes providing a substrate having a semiconductor layer; positioning a mask over the substrate, the mask having first, second and third blocks, each block having a periodic pattern including a plurality of transmitting regions and a blocking region, the periodic pattern of the first block having a first position, the periodic pattern of the second block having a second position, the periodic pattern of the third block having a third position, the first, second and third positions being different from each other; and crystallizing the semiconductor layer by irradiating a laser beam through the mask.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: January 8, 2008
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: JaeSung You
  • Patent number: RE40084
    Abstract: Method for utilizing halftoning structures to manipulate the relative magnitudes of diffraction orders to ultimately construct the desired projected-image. At the resolution limit of the mask maker, this is especially useful for converting strongly shifted, no-0th-diffraction-order, equal-line-and-space chromeless phase edges to weak phase-shifters that have some 0th order. Halftoning creates an imbalance in the electric field between the shifted regions, and therefore results in the introduction of the 0th diffraction order.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: February 19, 2008
    Assignee: ASML Masktools Netherlands B.V.
    Inventors: John S. Petersen, Jang Fung Chen