Abstract: A method of designing a layout of an alternating phase shifting mask for projecting an image of an integrated circuit design having a plurality of features to be projected using alternating phase shifting segments, including a gate-shrink region of a transistor having a critical width along a length thereof that extends beyond a diffusion region. The method also provides alternating phase shift design rules based on alternating phase shift design parameters comprising minimum phase width, minimum phase-to-phase spacing, and minimum extension of critical width beyond another feature. The method then includes identifying portions of the integrated circuit layout having a critical width feature that violate the alternating phase shift design rules, and reducing the length that the critical width gate-shrink region feature extends beyond the other diffusion region feature to the minimum extension.

Abstract: Prior art methods for forming alt. PSMs require a relatively large number of phase assignments to avoid phase conflicts in complex arrays. This has been improved by adding dummy elements at the ends of all rows and columns of the array that is to be imaged, while initially leaving all corners open. Phases are then assigned in checker board fashion to all elements. Additional dummy elements are then placed in the open corners and assigned the same phase as their immediate neighbors. The first exposure of the photoresist is made with both the original elements and the additional dummy elements. Then additional resist is coated and exposed and the original elements are open after development. If the added elements are made somewhat smaller than the original elements, only a single exposure is used.

Abstract: A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.

Abstract: Aspects of the present invention provide for a novel photomask for patterning features for an integrated circuit, the photomask including masked features having interior nonprinting windows. In some embodiments, the interior nonprinting window is an alternating phase shifter, while the area surrounding the masked features transmits light unshifted. In other embodiments, the interior nonprinting window transmits light unshifted, while the area surrounding the masked features is an alternating phase shifter. Thus any arrangement of features can be patterned with no phase conflict.

Abstract: Computer-based design and verification tools provide integrated circuit layouts for use in chromeless phase lithography. A phase-mask design tool assigns feature size descriptors to circuit layout features, and mask features are configured using the feature size descriptors. Feature size descriptors can be assigned based on feature size ranges established based on a mask error function, feature dimensions with respect to a lithographic system resolution limit, or selected properties of aerial image intensity as a function of feature size. Circuit layout features are assigned mask features that include twin phase steps. In addition, circuit layout features associated with selected feature descriptors are assigned sub-resolution assist mask pattern portions or other mask pattern portions based on optical and process corrections.

Abstract: A phase shift mask is arranged before a laser device through a beam expander, a homogenizer and a mirror, and a processed substrate is set on an opposed surface of the phase shift mask with an image forming optical system therebetween. The processed substrate is held at a predetermined position by using a substrate chuck such as a vacuum chuck or an electrostatic chuck.

Abstract: The object of the present invention is to provide a method for solving the problem of surface damage due to gallium ion irradiation that poses a problem when carrying out mask repair using currently established FIB techniques, and the problem of residual gallium, and to provide a device realizing this method. The device of the present invention has an electron beam lens barrel that can carry out processing, as well as an FIB lens barrel, provided inside the same sample chamber, which means that a mask repair method of the present invention, in correction processing to remove redundant sections such as a mask opaque defect, phase shift film bump defect or a glass substrate cut remnant defect, comprises a step of coarse correction by etching using a focused ion beam and a step of finishing processing using an electron beam, to remove surface damage due to gallium irradiation, and residual gallium.

Abstract: The present invention describes a method including: providing a substrate, the substrate including a first region and a second region; forming a multilayer mirror over the substrate; forming a phase-shifter layer over the multilayer mirror; forming a capping layer over the phase-shifter layer; removing the capping layer and the phase-shifter layer in the second region; illuminating the first region and the second region with EUV light; and reflecting the EUV light off the first region and the second region. The present invention also describes a structure including: a substrate, the substrate including a first region and a second region; a multilayer mirror located over the first region and the second region; a phase-shifter layer located over the multilayer mirror in the region; an intensity balancer layer located over the multilayer mirror in the second region; and a capping layer located over the phase-shifter layer in the first region and over the intensity balancer layer in the second region.

Abstract: A halftone type phase shift mask blank including, on a transparent substrate, at least a phase shifter film having a predetermined transmittance for an exposed light and a predetermined phase difference for the transparent substrate, wherein the phase shifter film is formed by a multilayer film in which films including at least two layers having an upper layer formed on the most surface side and a lower layer formed thereunder are provided, and a thickness of the upper layer is adjusted in such a manner that a refractive index of the film to be the upper layer is smaller than that of the film to be the lower layer and a surface reflectance for the inspecting light of the phase shifter film is maximized and approximates to a maximum.

Abstract: A halftone type phase shift mask having a semitranslucent film pattern and a shielding film pattern provided on a transparent substrate in this order is constituted in such a manner that each of the reflectances of the transparent substrate, the semitranslucent film pattern and the shielding film pattern for an inspecting light represents a difference which can detect the semitranslucent film pattern and the shielding film pattern based on a reflected light generated when the inspecting light is irradiated on the mask.

Abstract: A reflection mask for projecting a structure onto a semiconductor wafer contains a carrier material, a layer stack for reflecting obliquely incident light and formed of an alternating sequence of reflective layers disposed on a front side of the carrier material, and a light-absorbing layer. In the light-absorbing layer at least one opening is formed as the structure to be projected and which is disposed on the alternating layer stack. An electrically conductive layer is buried within the carrier material near a surface of a rear side of the carrier material. The buried electrically conductive layer is produced by ion implantation preferably in a whole-area manner on the rear side of the mask. The depth and the depth extent of the layer are controlled by the ion energy and also the dose.

Abstract: A chromeless APSM structure may be used to enable the pitch of features on the mask to be decreased by removing the chrome line between features, and thus remove the limit based on the size of the chrome line. The chromeless APSM may include primary features surrounded by a boundary region including sub resolution features. A relatively high precision lithography tool may be used in a first lithography step to print the features in the chromeless APSM structure. The boundary region may allow for a less precise lithography tool to be used in a second lithography step.

Abstract: A method for increasing etching selectivity of a developed silicon-containing photoresist layer on a non-silicon containing photoresist layer on a substrate. The developed silicon-containing photoresist layer includes polymer chains containing silicon. Next, the developed silicon-containing photoresist layer and uncovered portions of the non-silicon containing photoresist layer are exposed to an ultraviolet (UV) light, where the UV light emanates from a UV generating agent, such as neon, xenon, helium, hydrogen, or krypton gas in an inert gas (e.g., argon, etc.) plasma. A top portion of the developed silicon-containing photoresist layer is then converted to a hardened layer, where the hardened layer is created by cross-linking the polymer chains containing silicon and the cross-linking is activated by the UV light. Next, an etch is performed on the uncovered portions of the non-silicon containing photoresist layer and the substrate using the hardened layer.

Abstract: Provided in a photomask for use in production of a hologram element having desired optical characteristics, a method for producing a hologram element, and a hologram element having desired optical characteristics. The first photomask is used for photolithography-based production of a hologram element having a hologram divided into two regions carrying a diffraction grating. The first photomask includes the first, second mask region having the non-light-transmitting mask portion and the light-transmitting portion, for forming the diffraction gratings of the regions of the hologram. The two mask regions differ in alignment-direction-wise arrangement interval for the light-transmitting portions and in ratio of the alignment-direction-wise width to the alignment-direction-wise arrangement interval for the light-transmitting portions.

Abstract: In accordance with the objectives of the invention a new method is provided for the repair of an attenuated phase shifting mask having a contact pattern. The invention etches a single trench in the quartz substrate of the phase shifter mask and removes the impact of a void in the phase shifter material. Alternatively, the invention provides for first conventionally restoring the original dimensions of a contact hole in which a pinhole is present and then etching a single or a double trench in the exposed substrate of the restored contact opening.

Abstract: A method for repairing at least one defect of a light-influencing structure on a photolithographic mask with a mask substrate, in particular a quartz substrate, characterized in that in the region of at least one defect, gallium ions are radiated in a targeted manner for the purpose of implantation into the mask substrate and/or for the purpose of sputtering away material from the mask substrate. Furthermore, the invention relates to a photolithographic mask with a defect repaired in this way. As a result, defects in a light-influencing structure of a mask can be reliably repaired, and are repaired, respectively.

Abstract: A mask for use in a lithographic projection apparatus comprises three brackets arranged on the circumference of the mask. The brackets are provided with grooves directed to a common imaginary point and are intend to cooperate with three pins provided on a mask gripper present in a mask handling apparatus or device. Preferably, the pins are provided with a rounded top for insertion in associated grooves of the brackets to provide a kinematically-determined mechanical position of the mask on the gripper.

Abstract: The invention relates to a process for the fabrication of an optical fiber-processing phase mask that is reduced in terms of pitch variations on the mask and stitching errors, and provides a process for the fabrication of a chirped type optical fiber-processing phase mask wherein a grating form of grooves provided in one surface of a quartz substrate is configured as an optical fiber-processing grating pattern. At an exposure step, writing data obtained by arranging and compiling a plurality of data for a repetitive groove-and-strip pattern while the pitch of repetition is modulated are used and an electron beam resist is provided on a phase mask blank, so that writing is carried out all over the writing area on said phase mask blank continuously in a vertical direction to said grating form of grooves.

Abstract: An extreme ultraviolet (EUV) pellicle including a thin film or membrane and a supportive wire mesh. The pellicle allows EUV radiation to pass through the pellicle to a reticle but prevents particles from passing through the pellicle. A buffer gas supports the film against the wire mesh. The film or membrane may be embedded with support fibers or beams.

Abstract: A method for repairing defects in a photolithographic mask for use in patterning semiconductor wafers introduces a pre-selected phase error selected to sum with a phase error of a defect repair material, yielding a desired composite phase error relative to light passing through the substrate alone, e.g., 180°. Substrate phase error may be introduced by modifying its thickness. For example, after any opaque layer material within a repair zone surrounding the defect is removed, the substrate, too, is removed within the repair zone to a pre-selected depth, forming a lacuna. Repair material is then deposited in the lacuna and in the remainder of the repair zone to a level substantially equal to the top surface of the opaque layer, yielding a desired, combined phase error and attenuation matching those of defect free regions of the mask where the opaque layer has not been removed.

Abstract: A ceramic material for electronic circuit devices is sintered at less than r equal to 1000.degree. C. temperature. A filler material such as quartz and a glassy binder RO-Al.sub.2 O.sub.3 -B.sub.2 O.sub.3 are mixed together along with an appropriate glassy binder prior to firing. RO is drawn from the group of metal oxides MgO, CaO, SrO, BaO, ZnO or CdO and the glassy binders form no more than 40 vol % of the ceramic material. The glassy binder has a suitable viscosity and other properties so that after it is mixed with the quartz filler, sintering occurs at the relatively low temperature. As a consequence, high conductivity conductors made of copper, silver and gold can be appropriately metallized prior to firing. The strength and low dielectric constant of the ceramic material make the material well adapted for ceramic substrates, thick films and the like which are used in VHSIC and VLSI applications.