Abstract: A MOSFET simulation method for calculating a characteristic value of a MOSFET to be simulated by first numerically calculating the electric potential, electron density, hole density, and mobility inside the MOSFET from simulation conditions including various parameters of the MOSFET, and then using the electric potential, electron density, hole density, and carrier mobility is provided.

Abstract: In a computer simulation method for a semiconductor device, temporal changes in internal physical quantities such as electrostatic potential, electron density, and hole density in a semiconductor device upon application of a pulse voltage are obtained by transient analysis. AC signal analysis is performed by inputting a small RF AC voltage, assuming various physical quantities obtained at each time are in a pseudo steady state. The junction capacitance in the semiconductor device is calculated. These steps are repeatedly performed until a predetermined analysis time is reached to obtain transient temporal changes in junction capacitance.

Abstract: A strategy for optimal buffering in the case of an infinitely long wire buffered with an arbitrary number of equally spaced single-size buffers is presented. A simple but efficient technique is proposed using this to choose a buffer size and determine a good inter-buffering distance up front, thus enabling fast, efficient buffer insertion. The analysis also allows representing delays of long wires as a simple function of the length and buffer and wire widths. Based on this, a novel constant wire delay approach is proposed where the proposed wire delay model is used for fairly accurate prediction of wire delays early in the design process and these predictions are later met via buffer insertion and wire sizing.

Abstract: The present invention is directed to a system having a shared processing resource, a plurality of processing modules and a synchronization control module. The shared processing resource is configured to perform processing operations in connection with input data provided by the processing modules, in response to a start indication. Each of the processing modules is configured to perform selected processing operations. At least one of the processing modules is configured to provide input data to the shared processing resource. Each processing module that provides input data is configured to generate a hold indication and to provide the input data to the shared processing resource in response to a synchronization barrier lock. Each processing module is configured to generate a start enable indication. Each processing module that provides input data generates a start enable indication after providing the input data.

Abstract: A system and method for characterizing, synthesizing, and/or canceling out acoustic signals from inanimate sound sources is disclosed. Propagating wave electromagnetic sensors monitor excitation sources in sound producing systems, such as machines, musical instruments, and various other structures. Acoustical output from these sound producing systems is also monitored. From such information, a transfer function characterizing the sound producing system is generated. From the transfer function, acoustical output from the sound producing system may be synthesized or canceled. The methods disclosed enable accurate calculation of matched transfer functions relating specific excitations to specific acoustical outputs. Knowledge of such signals and functions can be used to effect various sound replication, sound source identification, and sound cancellation applications.

Abstract: A cache model apparatus and method are implemented. A set of predetermined protocols for generating cache block movement events driving level one (L1) cache to level two (L2) cache traffic in a simulation environment are provided. An event protocol is selected for a test case in response to user input, or alternatively, a random selection is made. In accordance with the protocol selected, castouts of modified L1 cache lines are generated.

Abstract: The present invention is a method and apparatus to verify a design which has an input space and a predicate. The input space is decomposed into a plurality of decompositions. The input space includes a plurality of node variables. The plurality of decompositions includes parametric variables. The decompositions are parameterized into vectors of parametric functions to satisfy the predicate.

Abstract: A parameter extraction technique for an electrical structure is based on a definition of network parameters that isolates pure mode responses of the electrical structure, and that makes mode conversion responses of the electrical structure negligible. A set of network parameters is obtained that represents pure mode responses for the electrical structure (410). These network parameters are processed to obtain model parameters that characterize each pure mode response (422, 424, 426, 428, 432, 434, 436, 438). Preferably, the mode specific parameters to combined to obtain mode independent parameters, such as coupling factor, propagation constant, and characteristic impedance values (440, 450).

Abstract: A method and apparatus pertains to aligning and/or stitching together several 3-D fragments. The steps comprise determining at least two fragments having a corresponding set of alignment marks and aligning at least two fragments with respect to a coordinate system using the corresponding set of alignment marks in the respective fragments.

Abstract: A method and apparatus pertains to aligning and/or stitching together several 3-D fragments. The steps comprise determining at least two fragments having a corresponding set of alignment marks and aligning at least two fragments with respect to a coordinate system using the corresponding set of alignment marks in the respective fragments.

Abstract: A method for testing an IDE controller with random constraints, the method comprising: providing an IDE controller model having a primary and a secondary channel and a host interface; transmitting data patterns to a primary and a secondary device model; receiving the data patterns from the primary and secondary device models; arbitrating the transfer of the data patterns to and from the primary and secondary device models; and determining whether the data patterns returned from the primary and secondary device models match expected values.

Abstract: A system and method which reduce power consumption of a domino circuit. An initial phase assignment for outputs of the domino circuit is generated. A final phase assignment that reduces power consumption of the domino circuit is determined. The final phase assignment is selected from at least one additional phase assignment. The power consumption of domino circuits can be reduced by utilizing the methods and systems disclosed.

Abstract: A method and system for optimizing the placement of a robot in a workplace so as to minimize cycle time is defined. A modified simulated annealing method (SA) is applied to the problem of robot placement in CAD systems, in the context of welding tasks. The objective function for optimization is cycle time, which can be obtained from available robotic CAD software. The research domains are simplified, and the SA method is applied to yield an optimal or near-optimal solution to each problem. To obtain the optimal placement of the robot, the research domain is first simplified by determining an acceptable base location domain, then obstacle shadows, which are subtracted from the previous domain to give the free acceptable base location domain. A modified SA method is applied to this domain, using task feasibility tests before simulating the cycle time, in order to save CPU time.

Abstract: The present invention provides a sputter profile simulation method which reduces a calculation time. The method comprises the steps of calculating sputter trajectories of particles emitted from a sputter target; projecting the sputter trajectories onto one or more first planes; extracting an outline of a contact hole on a second plane parallel to one of the first planes; defining two shadow points preventing the particles from going to a film-growth calculation coordinates point; and judging that, out of the sputter particle trajectories projected on the first plane, the sputter trajectories between two lines as film-growth contributing trajectories, the two lines joining the film-growth calculation coordinates point to each of the two shadow points.

Abstract: A high-speed performance simulation method and system for simulating the performance of a large-scaled system such as a parallel computer. In implementation, the large-scaled system is divided into subsystems or partial units and the divided subsystems are simulated in parallel. Even when a particular partial unit occupies a shared resource, high-speed, well-coordinated performance simulation is achieved. A performance simulation system includes a plurality of performance simulators and an overall control section connected to these performance simulators. The plurality of performance simulators individually simulate the performances of partial units into which a simulant is divided. The overall control section causes the performance simulators to conduct the simulation processes alternately every AT cycle.

Abstract: A method for verifying a source-synchronous communication interface of a processor is disclosed. A software model of a first device having a source-synchronous communication interface and a software model of a second device capable of communicating with the first device via the source-synchronous communication interface are provided. The source-synchronous communication interface includes an applied clock line, an address line, an echo clock line, and a data line. A simulation of a data request from the first device model to the second device model via an applied clock signal along with an address on the applied clock line and the address line is initially performed. The requested data is then received by the first device model from the second device model via the data line after various delays between the applied clock signal and an echo clock signal on the applied clock line and the echo clock line, respectively. Finally, the requested data received by the first device model is verified as to its veracity.

Abstract: A method and apparatus pertains to aligning and/or stitching together several 3-D fragments. The steps comprise determining at least two fragments having a corresponding set of alignment marks and aligning at least two fragments with respect to a coordinate system using the corresponding set of alignment marks in the respective fragments.

Abstract: In editing of a job parameter in a semiconductor exposure apparatus controlled by the job parameter, which is a collection of parameters, a first parameter set independent of the model of the semiconductor exposure apparatus and a second parameter set dependent upon the model are edited and saved independently. This makes it possible to improve operability of parameter editing and management in the semiconductor exposure apparatus, ease of maintenance thereof and the ability to use job parameters among various models of apparatus.

Abstract: A method for designing a HVAC air handling assembly for a climate control system on a vehicle includes the step of selecting an architecture for the HVAC air handling assembly from a library stored in a memory of a computer system and selecting a HVAC component part from the library. The method also includes the step of generating a HVAC design using the HVAC architecture and the HVAC component part, determining if the HVAC design meets a predetermined criteria, and regenerating the HVAC design if the predetermined criteria is not met.

Abstract: One aspect of the invention is a coverage metric to identify that part of a state space which is covered by properties verified by model checking. In each property, a signal is identified (or a proposition on several signals) as the observed signal in that property. The coverage metric measures the coverage of a set of properties with respect to the observed signal. The coverage metric identifies the reachable states in which the value of the observed signal determines the validity of the verified properties. Then a model checking algorithm can be used to check the correctness condition on the observed signal in these “covered” states to prove or disprove the property.